检索结果-内蒙古大学图书馆

Synaptic devices based on organic ferroelectric memtransistor with arithmetic calculating and logic functions

ELECTROCHIMICA ACTA 2024年 473卷

作者： Sun, Yanmei Li, Zhiyuan Li, Qingkun Yuan, Qi Wang, Yufei Li, Bingxun Heilongjiang Univ Sch Elect Engn Harbin 150080 Peoples R China Heilongjiang Univ Heilongjiang Prov Key Lab Micronano Sensit Devices Harbin 150080 Peoples R China Heilongjiang Univ HLJ Prov Key Labs Senior Educ Elect Engn Harbin 150080 Peoples R China

The bionic features offered by memory device are being actively explored. However, two-terminal memristors exhibit variability and limited capacity due to their inherent single presynaptic input scheme. Compared with the two-terminal memristor, the memtransistor can realize the modulation of conductive channel through the synergistic effect of gate, which enables the multifunctional modulation. Here, based on Schottky barrier tuning at metal-semiconductor interfaces by means of ferroelectric domain switching, a programmable memtransistor with arithmetic calculating and logic function is realized. Memtransistor with drain and gate adjustable non-volatile memory function effectively simulates the plasticity of biological synapses. Moreover, four arithmetical operations: addition, subtraction, multiplication and division are carried out by using the synaptic device. At the same time, the logic gate functions of "XOR" and "XNOR" were implemented based on ferroelectric memtransistor. This result will be helpful to further promote the development of memory computing for synaptic devices.

关键词： Synaptic device Memtransistor Ferroelectricity logic functions

来源：评论

学校读者我要写书评

暂无评论

Four-terminal silicon waveguides for optical logic functions at 1.55 μm

引用

JOURNAL OF OPTICS-INDIA 2024年 1-11页

作者： Kotb, Amer Zoiros, Kyriakos E. Chen, Wei Xian Jiaotong Liverpool Univ XJTLU Entrepreneur Coll Taicang Sch Chips Suzhou 215400 Peoples R China Univ Fayoum Fac Sci Dept Phys Al Fayyum 63514 Egypt Democritus Univ Thrace Sch Engn Dept Elect & Comp Engn Lightwave Commun Res Grp GR-67100 Xanthi Greece

Silicon-on-insulator-based integrated optical circuits are anticipated to become dominant in the photonics industry. This paper showcases a significant advancement by demonstrating the realization of seven optical logic functions using four-terminal silicon-on-silica waveguides operating at 1.55 mu m. The simulations were carried out with Lumerical FDTD software, showcasing successful execution through precise adjustment of incident beam phases. The evaluation of our approach's efficacy relies on the contrast ratio (CR), a key metric for assessing the performance of the targeted logic functions. Additionally, we scrutinize the influence of crucial operating parameters on the waveguide's performance. Notably, our waveguides outperform previous works, achieving substantially higher CRs of 33.5 dB, 25 dB, 30 dB, 25 dB, 24.7 dB, 26 dB, and 27.34 dB for logic XOR, AND, OR, NOT, NOR, NAND, and XNOR, respectively. What sets our findings apart is the accomplishment of these results at an elevated data speed of 120 Gb/s, showcasing the potential for high-speed data processing applications.

关键词： logic functions Four-terminal silicon waveguide Contrast ratio

来源：评论

学校读者我要写书评

暂无评论

Sixteen logic functions in a single electronic circuit

引用

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS 2023年第2期51卷 932-954页

作者： Cerda, Baltazar Campos-Canton, Isaac Delgado-Aranda, Finees Soubervielle-Montalvo, Carlos Tristan-Hernandez, Edgar Univ Autonoma San Luis Potosi Inst Invest Comunicac Opt Av Karakorum 1470Lomas 4ta Secc San Luis Potosi 78210 San Luis Potosi Mexico Univ Autonoma San Luis Potosi Fac Ciencias San Luis Potosi San Luis Potosi Mexico Tecnol Nacl Mexico Inst Tecnol San Luis Potosi Soledad De Garciano Sanc Mexico Univ Autonoma San Luis Potosi Fac Ingn San Luis Potosi San Luis Potosi Mexico

This paper introduces an electronic circuit capable of generating a set of functions, some of them known in digital systems as the logical operators AND, OR, XOR, and so on. Using two inputs, u1$$ {u}_1 $$ and u2$$ {u}_2 $$, the circuit provides 16 possible output combinations. The main idea of the electronic design is based on an RC network, operational amplifiers, and voltage comparators. On the other hand, mathematically, the stable system response is used as a surface where u1$$ {u}_1 $$ and u2$$ {u}_2 $$ are coordinate axes forming a plane, which intersects this surface, and the output y$$ y $$ can be seen as a circle surrounding some fixed points over this plane. The mathematical approach on this paper is intended as a groundwork for a multiple input reconfigurable logic gate that could be embedded in more complex systems. The procedure to obtain an XOR gate, represented by the f(6)$$ f(6) $$ function, is explained to illustrate the circuit behavior. Results of the 16 implemented functions are shown in Appendices B and C.

关键词： analog circuits differential equations digital systems logic functions nonlinear circuits plane equation reconfigurable logic

来源：评论

学校读者我要写书评

暂无评论

Interface engineering for a VOx based memristor with an ultralow switching voltage and logic functions

引用

JOURNAL OF ALLOYS AND COMPOUNDS 2022年第0期921卷 1页

作者： Wang, Dong Zhang, Chao Han, Chuanyu Qian, Lingxuan Huang, Xiaodong Southeast Univ Sch Elect Sci & Engn Key Lab MEMS Minist Educ Nanjing 210096 Peoples R China Xi An Jiao Tong Univ Fac Elect & Informat Sch Microelect Xian 710049 Peoples R China Univ Elect Sci & Technol China Sch Elect Sci & Engn State Key Lab Elect Thin Films & Integrated Device Chengdu 611731 Peoples R China

A Ti/VOx/ITO memristor prepared at room temperature presents low switching voltages (set/reset voltages similar to -6 mV/190 mV) as well as good resistive switching characteristics including acceptable ON/OFF ratio (similar to 10) and long data retention (> 10(4) s). Such ultralow switching voltages mainly result from appropriate interface engineering combined with rational material design. Due to Ti's high oxygen-gettering capability, its contact with VOx leads to formation of a TiOx interlayer with numerous oxygen vacancies (V-O(2+)) near the interface even at room temperature. This interfacial V-O(2+) facilitates oxygen ions (O2-) migration by enlarging the available free space and weakening the local oxygen-cation bonds, thus resulting in the low switching voltages. Moreover, the graded O2- distribution in the TiOx interlayer induces a built-in electric field (Ebuilt-in), which has the same direction to the external electric field generated by the set voltage. This E-b(uilt_in) accelerates the O2- migration and thus leads to the ultralow set voltage. The resistive switching mechanism is revealed to be based on formation and collapse of the Schottky barrier caused by the O2- drift in the TiOx interlayer. The Boolean logic functions including 'NOT', 'AND', 'OR', 'NAND' and 'NOR' are demoed by using a single memristor, showing a great potential for in-memory computing. (C) 2022 Elsevier B.V. All rights reserved.

关键词： Interface engineering Memristor Oxygen ions Ultralow switching voltages logic functions

来源：评论

学校读者我要写书评

暂无评论

Neuromorphic Implementation of logic functions Based on Parallel Dual-Gate Thin-Film Transistors

IEEE ELECTRON DEVICE LETTERS

引用

IEEE ELECTRON DEVICE LETTERS 2022年第5期43卷 741-744页

作者： Hu, Yushen Wang, Yuqi Lei, Tengteng Wang, Fei Wong, Man Hong Kong Univ Sci & Technol Dept Elect & Comp Engn Hong Kong Peoples R China Southern Univ Sci & Technol Sch Microelect Shenzhen 518055 Peoples R China

Composed of computation units each containing a parallel, dual-gate (DG) thin-film transistor (TFT) and a memory capacitor addressed by an access TFT, a neuromorphic circuit implementing fundamental AND and OR logic functions is realized and characterized. The exceptionally low leakage current of a TFT built on indium-gallium-zinc oxide (IGZO) allows the capacitor to be used as a quasi-static memory element. Appropriate weight signals for the realization of the two logic functions are obtained using a gradient-descent training algorithm. The circuit can be configured to execute one of the two functions by the setting of the weight signals.

关键词： Thin film transistors logic gates Capacitors logic functions Leakage currents Electrodes Switches Thin-film transistor neuromorphic computing IGZO quasi-static memory dual-gate

来源：评论

学校读者我要写书评

暂无评论

A Comparison of Computing Spectral Transforms of logic functions using Python Frameworks on GPU 57

A Comparison of Computing Spectral Transforms of Logic Funct...

引用

57th International Scientific Conference on Information, Communication and Energy Systems and Technologies (ICEST)

作者： Radmanovic, Milos M. Fac Elect Engn Aleksandra Medvedeva 14 Nish 18000 Serbia

ISBN: (纸本)9781665485005

The spectral transforms of logic functions have numerous applications in logic synthesis, signal processing, pattern recognition, and in many related areas. It is very important to be able to efficiently compute these transforms. Python frameworks show extremely high computation performance for (Fast Fourier Transform) FFT-based algorithms executed on graphics processing units (GPUs). Thus, this paper presents a comparison of computation time for different implementations of spectral transform of logic functions, performed on GPUs using three different Python frameworks. It is used TensorFlow, PyTorch, and CuPy, frameworks. The experiments were performed on Nvidia GeForce RTX 2060 GPU, which belongs to the middle GPU price range. Computational times are compared using randomly-generated truth vectors of size up to 4096. The aim of this paper is to identify the computing platform and Python programming framework which produces the fastest spectral transform of logic functions.

关键词： logic functions spectral transforms FFT algorithms parallel GPU computing Python frameworks

来源：评论

学校读者我要写书评

暂无评论

Realization of logic functions Using Switching Lattices Under a Delay Constraint

引用

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2021年第10期40卷 2036-2048页

作者： Aksoy, Levent Akkan, Nihat Sedef, Herman Altun, Mustafa Istanbul Tech Univ Dept Elect & Commun Engn Emerging Circuits & Computat Grp TR-34469 Istanbul Turkey Yildiz Tech Univ Dept Elect & Commun Engn TR-34220 Istanbul Turkey

Switching lattices, consisting of four-terminal switches, present an alternative structure for the realization of Boolean logic functions. Although promising algorithms have been introduced to find a realization of a logic function using a switching lattice with the fewest number of four-terminal switches, the delay of a switching lattice has not been examined yet. In this article, we generate a switching lattice using a recently proposed CMOS-compatible four-terminal device model and formulate the delay of a path in a switching lattice. It is observed that the delay of a design realizing a logic function on a switching lattice heavily depends on the number of four-terminal switches in the critical path. With this motivation, we introduce optimization algorithms, called PHAEDRA and TROADES, which can find the realization of a logic function on a switching lattice with the fewest number of switches under a delay constraint given in terms of the number of switches in the critical path. While PHAEDRA is a dichotomic search algorithm that can obtain solutions with a small number of switches on small size logic functions, TROADES is a divide-and-conquer method that can find a solution using less computational effort and can easily handle larger size logic functions with respect to PHAEDRA. The experimental results show that the proposed algorithms can reduce the delay of a lattice realization of a logic function significantly at a cost of an increase in the number of switches. They can explore alternative lattice realizations of a logic function by changing the delay constraint, enabling a designer to choose the one that fits best in an application.

关键词： Lattices Delays logic functions Switches logic gates Switching circuits Binary search divide and conquer Elmore delay emerging technologies four-terminal switch logic synthesis satisfiability (SAT) switching lattice

来源：评论

学校读者我要写书评

暂无评论

Karnaugh Map Method for Memristive and Spintronic Asymmetric Basis logic functions

引用

IEEE TRANSACTIONS ON COMPUTERS 2021年第1期70卷 128-138页

作者： Vyas, Vaibhav Jiang-Wei, Lucian Zhou, Peng Hu, Xuan Friedman, Joseph S. Univ Texas Dallas Dept Elect & Comp Engn Richardson TX 75080 USA

The development of beyond-CMOS technologies with alternative basis logic functions necessitates the introduction of novel design automation techniques. In particular, recently proposed computing systems based on memristors and bilayer avalanche spin-diodes both provide asymmetric functions as basis logic gates - the implication and inverted-input AND, respectively. This article therefore proposes a method by which Karnaugh maps can be directly applied to systems with asymmetric basis logic functions. A set of identities is defined for these memristor and spintronic logic functions, enabling the formal demonstration of the Karnaugh map method and an explanation of the proposed technique. This method thus, enables the direct minimization of spintronic and memristive logic circuits without translation to conventional Boolean algebra, facilitating the further development of these novel computing paradigms. Preliminary analyses demonstrate that this Karnaugh map minimization approach can provide a 28 percent reduction in step count as compared to previous manual optimization.

关键词： Memristors logic gates logic functions Minimization Performance evaluation Spintronics Resistance Boolean algebra beyond-CMOS computing asymmetric logic emerging technologies memristors spintronics

来源：评论

学校读者我要写书评

暂无评论

Junctionless Electric-Double-Layer Thin-Film Transistors with logic functions

引用

PHYSICA STATUS SOLIDI-RAPID RESEARCH LETTERS 2023年第5期17卷 2200480-2200480页

作者： Yuan, Xing Dou, Wei Gan, Xiaomin Hou, Wei Lei, Liuhui Zhou, Weichang Tang, Dongsheng Hunan Normal Univ Synerget Innovat Ctr Quantum Effects & Applicat Key Lab Low Dimens Quantum Struct & Quantum Contro Minist Educ Changsha 410081 Peoples R China

Herein, junctionless thin-film transistors (TFT) with indium-oxide (In2O3) as the n-channel active layer are prepared on transparent substrates by magnetron sputtering at room temperature. Chitosan with an electric-double-layer (EDL) effect as a gate dielectric enables the device to achieve low-voltage operation, thus reducing energy consumption. The device maintains its performance in dark or illuminated conditions and has good performance with a mobility of 0.21 cm(2) V(-1)s(-1), a current on/off ratio of 6.5 x 10(6), and a subthreshold swing of 66 mV decade(-1). The device implements "OR" and "AND" logic functions at different voltage levels. The In2O3 TFT is ideally suited for prospective applications in large-area electronics and flexible electronics due to its exceptional device performance and low fabrication temperature.

关键词： electric-double-layers In2O3 films logic functions thin-film transistors

来源：评论

学校读者我要写书评

暂无评论

Use Of logic functions In The Diagnosis Of Hepatitis Disease Through A Web-Based Expert System Design: A Different Approach

Use Of Logic Functions In The Diagnosis Of Hepatitis Disease...

引用

Human-Computer Interaction, Optimization and Robotic Applications (HORA), International Congress on

作者： Hayri İncekara İnayet Hakkı Çizmeci Republic of Türkiye Ministry of National Education Konya Turkey Computer Engineer of Engineering Faculty Afyon Kocatepe University Afyon Turkey

ISBN: (数字)9798331510886

ISBN: (纸本)9798331510893

Hepatitis disease is one of the most important health problems in the world. It is estimated that 1.3 million people worldwide die each year from viral hepatitis, one of the most significant causes of hepatitis disease, and that one out of every three people in the world has been infected with the Hepatitis B virus (HBV). In this study, a Web-Based Medical Expert System (WBMES) was developed to diagnose hepatitis disease using logic functions. The system has been developed to raise the awareness of hepatitis disease – which negatively affects individual and community health, and hinders productivity – and increase the rates of early diagnosis and reduce the negative effects on individuals and the community. To do this, a truth table was created that included nine symptoms of hepatitis disease and 512 rules (2 9 = 512). Within this scope, the 512 rules in the truth table were evaluated together with specialist doctors to create a rule base called the Medical Expert System (MES), and a web-interface was developed to access it. The system was evaluated using the Hepatitis Dataset obtained from the UCI Repository of Machine Learning Databases, and it was found that the system's evaluation success rate was 98.68%.

关键词： Productivity Liver diseases Medical services Machine learning logic functions Medical expert systems Viruses (medical) Robots Optimization Diseases

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：