A scalable, programmable turbo decoder architecture is presented in this paper. The starting point is a comparison of the existing techniques on basis of scalability, area and power consumption. The results from these...
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ISBN:
(纸本)0780385047
A scalable, programmable turbo decoder architecture is presented in this paper. The starting point is a comparison of the existing techniques on basis of scalability, area and power consumption. The results from these comparisons lead to a hybrid technique on which our architecture concept is based. The architecture is consisting of clusters each of which is a VLIW architecture. The upsizing is possible by adding a cluster and dividing the two data memories in banks. The window size is chosen according to the number of banks to prevent the conflicts. At the end of the paper, a short evaluation of the architecture is presented.
We propose arithmetic codes (ACs) with a forbidden symbol as a joint entropy coding and error protection tool for robust video transmission over error-prone channels. In particular, we introduce a map decoder of ACs, ...
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We propose arithmetic codes (ACs) with a forbidden symbol as a joint entropy coding and error protection tool for robust video transmission over error-prone channels. In particular, we introduce a map decoder of ACs, and apply it to the transmission of 3-D SPIHT coded video and RTP/UDP/IP H.264 video with data partitioning. Experimental results show that the proposed system exhibits several advantages with respect to other schemes, and outperforms rate-compatible punctured convolutional (RCPC) codes in the applications considered.
An intuitive shortcut to understanding the maximum a posteriori (map) decoder is presented based on era approximation. This is shown to correspond to a dual-maxima computation combined with forward and backward recurs...
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An intuitive shortcut to understanding the maximum a posteriori (map) decoder is presented based on era approximation. This is shown to correspond to a dual-maxima computation combined with forward and backward recursions of Viterbi algorithm computations, The logarithmic version of the map algorithm can similarly be reduced to the same form by applying the same approximation, Conversely, if a correction term is added to the approximation, the exact map algorithm is recovered, It is also shown how the map decoder memory can be drastically reduced at the cost of a modest increase in processing speed.
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