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Parallel codebook design for vector quantization on a message passing mimd architecture

PARALLEL COMPUTING 2002年第7-8期28卷 1079-1093页

作者： Abbas, HM Bayoumi, MM Ain Shams Univ Fac Engn Dept Comp & Syst Engn Cairo 11381 Egypt Queens Univ Dept Elect & Comp Engn Kingston ON K7L 3N6 Canada

Vector quantization (VQ) is a widely used algorithm in speech and image data compression. One of the problems of the VQ methodology is that it requires large computation time especially for large codebook size. This paper addresses two issues. The first deals with the parallel construction of the VQ codebook which can drastically reduce the training time. A master/worker parallel implementation of a VQ algorithm is proposed. The algorithm is executed on the DM-mimd Alex AVX-2 machine using a pipeline architecture. The second issue deals with the ability of accurately predicting the machine performance. Using communication and computation models, a comparison between expected and real performance is carried out. Results show that the two models can accurately predict the performance of the machine for image data compression. Analysis of metrics normally used in parallel realization is conducted. (C) 2002 Elsevier Science B.V. All rights reserved.

关键词： vector quantization unsupervised learning parallel computing mimd architecture image compression

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Performance of the Alex AVX-2 mimd architecture in learning the NetTalk database

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IEEE TRANSACTIONS ON NEURAL NETWORKS 2004年第2期15卷 505-514页

作者： Abbas, HM Mentor Graph Corp Cairo Egypt

The process of training neural networks on parallel architectures has been used to assess the performance of so many parallel machines. In this paper, we are investigating the implementation of backpropagation (BP) on the Alex AVX-2 coarse-grained mimd machine. A host-worker parallel implementation is carried out in order to train different networks to learn the NetTalk dictionary. First, a computational model is constructed using a single processor to complete the learning process. Also, a communication model for the host-worker topology Is developed in order to compute the communication overhead in the broadcasting/gathering process. Both models are then used to predict the machine performance when p processors are used and a comparison with the actual measured performance of the parallel architecture implementation is carried out. Simulation results show that both models can be used effectively to predict the machine performance for the NetTalk problem. Finally, a comparison between the AVX-2 NetTalk implementation and the performance of other parallel platforms is presented.

关键词： backpropgation feedforward neural networks mimd architecture parallel computing

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Systolic mimd architectures for 4-level spherical subspace tracking

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JOURNAL OF SYSTEMS architecture 1996年第3期42卷 171-193页

作者： Fu, ZQ Dowling, EM DeGroat, RD Erik Jonsson School of Engineering and Computer Science The University of Texas at Dallas Richardson TX 75083-0688 USA

The 4-level spherical subspace tracker tracks the dominant or subdominant subspace associated with an input vector time series. The tracker maintains four distinct eigen-levels which can be used with the Minimum Description Length (MDL) criterion to make subspace dimension adjustments on the fly. This is important as the associated subspace based direction finding algorithms require knowledge of the subspace rank. In systems involving large radar or sonar arrays, the achievable performance will often be limited by the real time MIPS rate. Hence, in this paper the 4-level spherical subspace tracker is parallelized and sequenced to execute on systolic mimd architectures. The systolic mimd architectures are ideally suited for implementation with custom CORDIC VLSI or networks of available parallel numeric processing chips such as iWarps and TMS320C40's, Pseudo C-language cell programs specify the functionality and timing of the architecture using the fine grain mimd/systolic model of computation.

关键词： adaptive subspace systolic array mimd architecture subspace tracking

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Efficient mimd architectures for High-Performance Ray Tracing

Efficient MIMD Architectures for High-Performance Ray Tracin...

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IEEE International Conference on Computer Design

作者： Kopta, D. Spjut, J. Brunvand, E. Davis, A. Univ Utah Sch Comp Salt Lake City UT 84112 USA

ISBN: (纸本)9781424489350

Ray tracing efficiently models complex illumination effects to improve visual realism in computer graphics. Typical modern GPUs use wide SIMD processing, and have achieved impressive performance for a variety of graphics processing including ray tracing. However, SIMD efficiency can be reduced due to the divergent branching and memory access patterns that are common in ray tracing codes. This paper explores an alternative approach using mimd processing cores custom-designed for ray tracing. By relaxing the requirement that instruction paths be synchronized as in SIMD, caches and less frequently used area expensive functional units may be more effectively shared. Heavy resource sharing provides significant area savings while still maintaining a high mimd issue rate from our numerous light-weight cores. This paper explores the design space of this architecture and compares performance to the best reported results for a GPU ray tracer and a parallel ray tracer using general purpose cores. We show an overall performance that is six to ten times higher in a similar die area.

关键词： GPU ray tracer mimd architecture mimd processing core computer graphic equipment computer graphics computer graphics coprocessors high-performance ray tracing memory access pattern parallel architectures parallel ray tracer ray tracing resource sharing

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RECOGNITION OF PARAMETERIZED OBJECTS FROM 3D DATA - A PARALLEL IMPLEMENTATION

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IMAGE AND VISION COMPUTING 1994年第9期12卷 573-582页

作者： CHENAVIER, F REID, I BRADY, M Department of Engineering Science University of Oxford Parks Road Oxford OX1 1TY UK

We present a parallel implementation of an algorithm designed to recognize fully parameterized objects from 3D data. For the purpose of recognition, the mapping of sensed features with model features is structured as an interpretation tree. However, with the use of parameterized models, most of the computation performed during the tree search is actually spent in the updating step of the object parameters, this process being executed through a SUP/INF network. A major contribution of our implementation is the exploitation of the intrinsic parallelism of the SUP/INF network, while the interpretation tree search is also distributed on our transputer based mimd architecture.

关键词： OBJECT RECOGNITION PARAMETERIZED MODEL INTERPRETATION TREE SEARCH SUP/INF NETWORK PARALLEL PROCESSING mimd architecture

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LARGE-SCALE SIMULATIONS OF THE KINETIC ISING-MODEL

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INTERNATIONAL JOURNAL OF MODERN PHYSICS C-PHYSICS AND COMPUTERS 1993年第6期4卷 1137-1145页

作者： MUNKEL, C UNIV HEIDELBERG INTERDISZIPLINARES ZENTRUM WISSENSCH RECHNEND-69120 HEIDELBERGGERMANY

We present Monte Carlo simulation results for the dynamical critical exponent z of the two- and three-dimensional kinetic Ising model. The z-values were calculated from the magnetization relaxation from an ordered state into the equilibrium state at T(c) for very large systems with up to (169984)2 and (3072)3 spins. To our knowledge, these are the largest Ising-systems simulated to date. We also report the successful simulation of very large lattices on a massively parallel mimd computer with high speedups of approximately 1000 and an efficiency of about 0.93.

关键词： ISING MODEL CRITICAL EXPONENTS MASSIVELY PARALLEL SIMULATION mimd architecture

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MUSE: A message passing concurrent computer for on-board space systems

MUSE: A message passing concurrent computer for on-board spa...

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14th Symposium on Reliable Distributed Systems

作者： GAUME, F SIMON, F LEGALL, JY ALCATEL ALSTHOM RECH AUTOMAT & INTELLIGENCE SYST UNITF-91460 MARCOUSSISFRANCE

ISBN: (纸本)081867153X

Satellite payloads of the near future will raise the need of very powerful and dependable computers. No embeddable monoprocessor will be able to satisfy such computing power need. Thus those computers will be multi-processor systems. Satellite payloads must meet high availability requirements rather then reliability ones. This allows the use of fail stop reconfigurable computers. This paper describes the MUSE architecture, a reconfigurable multi-processor computer designed to support signal processing applications in space system.

关键词： COMPUTER architecture MESSAGE PASSING architecture mimd architecture DEPENDABILITY ON-BOARD SPACE SYSTEM

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Definition and SIMD implementation of a multi-processing architecture approach on FPGA

Definition and SIMD implementation of a multi-processing arc...

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Design, Automation and Test in Europe Conference and Exhibition (DATE 08)

作者： Bonnot, Philippe Lemonnier, Fabrice Edelin, Gilbert Gaillat, Gerard Ruch, Olivier Gauget, Pascal Thales Res & Technol RD 128 F-91767 Palaiseau France Thales Optron SA F-78283 Guyancourt France

ISBN: (纸本)9783981080131

In a context of high performance, low technology access cost and application code reusability objectives, this paper presents an "architectured FPGA" approach that consists in the definition of a general frame for embedded system application implementations. Addressing image processing as a first application domain, a FPGA architecture implementation based on that approach is presented. Built around SIMD architecture, the "Ter@Core" FPGA implementation illustrates the competitiveness of the approach compared to off-the-shelf processors and to usual FPGA approach. The presented implementation gathers 128 processing elements on a single FPGA providing 19.2 GOPS performance and very high application development prochictivity.

关键词： image processing data dependent processing long lifecycle FPGA platform approach domain specific API mimd architecture SIMD architecture middleware

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Definition and SIMD Implementation of a Multi-Processing architecture Approach on FPGA 08

Definition and SIMD Implementation of a Multi-Processing Arc...

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2008 Design, Automation and Test in Europe (DATE 2008), vol.2

作者： Philippe Bonnot Fabrice Lemonnier Gilbert Edelin Gerard Gaillat Olivier Ruch Pascal Gauget Thales Research & Technology Palaiseau France Thales Optronique SA Guyancourt France

ISBN: (纸本)9783981080131

关键词： Image processing Data dependent processing Long lifecycle FPGA Platform approach Domain specific API mimd architecture SIMD architecture Middleware

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A parallel algorithm for fixed-dimensional linear programming

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Parallel Algorithms and Applications 1995年第1期6卷 17-24页

作者： Kuzyurin, Nikolai N. Shabanov, Leonid V. Institute of System Programming Russian Academy of Science Moscow 109004 B. Communisticheskaja 25 Russian Federation

Simple parallel algorithm for fixed-dimensional Linear Programming is developed. It provides a straight-forward implementation on mimd architectures with high efficiency. The implementation on transputer arrays is described and numerical results of performance are presented. © 1995, Taylor & Francis Group, LLC. All rights reserved.

关键词： Linear programming mimd architecture Transputer array

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