A number of decomposition based mapping techniques are proposed. In these techniques, the synthesis problem is formulated as a mapping from an input matrix to an output matrix. The minimisation is obtained by construc...
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A number of decomposition based mapping techniques are proposed. In these techniques, the synthesis problem is formulated as a mapping from an input matrix to an output matrix. The minimisation is obtained by constructing a 'matching-count matrix'. The entries of the matching-count matrix MC(ij) represent the number of entry matches between the input variable number i in the input matrix (X) and the output function number j in the output matrix (Y). It then selects those input-output pairings that give the maximum matching count, thus maximising the number of switching operations which can be eliminated in the realisation of multiple-valued logic (mvl) functions. The proposed techniques are classified as: output-phase with complement, input-phase with and without complement. Numerical results are presented to show that the proposed techniques result in significant reduction in the number of switching operators required for the implementation of 5000 randomly generated r-valued functions (for I = 3, 4 and 5). It is also shown that the input-phase assignment techniques do not require any additional hardware circuitry at the output to restore the original function. This may give this technique an edge over other techniques.
In this paper, a Neural Network Deployment (NND) algorithm is presented to realize and synthesize Multi-Valued Logic (mvl) functions. The algorithm is combined with back-propagation learning capability and mvl operato...
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ISBN:
(纸本)9781479973644
In this paper, a Neural Network Deployment (NND) algorithm is presented to realize and synthesize Multi-Valued Logic (mvl) functions. The algorithm is combined with back-propagation learning capability and mvl operators. The operators are used to synthesize the functions. Consequently the synthesized expressions are applied by the mvl neural operators. The advantages of NND-mvl algorithm are demonstrated by accuracy measurement of mvl neural operator realization. Furthermore, evaluation of NND-mvl algorithm is analyzed by its application, propagation delay and accuracy achieved for training with 4 hidden neurons. In a brief, an effort of training mvl neural operators and utilizing them for logic synthesis is observed.
This paper focuses on the fixed polarity Reed-Muller (FPRM) expression of multiple-valued logic (mvl) symmetric functions. In the FPRM expression, each variable occurs in exactly one complemented form. We show propert...
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ISBN:
(纸本)0769506933
This paper focuses on the fixed polarity Reed-Muller (FPRM) expression of multiple-valued logic (mvl) symmetric functions. In the FPRM expression, each variable occurs in exactly one complemented form. We show properties of the FPRM of partially symmetric functions and report experimental results for certain benchmark functions.
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