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检索条件"主题词=Max-Log-Map Algorithm"
22 条 记 录,以下是11-20 订阅
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Minimal Trellis for Systematic Recursive Convolutional Encoders
Minimal Trellis for Systematic Recursive Convolutional Encod...
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IEEE International Symposium on Information Theory (ISIT)
作者: Pimentel, Cecilio Souza, Richard Demo Uchoa-Filho, Bartolomeu F. Benchimol, Isaac Univ Fed Pernambuco DES CODEC Recife PE Brazil UTFPR CPGEI Curitiba Parana Brazil Univ Fed Santa Catarina GPqCom EEL CTC Florianopolis SC Brazil IFAM CMDI Manaus Amazonas Brazil
We consider high-rate systematic recursive convolutional encoders to be adopted as constituent encoders in turbo schemes. It has been shown by Douillard and Berrou that the construction of high-rate turbo codes by mea... 详细信息
来源: 评论
Fast Joint Source-Channel Decoding of Convolutional Coded Markov Sequences with Monge Property
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IEEE TRANSACTIONS ON COMMUNICATIONS 2010年 第1期58卷 128-135页
作者: Dumitrescu, Sorina McMaster Univ ECE Dept Hamilton ON L8S 4L8 Canada
This work addresses the problem of joint source-channel decoding of a Markov sequence which is first encoded by a source code, then encoded by a convolutional code, and sent through a noisy memoryless channel. It is s... 详细信息
来源: 评论
An Efficient FPGA-based Turbo Decoder and Its Application in FH-SS System
An Efficient FPGA-based Turbo Decoder and Its Application in...
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4th International Conference on Wireless Communications, Networking and Mobile Computing
作者: Bu, Xiang-yuan Yang, Guo-ying Liu, Ce-lun Zhou, Rong-hua Beijing Inst Technol Dept Elect Engn Beijing 100081 Peoples R China
This paper focuses on implementing an efficient and simplified turbo decoder with FPGA. The max-log-map algorithm is employed and a simplified and improved max-log-map algorithm is present. By carefully manipulating h... 详细信息
来源: 评论
A Programmable max-log-map Turbo Decoder Implementation
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VLSI DESIGN 2008年 第unknown期2008卷
作者: Salmela, Perttu Sorokin, Harri Takala, Jarmo Tampere Univ Technol Dept Comp Syst POB 553 FIN-33101 Tampere Finland
In the advent of very high data rates of the upcoming 3G long-term evolution telecommunication systems, there is a crucial need for efficient and flexible turbo decoder implementations. In this study, a max-log-map tu... 详细信息
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Performance Analysis of Different Equalization algorithms in A Modified Iterative Scheme
Performance Analysis of Different Equalization Algorithms in...
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2008 the IET 2ND International Conference on Wireless,Mobile & Multimedia Networks
作者: Shuangshuang Han Dongfeng Yuan Xiang Cheng School of Information Science and Engineering Shandong University Joint Research Institute for Signal and Image Processing School of EPSHeriot-Watt University
This paper proposes a modified iterative scheme(MI) for the data transmitted by more efficient way over inter-symbol interference(ISI) channels,then compares and analyzes the performance for three equalization algorit... 详细信息
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Energy efficient turbo decoder with reduced state metric quantization
Energy efficient turbo decoder with reduced state metric qua...
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IEEE Workshop on Signal Processing Systems
作者: Liu, Haisheng Diguet, Jean-Philippe Jego, Christophe Jezequel, Michel Boutillon, Emmanuel ENST Bretagne GET CNRS TAMCICUMR 2872 Brest France Univ Bretagne Sud CNRS FRE 2734 LESTER Lorient France
In the field of mobile communications, the energy issue of a turbo decoder becomes an equivalent constraint as throughput and performance. This paper describes a technique to reduce the internal bitwidth of the state ... 详细信息
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Low-power hybrid turbo decoding based on reverse calculation
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IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES 2006年 第3期E89A卷 782-789页
作者: Choi, HM Kim, JH Park, IC Korea Adv Inst Sci & Technol Div Elect Engn Taejon South Korea Korea Adv Inst Sci & Technol Dept Elect Engn Taejon South Korea
As turbo decoding is a highly memory-intensive algorithm consuming large power, a major issue to be solved in practical implementation is to reduce power consumption. This paper presents an efficient reverse calculati... 详细信息
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Low-complexity BCJR decoder for turbo decoders and its VLSI implementation in 0.18-μm CMOS  62
Low-complexity BCJR decoder for turbo decoders and its VLSI ...
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62nd IEEE Vehicular Technology Conference
作者: Sabeti, L Ahmadi, M Tepe, KE Univ Windsor Dept Elect Engn Windsor ON N9B 3P4 Canada
This paper proposes a low-complexity design for BCJR or maximum a posteriori (map) decoders. max-log-map algorithm, which offers a good compromise between performance and complexity, is selected for implementation. Th... 详细信息
来源: 评论
Parallelised max-log-map model
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ELECTRONICS LETTERS 2002年 第17期38卷 971-972页
作者: Loo, KK Salman, K Alukaidey, T Jimaa, SA Univ Hertfordshire Dept ECEE Hatfield AL10 9AB Herts England N Carolina Agr & Tech State Univ Greensboro NC 27411 USA
A parallelised max-log-map model (P-max-log-map) that exploits the sub-word parallelism and very long instruction word architecture of a microprocessor or a digital signal processor (DSP) is presented. The proposed mo... 详细信息
来源: 评论
Design for a turbo-code decoder using a block-wise algorithm
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IEICE TRANSACTIONS ON COMMUNICATIONS 2002年 第2期E85B卷 559-564页
作者: Park, GH Yoon, SH Hong, D Kang, CE Yonsei Univ Dept Elect & Comp Engn Informat & Telecommun Lab Seodaemoon Gu Seoul 120749 South Korea LG Elect Inc LG R&D Complex 533 Mobile Comm Res Lab Dept Mobile Comm TechDongan Gu Kyeongku Do 431749 South Korea
Several implementation methods for a map decoder are proposed in this paper, Using a novel pipeline structured time-shared process, the authors are able to efficiently overcome the restrictions imposed by the recursio... 详细信息
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