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An error-based active disturbance rejection control with memory structure

MEASUREMENT & CONTROL 2021年第5-6期54卷 724-736页

作者： Chen, Sen Chen, Zhixiang Zhao, Zhiliang Shaanxi Normal Univ Sch Math & Informat Sci 620 West Changan Rd Xian 710119 Peoples R China Rocket Force Univ Engn Coll Missile Engn Xian Peoples R China

The paper studies the control problem for nonlinear uncertain systems with the situation that only the current reference signal is available. By constructing a memory structure to save the previous reference signals, a novel error-based active disturbance rejection control with an approximation for the second-order derivative of reference signal is proposed. The transient performance of the proposed method is rigorously studied, which implies the high consistence of the closed-loop system. More importantly, to attain the satisfactory tracking performance, the necessary condition for nominal control input gain is quantitatively investigated. Furthermore, the superiority of the proposed method is illuminated by contrastively evaluating the sizes of the total disturbance and its derivative. The proposed method can alleviate the burden of the estimation and compensation for total disturbance. Finally, the experiment for a manipulator platform shows the effectiveness of the proposed method.

关键词： Active disturbance rejection control extended state observer error-based memory structure

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Working memory structure in 10-and 15-year old children with mild to borderline intellectual, disabilities

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RESEARCH IN DEVELOPMENTAL DISABILITIES 2010年第6期31卷 1258-1263页

作者： van der Molen, Mariet J. Univ Amsterdam Dept Psychol NL-1018 WB Amsterdam Netherlands

The validity of Baddeley's working memory model within the typically developing population, was tested. However, it is not clear if this model also holds in children and adolescents with mild to, borderline intellectual disabilities (ID: IQ score 55-85). The main purpose of this study was therefore, to explore the model's validity in this population. Several verbal and visuo-spatial STM and WM tasks, were administered to 115 children with mild to borderline ID (mean age 10 years) and to 98, adolescents with mild to borderline ID (mean age 15). Structural equation modeling (LISREL) shows, that Baddeley's working memory model does not fit the data of the 10-year and 15-year old, participants. Principal components analyses on the other hand show a hazy pattern with on the one, side an indication for a 'general' component with loadings of visuo-spatial short-term memory and, working memory tasks and a separate verbal short-term memory component. On the other hand there, is also an indication of a modality specific memory structure;a visuo-spatial- versus a verbal, component. A straight-forward dichotomy between STM and WM indicates apparently an, oversimplification, at least it is for children and adolescents with mild to borderline ID. (C) 2010 Elsevier Ltd. All rights reserved.

关键词： Working memory Short-term memory Mild intellectual disability memory structure

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Midpoint memory: A Special memory structure for Data-Oriented Models Implementation

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JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS 2015年第5期24卷

作者： Heikalabad, Saeed Rasouli Navin, Ahmad Habibizad Hosseinzadeh, Mehdi Oladghaffari, Telli Islamic Azad Univ Dept Comp Engn Sci & Res Branch Tabriz Iran Islamic Azad Univ Dept Comp Engn Tabriz Branch Tabriz Iran

Introducing data-oriented theory in recent years and its successful applications in engineering and applied science and by requirements to new memory structure for managing data efficiently, lead us to present a new memory module for implementation of data-oriented models. Most of concepts in data-oriented theory are modeled as problem-solution data structure. In this paper for suitable management these kinds of data structures, a special content addressable memory with fast access is designed which is named Midpoint memory.

关键词： Content addressable memory data-oriented memory structure

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A Second Look at the structure of Human Olfactory memory

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INTERNATIONAL SYMPOSIUM ON OLFACTION AND TASTE 2009年第1期1170卷 338-342页

作者： White, Theresa L. Le Moyne Coll Dept Psychol Syracuse NY 13214 USA SUNY Upstate Med Univ Syracuse NY USA

How do we remember olfactory information? Is the architecture of human olfactory memory unique compared with that of memory for other types of stimuli? Ten years ago, a review article evaluated these questions, as well as the distinction between long-and short-term olfactory memory, with three lines of evidence: capacity differences, coding differences, and neuropsychological evidence, though serial position effects were also considered. From the data available at the time, the article preliminarily suggested that olfactory memory was a two-component system that was not qualitatively different from memory systems for other types of stimuli. The decade that has elapsed since then has ushered in considerable changes in theories of memory structure and provided huge advances in neuroscience capabilities. Not only have many studies exploring various aspects of olfactory memory been published, but a model of olfactory perception that includes an integral unitary memory system also has been presented. Consequently, the structure of olfactory memory is reevaluated in the light of further information currently available with the same theoretical lines of evidence previously considered. This evaluation finds that the preponderance of evidence suggests that, as in memory for other types of sensory stimuli, the short-term-long-term distinction remains a valuable dissociation for conceptualizing olfactory memory, though perhaps not as architecturally separate systems.

关键词： olfactory memory human cognition memory structure

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ASTRO: Synthesizing application-specific reconfigurable hardware traces to exploit memory-level parallelism

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MICROPROCESSORS AND MICROSYSTEMS 2015年第7期39卷 553-564页

作者： Lin, Mingjie Chen, Shaoyi DeMara, Ronald F. Wawrzynek, John Univ Cent Florida Dept Elect & Comp Engn Orlando FL 32816 USA Berkeley Wireless Res Ctr Berkeley CA 94704 USA Univ Calif Berkeley Div Comp Sci Berkeley CA 94720 USA

Emerging integrated CPU + FPGA hybrid platforms, such as the Extensible Processing Platform architecture from Xilinx [1], offer unprecedented opportunity to achieving both multifunctionality and real-time responsiveness for memory-intensive embedded applications. However, how to cost-effectively synthesize application-specific hardware constructs that fully exploit memory-level parallelism remains to be a key challenge. To address this problem, we propose a new FPGA-based embedded computer architecture, ASTRO (Application-Specific Hardware Traces with Reconfigurable Optimization). Our main contribution is the development of an integrated methodology that focuses on how to construct an application-specific memory access network capable of extracting the maximum amount of memory-level parallelism on a per-application basis. In particular, our proposed ASTRO architecture can (I) perform dynamic memory analysis to maximally extract the target application's instruction, loop and memory-level parallelism for performance enhancement, (2) synthesize highly efficient accelerators that enable parallelized memory accesses, and therefore (3) accomplish effective data orchestration by utilizing the capabilities of modern FPGA devices: abundant distributed block RAMs and reprogrammability. To empirically validate our ASTRO methodology, we have implemented a baseline embedded processor platform, a conventional CPU + accelerator with a centralized single memory, and a prototype ASTRO machine based on Xilinx MicroBlaze technology. Our experimental results show that on average for 10 benchmark applications from SPEC2006 and MiBench [2], the ASTRO machine achieves 8.6 times speedup compared to the baseline embedded processor platform and 1.7 times speedup compared to a conventional CPU + accelerator platform. More interestingly, the ASTRO platform achieves more than 40% reduction in energy-delay product compared to a conventional CPU + accelerator with a centralized memory. (C) 2015 E

关键词： memory-level parallelism FPGA Application-specific Reconfigurable memory structure HLS

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Mini-Rank: A Power-Efficient DDRx DRAM memory Architecture

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IEEE TRANSACTIONS ON COMPUTERS 2014年第6期63卷 1500-1512页

作者： Fang, Kun Zheng, Hongzhong Lin, Jiang Zhang, Zhao Zhu, Zhichun Nvidia Santa Clara CA 95050 USA Samsung Syst Architecture Labs San Jose CA 95134 USA Samsung Austin R&D Ctr Austin TX 78730 USA Iowa State Univ Dept Elect & Comp Engn Ames IA 50011 USA Univ Illinois Dept Elect & Comp Engn Chicago IL 60607 USA

memory power consumption has become a severe concern in multi-core computer platforms. As memory data rate, capacity and bandwidth are being pushed higher and higher, the power consumption of memory systems becomes a significant part in the overall system power profile. Conventional memory systems do not provide an efficient mechanism for managing its power and performance tradeoff. We propose a novel mini-rank architecture for DDRx memories to reduce memory power consumption by breaking each DRAM rank into multiple narrow mini-ranks and activating fewer devices for each request. We also propose a heterogeneous mini-rank design to further improve the performance-power tradeoff for each workload based on its memory access behavior and bandwidth requirement. The evaluation results show that homogeneous mini-rank significantly reduces memory power with small performance loss. For instance, using four-core multiprogramming workloads, a x32 mini-rank configuration reduces memory power by 19.5 percent with 1.3 percent performance loss on average for memory-intensive workloads. Heterogeneous mini-rank further improves the balance between the performance and power saving. For instance, it reduces the memory power by up to 38.0 percent with an average performance loss of 2.4 percent, compared with a conventional memory system. In comparison, the x32 homogeneous mini-rank reduces memory power by up to 25.4 percent;while the x8 homogeneous mini-rank incurs performance loss by up to 19.3 percent. Furthermore, heterogeneous mini-rank achieves consistently good performance-power tradeoff for workloads made by programs of diverse memory access behavior and bandwidth requirement.

关键词： memory structure DRAM low power design performance analysis and design aids

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Using a self-adaptive neighborhood scheme with crowding replacement memory in genetic algorithm for multimodal optimization

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SWARM AND EVOLUTIONARY COMPUTATION 2013年 12卷 1-17页

作者： Kamyab, Shima Eftekhari, Mandi Shahid Bahonar Univ Kerman Dept Comp Engn Kerman Iran

In this paper a new GA based niching method using a Self-adaptive Neighborhood scheme with Crowding Replacement memory (GA_SN_CM) for multimodal optimization is proposed, where, instead of using a niche radius to identify neighborhoods in the population, each individual attempts to select suitable neighbors from the population adaptively. Such neighborhood structure allows eliminating redundant solutions in a neighborhood to increase the diversity of the population which leads the algorithm to explore more solutions. Besides, in order to conserve found niche during the niching procedure, a memory swarm with crowding replacement scheme is used along with the main population. The results of performance comparison between the proposed method and some existing niching techniques over several multimodal benchmark functions demonstrate good performance of GA_SN_CM in improving the niching process. (C) 2013 Elsevier B.V. All rights reserved.

关键词： Multimodal optimization Self-adaptive multimodal optimization memory structure Redundant solution elimination Crowding replacement memory

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Dynamic optimization facilitated by the memory tree

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SOFT COMPUTING 2015年第3期19卷 547-566页

作者： Zhu, Tao Luo, Wenjian Yue, Lihua Univ Sci & Technol China Sch Comp Sci & Technol Anhui Prov Key Lab Software Engn Comp & Commun Hefei 230027 Anhui Peoples R China

Memorizing the past information for later environments is an effective and widely employed approach to optimize dynamic problems. Although the existing explicit memories for dynamic optimization differ widely in the literature, all of them organize memory entries in a linear list. This naive structure leads to problems, such as heavy computational overhead and small memory capacity, and thus restricts the performance of the memories. In this paper, the binary space partition tree is adopted to organize the memory entries, and then a memory tree is constructed. The memory tree partitions the search space into regions. In order to make use of the memory tree, a neighbor shift strategy is proposed. When a new individual is generated in a region that has never been visited since the last change, the new individual is shifted to the neighboring memory individual of that region, if it is less fit than the memory individual. The proposed approach can be easily combined with many population-based algorithms for dynamic optimization in the real space. As examples, the proposed approach was combined with a basic particle swarm optimizer and two state-of-the-art dynamic optimizers. The experimental results showed that it significantly enhanced the performance of the three optimizers on various test problems. The proposed approach demonstrates the importance of memory structure in memory approaches.

关键词： Dynamic optimization problem Population-based algorithms memory memory structure Binary space partition tree

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memory sources of dreams: the incorporation of autobiographical rather than episodic experiences

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JOURNAL OF SLEEP RESEARCH 2014年第4期23卷 441-447页

作者： Malinowski, Josie E. Horton, Caroline L. Univ Bedfordshire Dept Psychol Luton Beds England Leeds Metropolitan Univ Fac Hlth & Social Sci Leeds LS1 3HE W Yorkshire England

The present study aimed to explore autobiographical memories (long-lasting memories about the self) and episodic memories (memories about discrete episodes or events) within dream content. We adapted earlier episodic memory study paradigms and reinvestigated the incorporation of episodic memory sources into dreams, operationalizing episodic memory as featuring autonoetic consciousness, which is the feeling of truly re-experiencing or reliving a past event. Participants (n = 32) recorded daily diaries and dream diaries, and reported on wake-dream relations for 2 weeks. Using a new scale, dreams were rated for their episodic richness, which categorized memory sources of dreams as being truly episodic (featuring autonoetic consciousness), autobiographical (containing segregated features of experiences that pertained to waking life) or otherwise. Only one dream (0.5%) was found to contain an episodic memory. However, the majority of dreams (>80%) were found to contain low to moderate incorporations of autobiographical memory features. These findings demonstrate the inactivity of intact episodic memories, and emphasize the activity of autobiographical memory and processing within dreams. Taken together, this suggests that memories for personal experiences are experienced fragmentarily and selectively during dreaming, perhaps in order to assimilate these memories into the autobiographical memory schema.

关键词： continuity hypothesis declarative memory dreaming memory incorporation memory structure sleep mentation

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Early memory in the parasitoid wasp Nasonia vitripennis

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JOURNAL OF COMPARATIVE PHYSIOLOGY A-NEUROETHOLOGY SENSORY NEURAL AND BEHAVIORAL PHYSIOLOGY 2015年第4期201卷 375-383页

作者： Schurmann, Daria Kugel, Dominic Steidle, Johannes L. M. Univ Hohenheim Fachgebiet Tierokol 220c Inst Zool D-70593 Stuttgart Germany

We studied early memory in Nasonia vitripennis, a parasitoid of fly pupae and emerging model organism for ecological questions in the context of learning. After associative training consisting of one drilling experience in a host in the presence of cinnamon, females showed a preference to cinnamon for at least 24 h. To study sensitisation, wasps were trained by one drilling in a host without cinnamon. These wasps were not attracted to cinnamon immediately afterwards. Obviously, sensitisation is not involved in early memory. Wasps that were anaesthetised by CO2 directly after associative training did not react to cinnamon 30-45 min later, but after 1 and 24 h. CO2 treatment a parts per thousand yen5 min after training did not erase the reaction to cinnamon. This indicates the existence of four early memory phases. (a) One phase < 5 min after training, in which CO2 has to be applied to become effective. (b) One subsequent phase which is resistant to CO2. (c) One phase < 1 h in which memory can be erased by CO2 treatment directly after training. (d) One phase 1-24 h not affected by CO2 treatment. Together with earlier data this enables us to establish a complete memory structure for N. vitripennis.

关键词： Olfactory learning memory structure Short-term memory Anaesthesia-sensitive memory Anaesthesia-resistant memory

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