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检索条件"主题词=Mitchell algorithm"
8 条 记 录,以下是1-10 订阅
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An Improved Logarithmic Multiplier for Media Processing
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JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2019年 第6期91卷 561-574页
作者: Ahmed, Syed Ershad Srinivas, M. B. BITS Pilani Elect Dept Hyderabad Campus Hyderabad India BML Munjal Univ Sch Engn & Technol Gurgaon India
As the modern computing systems become increasingly embedded and portable, a growing set of applications in media processing (graphics, audio, video, and image) has evolved. Multiplication is the operation that is mos... 详细信息
来源: 评论
Design and Implementation of Logarithmic Multiplier Using FinFETs for Low Power Applications  3rd
Design and Implementation of Logarithmic Multiplier Using Fi...
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3rd International Conference on Emerging Research in Electronics, Computer Science and Technology (ICERECT)
作者: Kumbargeri, Vaishnavi Mahale, Anusha Aradhya, H. V. Ravish RV Coll Engn Dept ECE Bangalore Karnataka India
In all processing systems, multiplication is one of the computation-intensive operations demanding more resources. Hence, multiplication operations demand more time, power and resources. One of the better solutions is... 详细信息
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High Accuracy Binary Logarithmic Conversion using Range Mapping for DSP Applications
High Accuracy Binary Logarithmic Conversion using Range Mapp...
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IEEE Asia Pacific Conference on Circuit and System (APCCAS)
作者: Low, Joshua Yung Lih Jong, Ching Chuen Nanyang Technol Univ Sch Elect & Elect Engn Singapore 639798 Singapore
This paper presents a high accuracy mitchell-based logarithmic conversion algorithm suitable for integrated circuit implementation. A novel technique named range mapping is proposed to compress the range of approximat... 详细信息
来源: 评论
A Review of Logarithmic Multiplier Hardware Architectures
A Review of Logarithmic Multiplier Hardware Architectures
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International Conference on Decision Aid Sciences and Applications (DASA)
作者: Kantipudi, M. V. V. Prasad Sailaja, Vemuri Sanipini, Venkata Kiran Symbiosis Int Deemed Univ Symbiosis Inst Technol Pune 412115 Maharashtra India Pragati Engn Coll Elect & Commun Engn Surampalem India Aditya Coll Engn & Technol Elect & Commun Engn Surampalem India
Multiplication is basics for any arithmetic operations of central processing unit and graphical processing units. Nowadays multipliers are widely used in digital image processing, digital signal processing, network se... 详细信息
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An Iterative Logarithmic Multiplier with Improved Precision  23
An Iterative Logarithmic Multiplier with Improved Precision
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23rd IEEE Symposium on Computer Arithmetic (ARITH)
作者: Ahmed, Syed Ershad Kadam, Sanket Srinivas, M. B. BITS Pilani Dept Elect & Elect Engn Hyderabad Campus Hyderabad Andhra Pradesh India
Recent studies have demonstrated the potential for achieving higher area and power saving with approximate computation in error tolerant applications involving signal and image processing. Multiplication is a major ma... 详细信息
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A neural network accelerated optimization method for FPGA
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JOURNAL OF COMBINATORIAL OPTIMIZATION 2024年 第5期47卷 84-84页
作者: Hu, Zhengwei Zhu, Sijie Wang, Leilei Cao, Wangbin Xie, Zhiyuan North China Elect Power Univ Dept Elect & Commun Engn Baoding 071003 Peoples R China
A neural network accelerated optimization method for FPGA hardware platform is proposed. The method realizes the optimized deployment of neural network algorithms for FPGA hardware platforms from three aspects: comput... 详细信息
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An Area and Delay Efficient Logarithmic Multiplier
An Area and Delay Efficient Logarithmic Multiplier
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Contemporary Computing and Applications (IC3A), International Conference on
作者: Navteja Alla Syed Ershad Ahmed Department of Electrical Engineering BITS Pilani Hyderabad India
Multiplication is an ubiquitous operation in growing set of media processing applications (graphics, audio, video, and image). Many of these applications, however, possess an inherent quality of error resilience. Thus... 详细信息
来源: 评论
High Accuracy Binary Logarithmic Conversion using Range Mapping for DSP Applications
High Accuracy Binary Logarithmic Conversion using Range Mapp...
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IEEE Asia Pacific Conference on Circuits and Systems
作者: Joshua Yung Lih Low Ching Chuen Jong School of Electrical and Electronic Engineering Nanyang Technological University
This paper presents a high accuracy mitchell-based logarithmic conversion algorithm suitable for integrated circuit implementation. A novel technique named range mapping is proposed to compress the range of approximat... 详细信息
来源: 评论