This paper describes several system-level interconnection strategies for a coarse-grained reconfigurable fabric designed for low-energy hardware acceleration. A small, representative sub-graph for signal and image pro...
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This paper describes several system-level interconnection strategies for a coarse-grained reconfigurable fabric designed for low-energy hardware acceleration. A small, representative sub-graph for signal and image processing applications is used to predict the success of mapping larger applications onto the fabric device with these different interconnection strategies, which include 32:1, 8:1, 5:1, 4:1, 3553:1 (3:1, 5:1, 5:1, 3:1) and 355:1 (3:1, 5:1, 5:1) cardinalities. Three mapping techniques are presented and used to complete mappings onto several of these fabric instances including a mixed integer linear programming technique, a constraint programming approach, and a greedy heuristic. We present results for area (in number of required rows), power, delay, and energy as well as run times for mapping a set of signal and image processing benchmarks onto each of these interconnects. Our results indicate that the 5:1 interconnect provides the best overall results and does not require any additional hardware resources than the baseline 4:1 technique. When compared with other implementation strategies, the reconfigurable fabric energy consumption, using 5:1-based interconnect, is within 5-10X of a direct ASIC implementation, is 10X better than an Virtex II Pro FPGA and is 100X better than an Intel XScale processor.
Three dimensional integrated circuits (3 D ICs) are introduced as one way to address the bottlenecks from interconnect delays in sub-micro VLSI design. Despite their advantages over traditional 2 D ICs, the heat dissi...
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Three dimensional integrated circuits (3 D ICs) are introduced as one way to address the bottlenecks from interconnect delays in sub-micro VLSI design. Despite their advantages over traditional 2 D ICs, the heat dissipation has become an extremely important issue in 3 D ICs. In this paper, a novel thermal-driven 3 D incremental floorplanning algorithm is proposed using the mixed integer linear programming (MILP) formulation. With our analytical approach, chip-area, wirelength and maximal on-chip temperature could be optimized simultaneously. Additionally, by the iterative modification flow, we can improve the packing result incrementally. Experimental results show that compared to the original floorplans, our incremental floorplans could reduce max on-chip temperature by about 27 % while chip area and total wirelength are enlarged just 1 % and 2 %, respectively.
We are introducing in this article the Multicommodity Traveling Salesman Problem (MTSP), where the objective is to deliver all the demands of different commodities by a tour that minimizes the sum of the fixed and var...
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We are introducing in this article the Multicommodity Traveling Salesman Problem (MTSP), where the objective is to deliver all the demands of different commodities by a tour that minimizes the sum of the fixed and variable costs for the selected arcs. The MTSP yields then a large scale mixed integer linear programming problem. In this article we devise a Lagrangean based heuristic approach to tackle this more general TSP variant.
A two-echelon half-closed-loop logistics network system is founded for the issue of manufacturing logistics network design, including supply and return channels. Considering the integration of the uncertainty and cycl...
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A two-echelon half-closed-loop logistics network system is founded for the issue of manufacturing logistics network design, including supply and return channels. Considering the integration of the uncertainty and cycle time of the demand quantities of products and the return rates of used products, sites selection of potential logistics centers, plants and recycling plants, and transshipment problem, a stochastic, multi-time-step, capacitated mixed integer linear programming model is presented, the objective function makes total costs including fixed costs, transportation costs and storage costs in logistics centers minimize. Since such network design problems belong to a class of NP hard problems, a genetic algorithm approach-based heuristic to this model is presented. Finally a numerical example is used to prove the model and genetic algorithm validity.
This paper presents an approach to trajectory generation for Unmanned Aerial Vehicles (UAV) by using mixed integer linear programming (MILP) and a modification of the A{sup}* algorithm to optimize paths in dynamic env...
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This paper presents an approach to trajectory generation for Unmanned Aerial Vehicles (UAV) by using mixed integer linear programming (MILP) and a modification of the A{sup}* algorithm to optimize paths in dynamic environments, particularly having pop-ups with a known future probability of appearance. Each pop-up leads to one or several possible evasion maneuvers, characterized with a set of values used as decision making parameters in an integerlinearprogramming (ILP) model that optimizes the final route by choosing the most suitable alternative trajectories, according to the imposed constrains such as maximum fuel consumption and spent time. The model of the system in MILP and A{sup}* algorithms is presented, as well as the ILP formulation for decision making. Results and discussions are given to promote future real time implementations.
In this paper, we propose a novel finite impulse response (FIR) filter design methodology that reduces the number of operations with a motivation to reduce power consumption and enhance performance. The novelty of our...
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In this paper, we propose a novel finite impulse response (FIR) filter design methodology that reduces the number of operations with a motivation to reduce power consumption and enhance performance. The novelty of our approach lies in the generation of filter coefficients such that they conform to a given low-power architecture, while meeting the given filter specifications. The proposed algorithm is formulated as a mixed integer linear programming problem that minimizes Chebychev error and synthesizes coefficients which consist of pre-specified alphabets. The new modified coefficients can be used for low-power VLSI implementation of vector scaling operations such as FIR filtering using computation sharing multiplier (CSHM). Simulations in 0.25 μm technology show that CSHM FIR filter architecture can result in 55% power and 34% speed improvement compared to carry save multiplier (CSAM) based filters.
We consider the reconfiguration problem in multi- fiber WDM optical networks. In a network with evolving traffic, the virtual topology may not remain optimal, leading to degradation of network performance. However, ad...
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We consider the reconfiguration problem in multi- fiber WDM optical networks. In a network with evolving traffic, the virtual topology may not remain optimal, leading to degradation of network performance. However, adapting the virtual topology to the changing traffic may lead to service disruption. This optimization problem hence captures the trade-off between network performance and number of reconfigurations applied to the virtual topology. This trade-off is considered via a multi- metrics approach. The above problem is solved through a mixed integer linear programming (MILP) formulation with a multivariate objective function. However the problem is NP-hard and such an approach is unable to solve large problem instances in a reasonable time. Therefore we propose a simulated annealing (SA) based heuristic approach for solving problems of higher complexity. We compare the performance and the computation time of solving the MILP model and the heuristic approach considering different test instances. We can find near optimal solutions for instances of medium complexity using the MILP model. The SA scheme can be used as a heuristic to arrive at near optimal solutions when the run-time of the MILP becomes practically infeasible. It also appears that the trade-off's involved in the reconfiguration problem cannot be left aside, as a little flexibility with respect to one metric allows to drastically improve the quality of the solution with respect to other metrics.
The paper studies the capacity planning problem in the TFT-LCD production chain. Due to two significant trends, the capacity planning decision gradually becomes an important strategic issue to which TFT-LCD industry p...
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The paper studies the capacity planning problem in the TFT-LCD production chain. Due to two significant trends, the capacity planning decision gradually becomes an important strategic issue to which TFT-LCD industry paid attention. First is the increase of product types which causes a wide range of product groups, such as mobile, monitor, notebook, TV and industrial display are produced. The second trend is the advances of new technology which cause multiple generations of technologies coexist in each manufacturing stage and production site. This paper proposes a mixed integer linear programming (MILP) to formulate the capacity planning which considers many practical characteristics and constraints in TFT-LCD production chain. A heuristic algorithm is developed to solve the MILP model.
We propose a new scheme, called protected working lightpath envelope (PWLE), for dynamic provisioning of survivable services without requiring any wavelength conversion. PWLE is a path-oriented protection strategy bas...
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We propose a new scheme, called protected working lightpath envelope (PWLE), for dynamic provisioning of survivable services without requiring any wavelength conversion. PWLE is a path-oriented protection strategy based on lightpath-protecting rho-cycles. It partitions the total network capacity into a static protection layer and a working layer available for dynamic routing. To deal with the new issues raised by lightpath-protecting p-Cycles, we propose compatible grouping so that the PWLE can be formulated as an mixed integer linear programming (MILP) model. Based on compatible grouping, we further propose compatible group routing (CGR), a distributed routing algorithm tailored for PWLE. Compared with rho-Cycle-based protected working capacity envelope (PWCE), PWLE has the advantages of high capacity efficiency, avoidance of wavelength conversion, good blocking performance and guaranteed optical transmission quality. We evaluate the performance improvement of PWLE in capacity efficiency and blocking performance through the numerical results obtained from CPLEX and simulations.
In this study the authors present a mixed integer linear programming model to solve the problem of cost minimization of sugar cane removal and its transport from the fields to the sugar mill at operational level. The ...
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In this study the authors present a mixed integer linear programming model to solve the problem of cost minimization of sugar cane removal and its transport from the fields to the sugar mill at operational level. The complexity of the problem is basically determined by the system approach which results in the generation of a great number of variables and constraints that refer to the following operational dimensions: (a) need for continuous supply to the sugar mill;(b) cutting means used in cane harvesting;(c) transportation vehicles and (d) providing routes, which are characterized by the existence of storage facilities at the beginning of the railroads. The results demonstrate the model is not only useful to minimize transportation cost, but also for scheduling daily cane road transport and harvesting quotas of cutting means. (c) 2005 Elsevier B.V. All rights reserved.
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