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THE UNIFORM MEMORY-HIERARCHY model of computation

ALGORITHMICA 1994年第2-3期12卷 72-109页

作者： ALPERN, B CARTER, L FEIG, E SELKER, T IBM CORP ALMADEN RES CTRSAN JOSECA 95120

The Uniform Memory Hierarchy (UMH) model introduced in this paper captures performance-relevant aspects of the hierarchical nature of computer memory. It is used to quantify architectural requirements of several algorithms and to ratify the faster speeds achieved by tuned implementations that use improved data-movement strategies. A sequential computer's memory is modeled as a sequence [M0, M1,...] of increasingly large memory modules. computation takes place in M0. Thus, M0 might model a computer's central processor, while M1 might be cache memory, M2 main memory, and so on, For each module M(u), a bus B(u) connects it with the next larger module M(u+1). All buses may be active simultaneously. Data is transferred along a bus in fixed-sized blocks. The size of these blocks, the time required to transfer a block, and the number of blocks that fit in a module are larger for modules farther from the processor. The UMH model is parametrized by the rate at which the blocksizes increase and by the ratio of the blockcount to the blocksize. A third parameter, the transfer-cost (inverse bandwidth) function, determines the time to transfer blocks at the different levels of the hierarchy. UMH analysis refines traditional methods of algorithm analysis by including the cost of data movement throughout the memory hierarchy. The communication efficiency of a program is a ratio measuring the portion of UMH running time during which M, is active. An algorithm that can be implemented by a program whose communication efficiency is nonzero in the limit is said to be communication-efficient. The communication efficiency of a program depends on the parameters of the UMH model, most importantly on the transfer-cost function. A threshold function separates those transfer-cost functions for which an algorithm is communication-efficient from those that are too costly. Threshold functions for matrix transpose, standard matrix multiplication, and Fast Fourier Transform algorithms are establish

关键词： MEMORY HIERARCHY model of computation FFT MATRIX MULTIPLICATION HIGH-PERFORMANCE COMPUTING PERFORMANCE PROGRAMMING CACHE ARCHITECTURE BRIDGING model

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Autonomous Vehicles Scenario Testing Framework and model of computation: On Generation and Coverage

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IEEE ACCESS 2021年 9卷 60617-60628页

作者： Alnaser, Ala' J. Sargolzaei, Arman Akbas, Mustafa Ilhan Florida Polytech Univ Dept Appl Math Lakeland FL 33805 USA Tennessee Technol Univ Mech Engn Dept Cookeville TN 38505 USA Embry Riddle Aeronaut Univ Dept Elect Engn & Comp Sci Daytona Beach FL 32114 USA

Autonomous vehicle (AV) technology started to shift the perception of the transportation systems. However, for AVs to operate at their optimum capabilities, they need to go through a comprehensive testing and verification process. While a large amount of research and funding has been provided for solving this problem, there is still a lack of a systematic method to develop standardized tests that can be used to judge if the decision-making capability functions are within acceptable parameters. To that end, the tests need to cover all possible situations that an AV may run into. This paper focuses on defining the notion of coverage mathematically when using pseudo-randomly generated simulations for testing. The approach defines new equivalence relations between scenes, which are the systems' various states, to achieve this goal. Considering the substantial need for computation, even with the obtained coverage, we also introduce the mathematical definition of a sub-scene and additional strategies, such as expanding the equivalence classes of scenes and combining actors in scenes, to reduce the amount of testing required to certify AVs.

关键词： Testing Mathematical model Roads Autonomous vehicles Vehicle dynamics Systematics Decision making Autonomous vehicles coverage model of computation safety testing and verification framework

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Three fundamental dimensions of scientific workflow interoperability: model of computation, language, and execution environment

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FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE 2010年第2期26卷 245-256页

作者： Elmroth, Erik Hernandez, Francisco Tordsson, Johan Umea Univ Dept Comp Sci SE-90187 Umea Sweden Umea Univ HPC2N SE-90187 Umea Sweden

We investigate interoperability aspects of scientific workflow systems and argue that the workflow execution environment, the model of computation (MoC), and the workflow language form three dimensions that must be considered depending on the type of interoperability sought: at the activity, sub-workflow, or workflow levels. With a focus on the problems that affect interoperability, we illustrate how these issues are tackled by current scientific workflows as well as how similar problems have been addressed in related areas. Our long-term objective is to achieve (logical) interoperability between workflow systems operating under different MoCs, using distinct language features, and sharing activities running on different execution environments. (C) 2009 Elsevier B.V. All rights reserved.

关键词： Scientific workflows Workflow interoperability Workflow languages model of computation Grid interoperability

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A Novel model of computation for Software Synthesis Based on Data Frame Driving

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IETE TECHNICAL REVIEW 2015年第1期32卷 70-78页

作者： Wang, Jian Li, Yubai Univ Elect Sci & Technol China Sch Commun & Informat Engn Chengdu 610054 Peoples R China

Software synthesis is a useful technology to accelerate the design of digital systems, and the MoC (model of computation) is the foundation of software synthesis. Current researches on MoC mainly focus on the situations that the produced data frames are used only once by its downstream module. However, for some applications with loops, the data frame produced by upstream module needs to be reused and thus the current MoCs cannot be directly used to synthesize these applications' DFG (data flow graph). To solve this problem, a novel MoC based on data frame driving is proposed for software synthesis in this paper. In our MoC, the DFG with loops is first transformed into an acyclic DFG and modules in the acyclic DFG are divided into different levels that define the priority of modules. Then, the schedule can be generated according to the modules' level. The proposed MoC is verified under both random generated DFG and real-world application's DFG. The experimental results show that by using the proposed MoC, the schedule for DFG with reused data frame can be generated for both single processor system and multi-processors system, and it thus can be used as a useful tool to aid the software synthesis.

关键词： Software synthesis model of computation Data flow graph Scheduling

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A model of computation for bit-level concurrent computing and programming: APEC

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IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 2008年第1期E91D卷 1-14页

作者： Ajiro, Takashi Tsuchida, Kensei Toyo Univ Dept Open Informat Syst Kawagoe Saitama 3508585 Japan

A concurrent model of computation and a language based on the model for bit-level operation are useful for developing asynchronous and concurrent programs compositionally, which frequently use bit-level operations. Some examples are programs for video games, hardware emulation (including virtual machines), and signal processing. However, few models and languages are optimized and oriented to bit-level concurrent computation. We previously developed a visual programming language called A-BITS for bit-level concurrent programming. The language is based on a dataflow-like model that computes using processes that provide serial bit-level operations and FIFO buffers connected to them. It can express bit-level computation naturally and develop compositionally. We then devised a concurrent computation model called APEC (Asynchronous Program Elements Connection) for bit-level concurrent computation. This model enables precise and formal expression of the process of computation, and a notion of primitive program elements for controlling and operating can be expressed synthetically. Specifically, the model is based on a notion of uniform primitive processes, called primitives, that have three terminals and four ordered rules at most, as well as on bidirectional communication using vehicles called carriers. A new notion is that a carrier moving between two terminals can briefly express some kinds of computation such as synchronization and bidirectional communication. The model's properties make it most applicable to bit-level computation compositionally, since the uniform computation elements are enough to develop components that have practical functionality. Through future application of the model, our research may enable further research on a base model of fine-grain parallel computer architecture, since the model is suitable for expressing massive concurrency by a network of primitives.

关键词： model of computation visual programming bidirectional communication concurrent bit-level

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THE BIGGEST NEED: A NEW model of computation

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INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS 2009年第4期23卷 335-336页

作者： Sterling, Thomas Louisiana State Univ Baton Rouge LA 70803 USA

The development of HPC systems capable of exascale performance will demand innovations in hardware architecture and system software as well as programming models and methods. The combination of a vast increase in scale of such systems combined with the emergence of heterogeneous multicore structures is forcing future systems to be organized and operate on principles very different from the conventional practices of the last two decades. The biggest need for achieving exascale computing is the development of a new model of computation that will provide the new paradigm exploiting the opportunities and addressing the challenges of the emerging technologies and advanced architectures that together will comprise future exascale systems. This brief paper discusses the need for a new model of computation and the properties such a model should embody.

关键词： high performance computing model of computation exascale computing message-passing model asynchronous methods

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Canonical decomposition of models of computation to support a meta-model of computation for component reusability

Canonical decomposition of models of computation to support ...

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4th International Conference on Cybernetics and Information Technologies, Systems and Applications/5th Int Conf on Computing, Communications and Control Technologies

作者： Mbobi, Mokhoo Redknee Inc Dept Prod Operat Mississauga ON L4W 4Y9 Canada

ISBN: (纸本)9781934272077

Nowadays, embedded systems become naturally heterogeneous;they call for the use of several models of computation that not specifically have the same semantic properties. The leading question is how to combine various models of computation to cooperate each other, and provide common heterogeneous behavior in a given heterogeneous system. This paper comes up with a canonical base from which a model of computation can be specified. This base can be used to model common structure to describe interactions between heterogeneous models of computation.

关键词： software engineering heterogeneous modeling modeling design model meta-model model of computation component

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Heterogeneous Semantic System for IEC 61499 Based on model of computation 5

Heterogeneous Semantic System for IEC 61499 Based on Model o...

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IEEE International Conference on Cyber Technology in Automation, Control, and Intelligent Systems (CYBER)

作者： Li, Di Zhai, Zhenkun Zhou, Nan South China Univ Technol Coll Mech & Automobile Engn Guangzhou Guangdong Peoples R China

ISBN: (纸本)9781479987306

In order to improve the accuracy of execution model of control system design compliance with IEC 61499, this paper presents a heterogeneous semantic system based on model of computation. According to the dynamic behavior characteristics of various models in the reference architecture for system design in IEC 61499, different types of model of computation are chosen, such as Extended Interface Automata, Process Network, Timed Multitasking and so on. With the proposed semantic system, heterogeneous execution model of the control system can be build up. Through the simulation of heterogeneous execution model from a global perspective, it is able to effectively verify the functions and performance of control system in the early stage of system design.

关键词： IEC 61499 model of computation Heterogeneous Execution model

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An overall specification of a meta-model of computation for model-driven embedded system modeling

An overall specification of a meta-model of computation for ...

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International Symposium on Collaboration Technologies and Systems

作者： Mbobi, Mokhoo Boulanger, Frederic Ecole Super Elect Dept Comp Sci F-91192 Gif Sur Yvette France

ISBN: (纸本)9780978569907

The prototyping of embedded systems being long and expensive, software models are often defined to be used as a behavioral reference for better exploration and evaluation of the systems properties. However, embedded systems being naturally heterogeneous, they require the coexistence of several models of computation. In software engineering, the great challenge is how to specify heterogeneous interfaces for ensuring well defined communications because various semantic properties are mixed. Therefore, some existing approaches use only a set of few models of computation to reduce this complexity. Some others can use an open set of models of computation but reduce the complexity by forbidding to use different models of computation in the same hierarchical level. This paper proposes a modeling approach based on the meta-modeling of models of computation. It allows to mix different models of computation by using a meta-model of computation which provides a common semantic description at a higher abstraction level. This makes easier to specify the interactions between models of computation.

关键词： modeling meta-model model of computation model-driven embedded system

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A model of computation for real-time applications on embedded Manycores 8

A Model of Computation for real-time applications on embedde...

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8th IEEE International Symposium on Embedded Multicore/Manycore Systems-on-Chip (MCSoC)

作者： Louise, Stephane Dubrulle, Paul Goubier, Thierry CEA LIST Nano INNOV F-91191 Gif Sur Yvette France

ISBN: (纸本)9781479943050

This paper presents a first work to bring a consistent model of computation (MoC) for real-time applications on embedded many-core systems. Embedded manycores have lots of constraints (power, heterogeneity, memory, etc.) but also lots of promises with regard to harnessable applications, i.e. new kinds of applications that could fit embedded systems. Such a MoC would encompass both data movements in Manycore's memories, determinism of execution, composability but also real-time requirements. We build our MoC on a well known base -CycloStatic DataFlow (CSDF)-for its desirable properties (i.e. determinism and composability), and thank to several case-studies, we extend it to a superset, adding two special data processing filters which preserve these good properties and provide useful features for embedded computing.

关键词： Clocks computational modeling Data models Multicore processing Programming Real-time systems Time factors CSDF Dataflow Manycores model of computation Real-time and Cyber Physical Systems data flow real-time application program data models Timing devices real-time systems Time Factors computational modeling Programming Determinism Embedded computing Fate embedding Superset

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