In this paper, we present a background on Elliptic Curve Cryptography, along with the montgomery operation, which plays major role on Elliptic Curve Cryptosystem and side channel attacks on EC-montgomery operations. W...
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ISBN:
(纸本)9783642240423;9783642240430
In this paper, we present a background on Elliptic Curve Cryptography, along with the montgomery operation, which plays major role on Elliptic Curve Cryptosystem and side channel attacks on EC-montgomery operations. We have also provided a brief background on File Register architecture and proposed a new design level of EC-montgomery addition algorithm. These design level architecture are designed in an efficient manner. Realizing the proposed design level of FPGA technology. Through this FPGA based technology very advantageous results were found when compared against other existing designs. Even though our design bears an extra computation time. it reduces the area space or register gate area space due to reassigning the design and power analysis attack.
In the paper, we propose a new method of modular multiplication computation, based on Residue Number System. We use an approximate method to find the approximate method a residue from division of a multiplication on t...
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ISBN:
(纸本)9781509036806
In the paper, we propose a new method of modular multiplication computation, based on Residue Number System. We use an approximate method to find the approximate method a residue from division of a multiplication on the given module. We substitute expensive modular operations, by fast bit right shift operations and taking low bits. The carried-out simulation on Kintex7 XC7K70T board showed that the offered method allows to win in time on average for 75%, and in the area -- on average for 80% relatively to modified method from work [1] that makes it more applicable for the hardware implementation of the cryptography primitives constructed over a simple finite field.
This brief presents a novel and efficient design for a Rivest-Shamir-Adleman (RSA) cryptosystem with a very large key size. A new modular multiplier architecture is proposed by combining the fast Fourier transform-bas...
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This brief presents a novel and efficient design for a Rivest-Shamir-Adleman (RSA) cryptosystem with a very large key size. A new modular multiplier architecture is proposed by combining the fast Fourier transform-based Strassen multiplication algorithm and montgomery reduction, which is different from the interleaved version of montgomery multiplications used in traditional RSA designs. A new modular exponentiation algorithm is also proposed for the RSA design. Applying this method, we have implemented 8K/12K-bit and 48K-bit RSA on application-specific integrated circuit designs. The results show that the proposed method gains more advantage as the key size increases, which matches the complexity analysis. Performance comparisons show that the 48K-bit design, which is applicable for both RSA and fully homomorphic encryption, outperforms the previous works with respect to throughput and efficiency.
RSA (Rivest, Shamir, Adleman) is one of the most widely used cryptographic algorithms worldwide to perform data encryption and decryption. An essential step in RSA computation lies on its modular multiplication which ...
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ISBN:
(纸本)9781479977116
RSA (Rivest, Shamir, Adleman) is one of the most widely used cryptographic algorithms worldwide to perform data encryption and decryption. An essential step in RSA computation lies on its modular multiplication which is relatively expensive and time consuming to be implemented in hardware. This paper proposes two modular multiplication architectures based on modified serial montgomery algorithm for 2048-bit RSA. By limiting the integer modulo that has sequence of A094358, a very simple and fast modular multiplication hardware can be developed. The first archictecture which incorporates 2048-bit adders performes better in term of latency (19010 Logic Cells, 2048 clock cycles or 0.0022 s), while the second architecture utilizing multiple smaller 128-bit adders offers less area consumption (8926 Logic Cells, 36864 clock cycles or 0.0031 s). An area multiplied with squared latency (AT(2)) can be used as trade-off parameter for choosing the most suitable design for certain need. For prototyping purpose, we have successfully synthesized and implemented our proposed designs written in VHDL using Altera Quartus II with Cyclone II EP2C70F896C6 FPGA as a target board.
Big module RSA signature algorithm is very popular these years. We try to improve it and get more operation efficiency. We proposed a four-prime Chinese Remainder Theorem (CRT)-RSA digital signature algorithm in this ...
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ISBN:
(纸本)9781479986798
Big module RSA signature algorithm is very popular these years. We try to improve it and get more operation efficiency. We proposed a four-prime Chinese Remainder Theorem (CRT)-RSA digital signature algorithm in this paper. We used the Hash function SHA512 to make message digest. We optimized large number modular exponentiation with CRT combining in montgomery algorithm. Our experiment shows that our method got good performance. The security analysis shows higher signature efficiency on resistance of common attacks.
Information Security is a major issue worldwide. Various steps are being taken to improve and upgrade security measures. Border crossings across countries have become one of them. Therefore the use of traditional pass...
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Information Security is a major issue worldwide. Various steps are being taken to improve and upgrade security measures. Border crossings across countries have become one of them. Therefore the use of traditional passports has lead to an improvement in the name of E-passports. E-passports are a more secured and are denoted by a symbol. E-passports contain a small chip which stores the data of passport holder. To protect this data Cryptography is widely used. This paper shows the comparison of modular multiplication methods used for RSA algorithm for 1024 bit key length. Xilinx ISE 14.3 platform is used to perform this encryption and decryption process targeting Virtex-5 FPGA board.
Modular multiplication is the core arithmetic for most of the Cryptographic applications. montgomery multiplication is one of the fastest methods available for performing modular multiplication. A k - partition method...
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ISBN:
(纸本)9781479949816
Modular multiplication is the core arithmetic for most of the Cryptographic applications. montgomery multiplication is one of the fastest methods available for performing modular multiplication. A k - partition method for montgomery multiplication is thoroughly studied and analysed. This method reduces the time complexity of multiplication from O (n) to O (n/k). Another method for modular exponentiation - Square and Multiply method is implemented. As the name suggests, squaring is the main principle behind this method. The implementation results are compared with that of an ordinary montgomery multiplier and the k - partition method in terms of power and area constraints. Results for 128, 256, 512 and 1024 bit input operands show that the Square and Multiply method is more power efficient than the other two.
In many consumer electronics computation problem, the modular exponentiation is a common operation for scrambling secret data and is used by several public-key cryptosystems, such as the RSA method. In this paper, an ...
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ISBN:
(纸本)9781479952779
In many consumer electronics computation problem, the modular exponentiation is a common operation for scrambling secret data and is used by several public-key cryptosystems, such as the RSA method. In this paper, an algorithm is proposed, which combines binary exponentiation method, the common-multiplicand multiplication (CMM) method, and the signed-digit recoding (SDR) method for fast modular exponentiation consumer electronics application.
Finite field arithmetic in residue number system (RNS) necessitates modular reductions, which can be carried out with RNS montgomery algorithm. By transforming long-precision modular multiplications into modular multi...
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ISBN:
(纸本)9788132216957;9788132216940
Finite field arithmetic in residue number system (RNS) necessitates modular reductions, which can be carried out with RNS montgomery algorithm. By transforming long-precision modular multiplications into modular multiplications with small moduli, the computational complexity has decreased much. In this work, two implementation methods of RNS montgomery algorithm, residue recovery as well as parallel base conversion, are reviewed and compared. Then, we propose a new residue recovery method that directly employs binary system rather than mixed radix system to perform RNS modular multiplications. This improvement is appropriate for a series of long-precision modular multiplications with variant operands, in which it is more efficient than parallel base conversion method.
Modular multiplication is the most crucial component in RSA cryptosystem. In this paper, we present a new modular multiplication architecture using the Strassen multiplication algorithm and montgomery reduction. The a...
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ISBN:
(纸本)9781479913657;9781479913640
Modular multiplication is the most crucial component in RSA cryptosystem. In this paper, we present a new modular multiplication architecture using the Strassen multiplication algorithm and montgomery reduction. The architecture is different from the interleaved version of montgomery multiplication traditionally used in RSA design. By selecting different bases of 16 or 24 bits, it could perform 8,192-bit or 12,288-bit modular multiplication. The design was synthesized on the Altera's Stratix-V FPGA using Quartus II. It performs one modular multiplication in 2,030 cycles. When operating at 209 MHz, the execution time for an 8K- or 12K-bit modular multiplication is about 9.7 mu s.
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