montgomery algorithm has demonstrated its effectiveness in applications like cryptosystems. Most of the existing works on finding the montgomery inverse of an element over the Galois field are based on the software im...
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montgomery algorithm has demonstrated its effectiveness in applications like cryptosystems. Most of the existing works on finding the montgomery inverse of an element over the Galois field are based on the software implementation, which is then extended to derive the scalable hardware architecture. In this work, we consider a fundamental change at the algorithmic level and eliminate the potential problems in hardware implementation which makes the resulting modified montgomery inverse algorithm over GF(2(m)) very suitable for hardware realization. Due to its structural simplicity, the modified algorithm can be easily mapped onto a high-speed and possibly low-complexity circuit. Experimental results show that our development can achieve both the area and speed advantages over the previous work when the inversion operation over GF(2(m)) is under consideration and the improvement becomes more significant when we increase the value of m as in the applications of cryptosystems. The salient property of our development sustains the high-speed operation as well as low hardware complexity over a wide range of in for commercial cryptographic applications and makes it suitable for both the scalable architecture and direct hardware implementation.
RSA(Rivest-Shamir-Adleman)public-key cryptosystem is widely used in the information security area such as encryption and digital signature. Based on the modified montgomery modular multiplication algorithm, a new arch...
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RSA(Rivest-Shamir-Adleman)public-key cryptosystem is widely used in the information security area such as encryption and digital signature. Based on the modified montgomery modular multiplication algorithm, a new architecture using CSA(carry save adder)was presented to implement modular multiplication. Compared with the popular modular multiplication algorithms using two CSA, the presented algorithm uses only one CSA, so it can improve the time efficiency of RSA cryptoprocessor and save about half of hardware resources for modular multiplication. With the increase of encryption data size n, the clock cycles for the encryption procedure reduce in (T(n^2),) compared with the modular multiplication algorithms using two CSA.
RSA(Rivest-Shamir-Adleman)public-key cryptosystem is widely used in theinformation security area such as encryption and digital signature. Based on the modified montgomerymodular multiplication algorithm, a new archit...
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RSA(Rivest-Shamir-Adleman)public-key cryptosystem is widely used in theinformation security area such as encryption and digital signature. Based on the modified montgomerymodular multiplication algorithm, a new architecture using CSA (carry save adder)was presented toimplement modular multiplication. Compared with the popular modular multiplication algorithms usingtwo CSA, the presented algorithm uses only one CSA, so it can improve the time efficiency of RSAcryptoprocessor and save about half of hardware resources for modular multiplication. With theincrease of encryption data size n, the clock cycles for the encryption procedure reduce in T(n~2),compared with the modular multiplication algorithms using two CSA.
This study presents efficient hardware architectures for montgomery multiplication and squaring based on programmable cellular automata (PCA). Multiplication and squaring are the key operation in implementing circuits...
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This study presents efficient hardware architectures for montgomery multiplication and squaring based on programmable cellular automata (PCA). Multiplication and squaring are the key operation in implementing circuits for various applications of error control coding such as Reed-Solomon code. Thus we employ montgomery multiplication and squaring algorithms and construct simple hardware architectures based on PCA in GF(2(m)). Our architectures are highly optimized and have low-complexity based on irreducible all one polynomial (AOP). (C) 2006 Elsevier Inc. All rights reserved.
montgomery multipliers of carry save adder (CSA) architecture require a full addition to convert the carry save representation of the result into a conventional form. In this paper, we reuse the CSA architecture to pe...
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montgomery multipliers of carry save adder (CSA) architecture require a full addition to convert the carry save representation of the result into a conventional form. In this paper, we reuse the CSA architecture to perform the result format conversion, which leads to small area and fast speed. The results of implementation on FPGAs show that the new montgomery multiplier is about 113.4 Mbit/s for 1024-bit operands at a clock of 114.2 MHz. (c) 2007 Elsevier B.V. All rights reserved.
Rivest-Shamir-Adleman (RSA) is one of the most widely preferred algorithms used in public-key cryptography systems. RSA has a very slow ciphering rate if used in software. The use of a specific hardware is the only re...
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Rivest-Shamir-Adleman (RSA) is one of the most widely preferred algorithms used in public-key cryptography systems. RSA has a very slow ciphering rate if used in software. The use of a specific hardware is the only reasonable solution in applications where performance is the key factor. To speed up the modular multiplication and squaring, bit level systolic arrays are used with the montgomery's modular multiplication algorithm to constitute the core of modular exponentiation operation. The squaring systolic structure is also performed in parallel with the systolic multiplication in the modular exponentiation. The novel idea in this paper is to use the systolic array cells with increased performance of up to 20% and use them in a single row organization. The final RSA design is configurable and can operate both for encryption and decryption. 1024-bit RSA algorithm is designed for the Xilinx Virtex FPGA and 0.7 mu ASIC. (C) 2004 Elsevier B.V. All rights reserved.
In recent years, the conversion of residue numbers to a binary integer has been intensively studied. The Chinese Remainder Theorem (CRT) is a solution to this conversion problem of a number to the Residue Number Syste...
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In recent years, the conversion of residue numbers to a binary integer has been intensively studied. The Chinese Remainder Theorem (CRT) is a solution to this conversion problem of a number to the Residue Number System with a general moduli set. This paper presents a new division-free conversion approach for the conversion of residue numbers to a binary integer. The algorithm differs from others employing a great number of division instructions by using shift instructions instead. These simple instructions keep the power consumption lower. This algorithm can also be implemented with a lookup table or upon a vector machine. Both make the conversion process efficient. This division-free algorithm employs the concept of montgomery multiplication algorithm. There are two variations of montgomery algorithm proposed, which are algorithms MMA and IMA. The algorithm MMA is to transform the input number into the output presentation of montgomery algorithm. algorithm IMA is therefore inverse the computation of montgomery algorithm to obtain the multiplicand. These two algorithms are in the complexity of O(n), where n is [log(2)q(j)]. q(j) is a modulus. The proposed algorithm for converting the residues to a binary integer therefore runs on O(n x log m) times on O(m) processors. There are O(log m) iterations of O(n) complexity. Compared with the traditional conversion algorithm, the advantages of this proposed algorithm are not only in employing simpler operations but also in performing fewer iterations. (c) 2006 Elsevier Ltd. All rights reserved.
In order to make the typical montgomery's algorithm suitable for various lengths RSA, this paper proposes a scheme for an expandable RSA coprocessor. This design allows for cascading the hardware of Process Elemen...
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ISBN:
(纸本)1424403251
In order to make the typical montgomery's algorithm suitable for various lengths RSA, this paper proposes a scheme for an expandable RSA coprocessor. This design allows for cascading the hardware of Process Elements when larger modulo are required. The proposed design uses optimized montgomery's modular multiplication algorithm. The proposed architecture has distinctive features, i.e. not only the computation speed is significantly fast but also the hardware overhead is drastically decreased.
Elliptic scalar multiplication is the most cost operation of the elliptic curve cryptosystems. The fast implementation of Elliptic Curve Cryptography mainly depends on the fast computation of elliptic scalar multiplic...
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ISBN:
(纸本)9812700420
Elliptic scalar multiplication is the most cost operation of the elliptic curve cryptosystems. The fast implementation of Elliptic Curve Cryptography mainly depends on the fast computation of elliptic scalar multiplication kP. This paper analysis and compare the complexity of the "add and double methods" and montgomery methods. We show that the montgomery methods has more cost than the "add-and-double" method if the ratio of the cost of field inversion and field multiplication is more than 2 under the affine coordinate representations without concern the cost of field adding and field squaring in GF(2(m)). In fact, the ration of I and M is more than 7 as the size of binary field is not less than 128, which means that the algorithm 3.1 outperforms the algorithm 3.2.
Different from binary method of modular exponentiation, the article introduces a faster and more effective sliding window method combined with montgomery algorithm and the CRT (Chinese Remainder Theory). The flow char...
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Different from binary method of modular exponentiation, the article introduces a faster and more effective sliding window method combined with montgomery algorithm and the CRT (Chinese Remainder Theory). The flow charts of signature and verification are also given. The experiment result shows that sliding window method is 22.3% faster than the binary method. Meanwhile, it takes only 28 ms to do a 1024 bit signature.
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