Radial Basis Function Neural Networks (RBFNN) are used in variety of applications such as pattern recognition, control and time series prediction and nonlinear identification. RBFNN with Gaussian Function as the basis...
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ISBN:
(纸本)9781479966585
Radial Basis Function Neural Networks (RBFNN) are used in variety of applications such as pattern recognition, control and time series prediction and nonlinear identification. RBFNN with Gaussian Function as the basis function is considered for classification purpose. Training is done offline using K-means clustering method for center learning and Pseudo inverse for weight adjustments. Offline training is done since the objective function with any fixed set of weights can be computed and we can see whether we make any progress in training. Moreover, minimum of the objective function can be computed to any desired precision, while with online training none of these can be done and it is more difficult and unreliable. In this paper we provide the comparison of RBFNN implementation on FPGAs using soft core processor based multi-processorsystem versus a network of HyperCells [8], [13]. Next we propose three different partitioning structures (Linear, Tree and Hybrid) for the implementation of RBFNN of large dimensions. Our results show that implementation of RBFNN on a network of HyperCells using Hybrid Structure, has on average 26x clock cycle reduction and 105X improvement in the performance over that of multiprocessorsystem on FPGAs.
multi-rotor Unmanned Aerial Vehicles (UAVs) are interesting for commercial as well as for private use. Simple tasks like aerial photography are well known, but nowadays new scenarios, like on-board video processing or...
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ISBN:
(纸本)9781479944309
multi-rotor Unmanned Aerial Vehicles (UAVs) are interesting for commercial as well as for private use. Simple tasks like aerial photography are well known, but nowadays new scenarios, like on-board video processing or complex sensor data processing, are gaining in importance. These scenarios require high-performance on-board processing which is not available in most of today's avionics architectures for civilian multi-rotor systems. Due to the limited installation space and weight requirements, the usage of highly integrated multi-processorsystem on chips (MPSoCs), capable to implement real-time critical flight control algorithms and compute intensive custom payload functions is appealing. This paper presents fundamental requirements on the architecture and flight control algorithms of existing autonomously flying commercial multi-rotor UAVs. On this basis a new approach for an avionics architecture using the Xilinx ZYNQ (MPSoC) is proposed. In combination with the presentation of the proposed architecture new challenges will be discussed that result from the integration of mixed-critical applications on a single chip.
system level modeling and design space exploration has an important role in multiprocessor embedded system on chip design. Y-chart modeling is a well-known method for solving design space exploration problem. One of ...
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ISBN:
(纸本)9781424497898
system level modeling and design space exploration has an important role in multiprocessor embedded system on chip design. Y-chart modeling is a well-known method for solving design space exploration problem. One of the most important stages in Y-chart approach is mapping an application onto architecture. In this paper, MOPSO algorithm has been proposed to obtain optimized solutions for mapping. The proposed method is tested using the MPEG application as a case study in terms of accuracy and efficiency. Simulation results show that proposed algorithm will provide the designer with accurate solutions with a considerable reduction in design time. Finally, a number of multi objective optimization results are simulated and verified by the Sesame framework.
system level modeling and design space exploration has an important role in multiprocessor embedded system on chip design. Y-chart modeling is a well-known method for solving design space exploration problem. One of ...
详细信息
ISBN:
(纸本)9781424497881;9781424497898
system level modeling and design space exploration has an important role in multiprocessor embedded system on chip design. Y-chart modeling is a well-known method for solving design space exploration problem. One of the most important stages in Y-chart approach is mapping an application onto architecture. In this paper, MOPSO algorithm has been proposed to obtain optimized solutions for mapping. The proposed method is tested using the MJPEG application as a case study in terms of accuracy and efficiency. Simulation results show that proposed algorithm will provide the designer with accurate solutions with a considerable reduction in design time. Finally a number of multi objective optimization results are simulated and verified by the Sesame framework.
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