检索结果-内蒙古大学图书馆

BrainS: Customized multi-core embedded multiple scale neuromorphic system

NEURAL NETWORKS 2023年第1期165卷 381-392页

作者： Gong, Bo Wang, Jiang Lu, Meili Meng, Gong Sun, Kai Chang, Siyuan Zhang, Zhen Wei, Xile Tianjin Univ Sch Elect & Informat Engn Tianjin 300072 Peoples R China Tianjin Univ Technol & Educ Sch Informat Technol Engn Tianjin 300222 Peoples R China Beijing Aerosp Automat Control Inst Beijing 100854 Peoples R China

Research on modeling and mechanisms of the brain remains the most urgent and challenging task. The customized embedded neuromorphic system is one of the most effective approaches for multi-scale simulations ranging from ion channel to network. This paper proposes BrainS, a scalable multicore embedded neuromorphic system capable of accommodating massive and large-scale simulations. It is designed with rich external extension interfaces to support various types of input/output and communication requirements. The 3D mesh-based topology with an efficient memory access mechanism makes exploring the properties of neuronal networks possible. BrainS operates at 168 MHz and contains a model database ranging from ion channel to network scale within the Fundamental Computing Unit (FCU). At the ion channel scale, the Basic Community Unit (BCU) can perform realtime simulations of a Hodgkin-Huxley (HH) neuron with 16000 ion channels, using 125.54 KB of the SRAM. When the number of ion channels is within 64000, the HH neuron is simulated in real-time by 4 BCUs. At the network scale, the basal ganglia-thalamus (BG-TH) network consisting of 3200 Izhikevich neurons, providing a vital motor regulation function, is simulated in 4 BCUs with a power consumption of 364.8 mW. Overall, BrainS has an excellent performance in real-time and flexible configurability, providing an embedded application solution for multi-scale simulation.& COPY;2023 Elsevier Ltd. All rights reserved.

关键词： Neuromorphic hardware multi-scale simulations multi-core embedded system Real-time system

来源：评论

学校读者我要写书评

暂无评论

High-speed video haze removal algorithm for embedded systems

引用

JOURNAL OF REAL-TIME IMAGE PROCESSING 2019年第4期16卷 1117-1128页

作者： El-Hashash, Mostafa M. Aly, Hussein A. Mil Tech Coll Comp Dept Cairo Egypt

In this paper, we implemented a video haze removal system that runs in real time and can be integrated in a vehicle dashboard to assist drivers. We used a heterogeneous TI TMS320DM6446 platform to distribute the algorithmic tasks among ARM, DSP, and VICP cores. Our processing algorithm uses the dark channel prior and has been applied to video. It has two algorithmic components which are the operation on multi-scale resolution and a new reconstruction formula for recovering the scene radiance to save computational time without sacrificing quality. We achieved eight frames per second at 720x480 video frame resolution.

关键词： Real-time video processing multi-core embedded system DM6446 Haze removal Dark channel prior

来源：评论

学校读者我要写书评

暂无评论

Implementation of multi-core embedded system on Compound Guidance system

Implementation of Multi-core Embedded System on Compound Gui...

引用

IEEE International Conference on Electronics, Communications and Control (ICECC)

作者： Chen, He Yin, Liang Peng, Guihua Beijing Inst Technol Sch Informat & Elect Beijing 100081 Peoples R China

ISBN: (纸本)9781457703218

In this paper the architecture and single-chip integration technology of multi-source information fusion processor for the application of millimeter wave/infrared (MMW/IR) compound guidance seeker are researched. Some key technologies of multi-core embedded system have been resolved. Information processing integrated system based on SoPC is built according to MMW/IR seeker specific applications. A large number of simulation and experiment results show that this system architecture is effective and robust. The system model has a strong generality and compatibility which can be extended to other multi-mode compound guidance systems.

关键词： MMW/IR compound guidance signal processing multi-core embedded system SoPC (system on a programmable chip) signal-chip integration technology data fusion

来源：评论

学校读者我要写书评

暂无评论

Automatic Facial Expression Exaggeration system with Parallelized Implementation on a multi-core embedded Computing Platform

引用

JOURNAL OF SIGNAL PROCESSING systemS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2014年第2期75卷 155-168页

作者： Su, Te-Feng Duan, Chih-Hsueh Wang, Shu-Fan Lee, Yu-Tzu Lai, Shang-Hong Natl Tsing Hua Univ Dept Comp Sci Hsinchu 30043 Taiwan Natl Tsing Hua Univ Inst Informat Syst & Applicat Hsinchu Taiwan

In this paper, we propose an automatic facial expression exaggeration system, which consists of face detection, facial expression recognition, and facial expression exaggeration components, for generating exaggerated views of different expressions for an input face video. In addition, the parallelized algorithms for the automatic facial expression exaggeration system are developed to reduce the execution time on a multi-core embedded system. The experimental results show satisfactory expression exaggeration results and computational efficiency of the automatic facial expression exaggeration system under cluttered environments. The quantitative experimental comparisons show that the proposed parallelization strategies provide significant computational speedup compared to the single-processor implementation on a multi-core embedded platform.

关键词： Face detection Facial expression recognition Facial expression exaggeration multi-core embedded system

来源：评论

学校读者我要写书评

暂无评论

Dithering-based Power and Thermal Management on FPGA-based multi-core embedded systems 13

Dithering-based Power and Thermal Management on FPGA-based M...

引用

13th International Conference on embedded and Ubiquitous Computing (EUC 2015)

作者： Christoforakis, Ioannis Tomoutzoglou, Othon Bakoyiannis, Dimitrios Kornaros, George Technol Educ Inst Crete Dept Informat Engn Iraklion Crete Greece

ISBN: (纸本)9781467382991

In this paper, we describe the design of a heterogeneous island-based network-on-chip to achieve a power- and thermal-aware coherent system. To this end we utilize different management techniques which employ dynamic frequency scaling circuitry and continuous monitoring through power and temperature sensors per node for dynamic control of workloads. Both monitoring functions and response mechanisms can be engaged in distributed and in centralized mode. The developed multi-core architecture on a multi-FPGA platform employes a hierarchical memory model and supports a multi-threaded general-purpose processor together with many soft-core accelerators per node with independent dynamic frequency scaling per core. Utilizing on-line monitoring we propose a novel response mechanism using a distributed power management algorithm to evenly reduce and normalize power transients.

关键词： Dynamic Power Thermal Management multi-core embedded system Thermal management Reaction Mechanisms management technique Energy sources dynamic frequency Line of nodes dynamic control ON-LINE MONITORS Power (Psychology) Workload Temperature Sensor Device Component Distribute Continuous monitoring embedded systems power

来源：评论

学校读者我要写书评

暂无评论

A Video Haze Removal system on Heterogeneous cores

A Video Haze Removal System on Heterogeneous Cores

引用

3rd IEEE Global Conference on Signal and Information Processing (GlobalSIP)

作者： El-Hashash, Mostafa M. Aly, Hussein A. Mahmoud, Tarek A. Swelam, W. Mil Tech Collage Cairo Egypt

ISBN: (纸本)9781479975914

In this paper, we propose a video haze removal system that can be used to assist vehicle drivers and autonomous vehicles in hazy weather conditions. Our design objectives are to provide a high-speed system with high perceived resolution that can be integrated in vehicle dashboard. We achieved these objectives by targeting TMS320DM6446 platform, where we propose a distribution of the tasks of the algorithm among the heterogeneous processor cores: ARM, DSP, and VICP. We use the dark channel prior for haze removal applied to video and propose to modify it to operate on lower-scale resolution to save computational time without scarifying quality by a careful signal processing view of the algorithm. We implemented the system and were able to achieve 3 frames per second for full D1 (720x480) resolution.

关键词： real-time video processing multi-core embedded system DaVinci DM6446 haze removal dark channel prior

来源：评论

学校读者我要写书评

暂无评论

A Video Haze Removal system on Heterogeneous cores

A Video Haze Removal System on Heterogeneous Cores

引用

IEEE Global Conference on Signal and Information Processing

作者： Mostafa M. El-Hashash Hussein A. Aly Tarek A. Mahmoud W. Swelam Military Technical Collage Cairo Egypt

ISBN: (纸本)9781479975921

关键词： real-time video processing multi-core embedded system DaVinci DM6446 haze removal dark channel prior

来源：评论

学校读者我要写书评

暂无评论

PARALLELIZED RANDOM WALK ALGORITHM FOR BACKGROUND SUBSTITUTION ON A multi-core embedded PLATFORM

PARALLELIZED RANDOM WALK ALGORITHM FOR BACKGROUND SUBSTITUTI...

引用

IEEE International Conference on Acoustics, Speech and Signal Processing

作者： Lee, Yutzu Chiang, Chen-Kuo Sun, Yu-Wei Su, Te-Feng Lai, Shang-Hong Natl Tsing Hua Univ Inst Informat Syst & Applicat Hsinchu Taiwan Natl Tsing Hua Univ Dept Comp Sci Hsinchu Taiwan

ISBN: (纸本)9781467300469

Random Walk (RW) is a popular algorithm and can be applied to many applications in computer vision. In this paper, a fast algorithm is proposed to solve the large linear system in RW based on adapting the Gauss-Seidel method on a multi-core embedded system. Two tables, TYPE and INDEX, are introduced to fast locate the required data for the close-form solution. The computational overhead, along with the memory requirement, to solve the linear system can be reduced greatly, thus making the RW algorithm feasible to many applications on an embedded system. In addition, the proposed fast method is parallelized for a heterogeneous multi-core embedded platform to make the most use of the benefits of the system architecture. Experimental results show that the computational overhead can be significantly reduced by the proposed algorithm.

关键词： Random walk image segmentation background substitution parallelization multi-core embedded system

来源：评论

学校读者我要写书评

暂无评论

A soft multi-core architecture for edge detection and data analysis of microarray images

引用

JOURNAL OF systemS ARCHITECTURE 2010年第1期56卷 48-62页

作者： Kornaros, George Tech Univ Crete Dept Elect & Comp Engn Kounoupidiana Chania Greece Inst Educ Technol Appl Informat & Multimedia Dept Iraklion Greece

As configurable processing advances, elements from the traditional approaches of both hardware and software development can be combined by incorporating customized, application-specific computational resources into the processor's architecture, especially in the case of field-programmable-gate-array-based systems with soft-processors, so as to enhance the performance of embedded applications. This paper explores the use of several different microarchitectural alternatives to increase the performance of edge detection algorithms, which are of fundamental importance for the analysis of DNA microarray images. Optimized application-specific hardware modules are combined with efficient parallellized software in an embedded soft-core-based multi-processor. It is demonstrated that the performance of one common edge detection algorithm, namely Sobel, can be boosted remarkably. By exploiting the architectural extensions offered by the soft-processor, in conjunction with the execution of carefully selected application-specific instruction-set extensions on a custom-made accelerating co-processor connected to the processor core, we introduce a new approach that makes this methodology noticeably more efficient across various applications from the same domain, which are often similar in structure. With flexibility to update the processing algorithms, an improvement reaching one order of magnitude over all-software solutions could be obtained. In support of this flexibility, an effective adaptation of this approach is demonstrated which performs real-time analysis of extracted microarray data;the proposed reconfigurable multi-core prototype has been exploited with minor changes to achieve almost 5x speedup. (C) 2009 Elsevier B.V. All rights reserved.

关键词： DNA microarray Edge detection multi-core embedded system system-on-Chip multi-processing Reconfigurable architecture Co-processor accelerator

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：