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neural signal processing for Closed-loop Neuromodulation

BIOMEDICAL ENGINEERING LETTERS 2016年第3期6卷 113-122页

作者： Cha, Kwang Su Yeo, Donghoon Kim, Kyung Hwan Yonsei Univ Coll Hlth Sci Dept Biomed Engn Wonju 26493 South Korea

Purpose The purpose of this article is to provide an overview of the current status of neural signal processing techniques for closed-loop neuromodulation. Methods First we described overall structure of closed-loop neuromodulation systems. Then, the techniques for the stimulus artifact removal were explained, and the methods for neural state monitoring and biomarker extraction were described. Finally, the current status of neuromodulation based on neural signal processing was provided in detail. Results Closed-loop neuromodulation system automatically adjusts stimulation parameters based on the brain response in real time. Adequate tools for signal sensing and signal processing can be used to obtain meaningful biomarkers reflecting the state of neural systems. Especially, an appropriate neural signal processing technique can optimize the details of stimulation for effective treatment of target disease. Conclusions neural signal-based biomarkers reflecting the pathophysiological statuses of patients are essential for closed-loop neuromodulation, and they should be developed from an understanding of the relationship between clinical states and neural signals.

关键词： Closed-loop neuromodulation neural signal processing Deep brain stimulation Treatment Biomarker Local field potential Single unit activity

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A digital multichannel neural signal processing system using compressed sensing

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DIGITAL signal processing 2016年 55卷 64-77页

作者： Li, Nan Osborn, Morgan Wang, Guoxing Sawan, Mohamad Polytech Montreal Dept Elect Engn Polystim Neumtechnol Lab 2900 Edouard Monpetit Montreal PQ H3T 1J4 Canada Shanghai Jiao Tong Univ Sch Microelect Dept Micro Nano Elect Dongchuan Rd 800 Shanghai 200240 Peoples R China

This paper concerns a wireless multichannel neural recording system using a compressed sensing technique to compress the recorded data. We put forth a single and a multichannel system applying a Minimum Euclidean or Manhattan Distance Cluster-based (MDC) deterministic compressed sensing matrix. The single-channel signal processing system is composed of spike detection and data compression blocks. For the construction of the MDC matrix, the distance sigma is an important parameter, which can take a value of 4 or 5. In addition, the sharing strategy is used to construct a multichannel system, and we analyze the influence of the number of the channels;scan rate on the reconstruction error, compression rate and power consumption;the influence of the signal-to-noise ratio;and reconstruction performance on neural signals. Based on the results, a 256-channel digital signal processing system, implemented in a 130-nm CMOS process, is proposed. This system has power consumption per channel of 12.5 IsW and silicon area per channel of 0.03 mm(2), and provides data reduction of around 90% while enabling accurate reconstruction of the original signals. (C) 2016 Elsevier Inc. All rights reserved.

关键词： Multichannel neural recording neural signal processing Data compression Compressed sensing DSP VLSI

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Systematic analysis of wavelet denoising methods for neural signal processing

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JOURNAL OF neural ENGINEERING 2020年第6期17卷 066016-066016页

作者： Baldazzi, Giulia Solinas, Giuliana Del Valle, Jaume Barbaro, Massimo Micera, Silvestro Raffo, Luigi Pani, Danilo Univ Genoa Dept Informat Bioengn Robot & Syst Engn DIBRIS Genoa Italy Univ Cagliari Dept Elect & Elect Engn DIEE Cagliari Italy Univ Sassari Dept Biomed Sci Sassari Italy Univ Autonoma Barcelona Dept Cell Biol Physiol & Immunol Inst Neurosci Bellaterra Spain CIBERNED Bellaterra Spain Scuola Super Sant Anna BioRobot Inst Pisa Italy Scuola Super Sant Anna Dept Excellence Robot & Artificial Intelligence Pisa Italy Ecole Polytech Fed Lausanne Ctr Neuroprosthet Bertarelli Fdn Chair Lausanne Switzerland Ecole Polytech Fed Lausanne Inst Bioengn Sch Engn Lausanne Switzerland

Objective. Among the different approaches for denoising neural signals, wavelet-based methods are widely used due to their ability to reduce in-band noise. All wavelet denoising algorithms have a common structure, but their effectiveness strongly depends on several implementation choices, including the mother wavelet, the decomposition level, the threshold definition, and the way it is applied (i.e. the thresholding). In this work, we investigated these factors to quantitatively assess their effects on neural signals in terms of noise reduction and morphology preservation, which are important when spike sorting is required downstream. Approach. Based on the spectral characteristics of the neural signal, according to the sampling rate of the signals, we considered two possible decomposition levels and identified the best-performing mother wavelet. Then, we compared different threshold estimation and thresholding methods and, for the best ones, we also evaluated their effect on clearing the approximation coefficients. The assessments were performed on synthetic signals that had been corrupted by different types of noise and on a murine peripheral nervous system dataset, both of which were sampled at about 16 kHz. The results were statistically analysed in terms of their Pearson's correlation coefficients, root-mean-square errors, and signal-to-noise ratios. Main results. As expected, the wavelet implementation choices greatly influenced the processing performance. Overall, the Haar wavelet with a five-level decomposition, hard thresholding method, and the threshold proposed by Han et al (2007) achieved the best outcomes. Based on the adopted performance metrics, wavelet denoising with these parametrizations outperformed conventional 300-3000 Hz linear bandpass filtering. Significance. These results can be used to guide the reasoned and accurate selection of wavelet denoising implementation choices in the context of neural signal processing, particularly when spike-mor

关键词： neural signal processing wavelet denoising spike sorting

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A 400 MHz Wireless neural signal processing IC With 625x On-Chip Data Reduction and Reconfigurable BFSK/QPSK Transmitter Based on Sequential Injection Locking

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IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS 2017年第3期11卷 547-557页

作者： Teng, Kok-Hin Wu, Tong Liu, Xiayun Yang, Zhi Heng, Chun-Huat Natl Univ Singapore Elect & Comp Engn Singapore 117583 Singapore Univ Minnesota Twin Cities Biomed Engn Minneapolis MN 55414 USA

An 8-channel wireless neural signal processing IC, which can perform real-time spike detection, alignment, and feature extraction, and wireless data transmission is proposed. A reconfigurable BFSK/QPSK transmitter (TX) at MICS/MedRadio band is incorporated to support different data rate requirement. By using an Exponential Component-Polynomial Component (EC-PC) spike processing unit with an incremental principal component analysis ( IPCA) engine, the detection of neural spikes with poor SNR is possible while achieving 625x data reduction. For the TX, a dual-channel at 401 MHz and 403.8 MHz are supported by applying sequential injection locked techniques while attaining phase noise of -102 dBc/Hz at 100 kHz offset. From the measurement, error vector magnitude (EVM) of 4.60%/9.55% with power amplifier (PA) output power of -15 dBm is achieved for the QPSK at 8 Mbps and the BFSK at 12.5 kbps. Fabricated in 65 nm CMOS with an active area of 1 mm(2), the design consumes a total current of 5 similar to 5.6 mA with a maximum energy efficiency of 0.7 nJ/b.

关键词： Exponential component-polynomial component (EC-PC) feature extraction incremental principal component analysis (IPCA) injection locking neural signal processing reconfigurable spike detection spike sorting transmitter

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neural Parallel Engine: A toolbox for massively parallel neural signal processing

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JOURNAL OF NEUROSCIENCE METHODS 2018年第0期301卷 18-33页

作者： Tam, Wing-kin Yang, Zhi Natl Univ Singapore NUS Grad Sch Integrat Sci & Engn Singapore Singapore Univ Minnesota Twin Cities Dept Biomed Engn Minneapolis MN 55455 USA

Background: Large-scale neural recordings provide detailed information on neuronal activities and can help elicit the underlying neural mechanisms of the brain. However, the computational burden is also formidable when we try to process the huge data stream generated by such recordings. New method: In this study, we report the development of neural Parallel Engine (NPE), a toolbox for massively parallel neural signal processing on graphical processing units (CPUs). It offers a selection of the most commonly used routines in neural signal processing such as spike detection and spike sorting, including advanced algorithms such as exponential-component-power-component (EC-PC) spike detection and binary pursuit spike sorting. We also propose a new method for detecting peaks in parallel through a parallel compact operation. Results: Our toolbox is able to offer a 5x to 110x speedup compared with its CPU counterparts depending on the algorithms. A user-friendly MATLAB interface is provided to allow easy integration of the toolbox into existing workflows. Comparison with existing methods: Previous efforts on GPU neural signal processing only focus on a few rudimentary algorithms, are not well-optimized and often do not provide a user-friendly programming interface to fit into existing workflows. There is a strong need for a comprehensive toolbox for massively parallel neural signal processing. Conclusions: A new toolbox for massively parallel neural signal processing has been created. It can offer significant speedup in processing signals from large-scale recordings up to thousands of channels. (C) 2018 Elsevier B.V. All rights reserved.

关键词： Massively parallel signal processing neural signal processing Spike detection Spike sorting

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A Custom dual-processor System for Real-time neural signal processing

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IFAC-PapersOnLine 2016年第25期49卷 61-67页

作者： Meloni, Paolo Rubattu, Claudio Tuveri, Giuseppe Raffo, Luigi Dipartimento Ingegneria Elettrica ed Elettronica Universitá degli Studi di Cagliari Cagliari09123 Italy

This paper presents a custom dual-processor SoC architecture, studied and customized to support information extraction from signals acquired from Peripheral neural System, for prosthetic applications. The main tasks accomplished by the processing implemented on the computing platform are noise removal and identification of neural spikes. On-board execution of such tasks allows to identify which samples actually contain useful information. Thus, it reduces required input/output bandwidth, so that connection to the external environment can be implemented using a Bluetooth Low Energy device. The overall SoC architecture has power consumption compliant with implant-related constraints with a battery lifetime of around one-day. © 2016

关键词： System-on-chip Bluetooth Digital signal processing Programmable logic controllers ASIP Bluetooth le Bluetooth low energies (BTLE) Dual processor systems External environments Input/output bandwidths neural signal processing neural signals

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Impact of Threshold Computation Methods in Hardware Wavelet Denoising Implementations for neural signal processing 7th

Impact of Threshold Computation Methods in Hardware Wavelet ...

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5th International Conference on Bioinformatics Models, Methods and Algorithms (BIOINFORMATICS) is part of 7th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC)

作者： Carta, Nicola Pani, Danilo Raffo, Luigi Univ Cagliari DIEE Deptartment Elect & Elect Engn Via Marengo 3 I-09123 Cagliari Italy

ISBN: (纸本)9783319261294;9783319261287

Wavelet denoising effectiveness has been proven in neural signal processing applications characterized by a low SNR. This non-linear approach is implemented through the application of some thresholds on the detail signals coming from a sub-band decomposition. The computation of the thresholds could exhibit a high latency when involving some estimators such as the Median Absolute Deviation (MAD), which is critical for real-time applications. When a VLSI implementation is pursued for low-power purposes, such as in the neuroprosthetic field, these aspects cannot be overlooked. This paper presents an analysis of the main VLSI hardware implementation figures related to this specific aspect of the signal denoising by wavelet processing. Xilinx System Generator has been exploited as a design and co-simulation tool to ease the hardware development on off-the-shelf FPGA platforms. The MAD estimator has been both combinatorially and sequentially implemented, and compared against the sample standard deviation. The study reveals similar performance on the neural signals but dramatically worse implementation figures for the MAD. The combinatorial version of the MAD actually prevents an efficient implementation on medium-small devices. This result is important to perform a correct implementation choice for implantable real-time systems, where the device size is relevant for an usable realization.

关键词： Wavelet denoising neural signal processing FPGA Design tools

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pyNeurode: a real-time neural signal processing framework

pyNeurode: a real-time neural signal processing framework

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Tam, Wing-Kin Nolan, Matthew F. Univ Edinburgh Ctr Discovery Brain Sci Edinburgh Midlothian Scotland Univ Edinburgh Simons Initiat Developing Brain Edinburgh Midlothian Scotland

ISBN: (纸本)9781665484855

Accurate decoding of neural signals often requires assigning extracellular waveforms acquired on the same electrode to their originating neurons, a process known as spike sorting. While many offline sorters are available, accurate online sorting of spikes with many channels is still a challenging problem. Existing online sorters either use simple algorithms with low accuracy, can only process a handful of channels, or depend on a complex runtime environment that is difficult to set up. We have developed a state-of-the-art online spike sorting platform in Python that enables large-scale, fully automatic real-time spike sorting and decoding on hundreds of channels. Our system is cross-platform and works seamlessly with the Open Ephys suite of open-source hardware and software widely used in many neuroscience laboratories worldwide. It also comes with a user-friendly graphical user interface to monitor the cluster quality, spike waveforms and neuronal firing rate. Our platform has comparable accuracy to offline sorters and can achieve an end-to-end sorting latency of around 160 ms for 128-channel signals. It will be useful for research in fundamental neuroscience, closed-loop feedback neuromodulation and brain-computer interfaces.

关键词： spike sorting neural signal processing braincomputer interface

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Low-Power Linear-Phase Delay Filters for neural signal processing: Comparison and Synthesis

Low-Power Linear-Phase Delay Filters for Neural Signal Proce...

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IEEE International Symposium on Circuits and Systems (ISCAS 2009)

作者： Gosselin, Benoit Zbrzeski, Adeline Sawan, Mohamad Kerherve, Eric Ecole Polytech Polystim Neurotechnol Lab Montreal PQ H3C 3A7 Canada Univ Bordeaux IMS Lab Bordeaux France

ISBN: (纸本)9781424438273

We present the design and implementation of linear-phase delay filters for ultra-low power neural signal processing. The filters are intended to implement a low-distortion delay element for automatic biopotential detection in neural recording implants. Continuous-time OTA-C filters are used to realize a 9(th)-order equiripple transfer function presenting a constant group delay. This analog delay allows to process neural waveforms with reduced overhead compared with digital delays. An allpass transfer function is used to implement such analog delay because it achieves wider constant-delay bandwidth than all-pole does. Two filters realizations are compared for implementing it: the Cascaded structure and the Inverse follow-the-leader feedback filter. Their respective strengths and drawbacks are assessed by modeling parasitics and non-idealities of OTAs, and using transistor-level simulations. A power budget of 200 nA is used in both filters. Experimental measurements with the chosen topology are presented and discussed.

关键词： neural signal processing Neuroprosthetics Linear-phase delay filter Cascaded filter Inverse Follow-the-Leader Feedback Ultra-low power OTA-C filters

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A 400-MHz Wireless neural signal processing IC with 625x On-Chip Data Reduction and Reconfigurable BFSK/QPSK Transmitter Based on Sequential Injection Locking 11

A 400-MHz Wireless Neural Signal Processing IC with 625x On-...

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IEEE Asian Solid-State Circuits Conference (A-SSCC)

作者： Teng, Kok-Hin Wu, Tong Yang, Zhi Heng, Chun-Huat Liu, Xiayun Natl Univ Singapore Dept Elect & Comp Engn Singapore Singapore Xilinx Asia Pacific Singapore Singapore

ISBN: (纸本)9781467371919

An 8-channel wireless neural signal processing IC, which can perform real-time spike detection, alignment, feature extraction, and wireless data transmission is proposed. A reconfigurable BFSK/QPSK TX at MICS band is incorporated to support different data rate requirement. By using Exponential Component-Polynomial Component (EC-PC) spike processing unit with incremental principal component analysis (IPCA) engine, an overall 625x data reduction is achieved. The EC-PC unit is capable of detecting neural spikes of poor SNR. In TX, dual channels at 401 MHz and 403.8 MHz are supported by applying fixed injection and sequential injection locked techniques while attaining phase noise of -102 dBc/Hz@100 kHz offset. The measured EVM of 4.60%/9.55% with PA output power of -15dBm is achieved for QPSK@8 Mbps and BFSK@12.5 kbps. Fabricated in 65 nm CMOS with an area occupation of 1 mm(2), the design consumes a total current of 5 similar to 5.6 mA with maximum energy efficiency of 0.7 nJ/b.

关键词： EC-PC neural signal processing transmitter injection locking reconfigurable

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