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Investigation of the Performance of nikhilam Multiplication algorithm

Procedia - Social and Behavioral Sciences 2015年 195卷 1959-1965页

作者： Can Eyupoglu Istanbul Commerce University Faculty of Engineering and Design Department of Computer Engineering Istanbul 34840 Turkey

Multiplication is one of the most important operations in computer arithmetic. Multiplication is used in many operations such as squaring, division and computing reciprocal. Moreover, multiplication is a very significant arithmetic operation for lots of signal processing applications which are convolution, correlation, frequency analysis, image processing etc. The efficiency of multiplication operation is crucial for the process time of these applications. nikhilam algorithm is one of the algorithms developed for increasing the efficiency and reducing the cost in order to simplify multiplication. In this work, the performance of nikhilam multiplication algorithm is analyzed in terms of the number of multiplication and the total process time for different bit lengths.

关键词： Computer Arithmetic Multiplication nikhilam algorithm

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FPGA Implementation of Conventional and Vedic algorithm for Energy Efficient Multiplier

FPGA Implementation of Conventional and Vedic Algorithm for ...

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IEEE International Conference on Energy Systems and Applications (ICESA)

作者： Patil, Hemangi P. Sawant, S. D. NBN Singhgad Sch Engn E&TC Dept Pune Maharashtra India

ISBN: (纸本)9781467368179

Digital Signal Processor (DSP) as well as other microcontroller applications requires fast and low power consumption systems to compete with the advanced technology. The performance of the DSP applications mainly depends on the multiplier, because the multiplication requires more iterations, long time and large area of the system than other computations. Hence to improve the performance of the system it is required to have high speed and low power consumption multiplier. In this paper we proposed the comparative study of two different algorithms, first one is the conventional method called as "Booth Multiplier" and other is the vedic method "nikhilam Navatascaram Dasatah" using reversible logic gates. Both the multipliers are designed and implemented by using Xilinx 13.2 ISE simulator. Comparative results of both the multipliers are analyzed in terms of delay, area and power consumption.

关键词： booth algorithm computation delay nikhilam algorithm power consumption reversible logic gates vedic mathematics

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Design and Implementation of Energy Efficient Vedic Multiplier using FPGA

Design and Implementation of Energy Efficient Vedic Multipli...

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IEEE International Conference on Information Processing (ICIP)

作者： Patil, Hemangi P. Sawant, S. D. NBN Singhgad Sch Engn E&TC Dept Pune Maharashtra India

ISBN: (纸本)9781467377584

The performance of the DSP applications mainly depends on the multiplier, because the multiplication requires more iterations, long time and large area of the system than other computations. Hence to improve the performance of the system it is required to have high speed and low power consumption multiplier. In this paper we proposed the comparative study of two different algorithms, first one is the conventional method called as "Booth Multiplier" and other is the vedic method "nikhilam Navatascaram Dasatah" using reversible logic gates. Both the multipliers are designed and implemented by using Xilinx 13.2 ISE simulator. Comparative results of both the multipliers are analyzed in terms of delay, area and power consumption.

关键词： Booth algorithm Computation Delay nikhilam algorithm Power Consumption Reversible Logic Gates Vedic Mathematics

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Low Power ALU Design by Ancient Mathematics

Low Power ALU Design by Ancient Mathematics

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2nd International Conference on Computer and Automation Engineering (ICCAE)

作者： Kumar, Anvesh Raman, Ashish Natl Inst Technol VLSI Design Jalandhar Jalandhar India Natl Inst Technol Elect & Commun Dept Jalandhar Jalandhar India

ISBN: (纸本)9781424455690

The ever increasing demand in enhancing the ability of processors to handle the complex and challenging processes has resulted in the integration of a number of processor cores into one chip. Still the load on the processor is not less in generic system. This load is reduced by supplementing the main processor with Co-Processors, which are designed to work upon specific type of functions like numeric computation, Signal Processing, Graphics etc. The speed of ALU depends greatly on the multiplierVedic Mathematics is the ancient system of mathematics which has a unique technique of calculations based on 16 Sutras. Employing these techniques in the computation algorithms of the coprocessor will reduce the complexity, execution time, area, power etc. The ever increasing demand in enhancing the ability of processors to handle the complex and challenging processes has resulted in the integration of a number of processor cores into one chip. Still the load on the processor is not less in generic system. This load is reduced by supplementing the main processor with Co-Processors, which are designed to work upon specific type of functions like numeric computation, Signal Processing, Graphics etc. The speed of ALU depends greatly on the multiplierVedic Mathematics is the ancient system of mathematics which has a unique technique of calculations based on 16 Sutras. Employing these techniques in the computation algorithms of the coprocessor will reduce the complexity, execution time, area, power etc.

关键词： Vedic Mathematics Urdhva Triyakbhyam Sutra nikhilam algorithm

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Small area Reconfigurable FFT Design by Vedic Mathematics

Small area Reconfigurable FFT Design by Vedic Mathematics

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2nd International Conference on Computer and Automation Engineering (ICCAE)

作者： Kumar, Anvesh Raman, Ashish Sarin, R. K. Khosla, Arun Natl Inst Technol VLSI Design Jalandhar Jalandhar India Natl Inst Technol Elect & Commun Dept Jalandhar Jalandhar India

ISBN: (纸本)9781424455690

The Fast Fourier Transform(FFT) is a computationally intensive digital signal processing(DSP) function widely used in applications such as imaging, software-defined radio, wireless communication, instrumentation and machine inspection. Historically, this has been a relatively difficult function to implement optimally in hardware leading many software designers to use digital signal processors in soft implementations. Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculations based on 16 Sutras. Employing these techniques in the computation algorithms of the coprocessor will reduce the complexity, execution time, area, power etc. In this paper reconfigurable FFT is proposed to design by Vedic mathematics. Urdhva tiryakbhyam, being a general multiplication formula, is equally applicable to all cases of multiplication. nikhilam algorithm with the compatibility to different data types.

关键词： urdhva tiryakbhayam nikhilam algorithm reconfigurable FFT

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Small area Reconfigurable FFT Design by Vedic Mathematics

Small area Reconfigurable FFT Design by Vedic Mathematics

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International Conference on Computer and Automation Engineering

作者： Anvesh Kumar Ashish Raman R. K. Sarin Arun Khosla VLSI Design National institute of technology jalandhar Electronics and communication dept. National institute of technology jalandhar

ISBN: (纸本)9781424455690

The Fast Fourier Transform(FFT)is a computationally intensive digital signal processing(DSP) function widely used in applications such as imaging software-defined radio, wireless communication, instrumentation and machine inspection. Historically, this has been a relatively difficult function to implement optimally in hardware leading many software designers to use digital signal processors in soft implementations. Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculations based on 16 Sutras. Employing these techniques in the computation algorithms of the coprocessor will reduce the complexity, execution time, area, power etc. In this paper reconfigurable FFT is proposed to design by Vedic mathematics. Urdhva tiryakbhyam, being a general multiplication formula, is equally applicable to all cases of multiplication. nikhilam algorithm with the compatibility to different data types.

关键词： Urdhva tiryakbhayam nikhilam algorithm Reconfigurable FFT

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