The performance of a single stage amplifier when expressed as a function of designable and technology related parameters can be improved by adjusting the component values and transistor dimensions. In the process to o...
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ISBN:
(纸本)9781509014224
The performance of a single stage amplifier when expressed as a function of designable and technology related parameters can be improved by adjusting the component values and transistor dimensions. In the process to optimize the performance, the corresponding parameters can be expressed in terms of objective function and constraints so as to graphically form a polytope type feasible region. Thereafter, simplex method and interior point based method are used to find an optimal value by traversing through each of the corner point and interior of the polytope formed. Consequently, the amplifier design problem can be realized as a special form of optimization problem called non linear programming (NLP), for which efficient global optimization methods have been developed. The present method yields completely an automated synthesis of single stage amplifiers directly from the specifications. In this paper, the proposed method is first described showing in detail the formulation of the design problem as NLP for a specific amplifier circuit and then applied to a wide variety of amplifier architectures. The optimal trade-off curves related to performance measures such as small signal gain(A(v)), unity gain frequency(UGF), slew rate(SR) and power are derived so as to observe the corresponding dependencies.
In this paper we present a merging procedure which is used to build a consistent description of the European network based on the data provided by the different Transmission System Operators (TSOs). In order to deal w...
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ISBN:
(纸本)9781479976959
In this paper we present a merging procedure which is used to build a consistent description of the European network based on the data provided by the different Transmission System Operators (TSOs). In order to deal with inconsistencies in the data, we introduce a modified Optimal Power Flow (OPF) minimizing the deviation from TSOs data. Results on the European network demonstrate the interest of this approach on real-life cases and illustrate the impact of the deviation measure in the optimization process.
Wheeling is a process of transmitting electric power through the transmission lines governed by a third party. A practical problem is that wheeling from vendor to vendee involves power flows through several intermedia...
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ISBN:
(纸本)9781479941902
Wheeling is a process of transmitting electric power through the transmission lines governed by a third party. A practical problem is that wheeling from vendor to vendee involves power flows through several intermediate networks that is, multi-area wheeling. Each utility involves in part of a more number of wheeling transaction over a few miles or hundreds of miles. A vendor that generates power does not have to own power transmission lines: only a connection to the network or grid. The vendor then pays the owner of the transmission line based on how much power is being moved and how congested the line is. In this paper, the basic objective is to minimize the overall operating cost considering the topological structure of the multi area wheeling. This is addressed as a non-linear optimization problem with linear constraints. The basic Genetic Algorithm is used to solve the above optimization problem.
In this paper, an approach using Hybrid Genetic Algorithm and Particle Swarm Optimization Search (HGAPSO) is proposed for placing Distributed Generators (DGs) in distorted distribution system. The objective is to redu...
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ISBN:
(纸本)9781479923977
In this paper, an approach using Hybrid Genetic Algorithm and Particle Swarm Optimization Search (HGAPSO) is proposed for placing Distributed Generators (DGs) in distorted distribution system. The objective is to reduce the real power loss and average voltage total harmonic distortion (THDv) of the distorted distribution system. A detailed performance analysis is carried out on IEEE 18 bus system to express the effectiveness of the proposed method.
In this paper we present a merging procedure which is used to build a consistent description of the European network based on the data provided by the different Transmission System Operators (TSOs). In order to deal w...
详细信息
In this paper we present a merging procedure which is used to build a consistent description of the European network based on the data provided by the different Transmission System Operators (TSOs). In order to deal with inconsistencies in the data, we introduce a modified Optimal Power Flow (OPF) minimizing the deviation from TSOs data. Results on the European network demonstrate the interest of this approach on real-life cases and illustrate the impact of the deviation measure in the optimization process.
The solution of nonlinear problems are based on very well grounded mathematical theories. This document proposes a Newton step graph-based model for convex nonlinear separable problems (NLP) with linear constraints....
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ISBN:
(纸本)9789881925237
The solution of nonlinear problems are based on very well grounded mathematical theories. This document proposes a Newton step graph-based model for convex nonlinear separable problems (NLP) with linear constraints. The Newton step is well suited for this kind of problems, but when the problem size grows the NLSP model will grow in a nonlinear manner. Furthermore, the constraints handling becomes the main problem as we have to select the right constraints in the different solution steps. When this happens, the sparse matrix representation is the path to follow, but very little has been made in order to fully explode the sparsity structure. Indeed, the Hessian matrix for the NLSP model has a very particular structure which can be exploited by using the graph underlying the problem, this is the approach taken in this document. To this end a graph is built derived from the components involved in the Newton step. which describes the solution for the NLSP problem. Based on this graph, the gradient can be evaluated directly based on the graph topology, as it will be shown, the information needed for such evaluation is embedded within the graph. Furthermore, the explicit graph model derived from the mathematical model allows us to think about it in terms of its structure which will be used in further works.
This paper presents a study of the estimation of potential energy saving in bread baking process using the jet impingement technology. This new technology is developed to increase the heat transfer efficiency during t...
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This paper presents a study of the estimation of potential energy saving in bread baking process using the jet impingement technology. This new technology is developed to increase the heat transfer efficiency during the baking process. Based on a mechanistic heat exchange model identified in the past work, a non convex optimization problem is formulated taking account of a non zero energy cost related to the new technology. The simulation result shows that one can expect to obtain up to 12% of energy saving under some reasonable assumptions.
This paper discusses efficacy issues in software testing strategies through attained failure size. Failure size is the probability of finding an input that causes a failure in the input domain. As testing progresses, ...
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This paper discusses efficacy issues in software testing strategies through attained failure size. Failure size is the probability of finding an input that causes a failure in the input domain. As testing progresses, failure size decreases due to debugging. The failure size at the termination of testing is called the attained failure size. Using this measure, we compare the efficacies of partition testing and random testing, derive conditions that lead to the superiority of partition testing, and obtain optimal time allocations in partition testing. The core findings are presented in a decision tree to assist testers in test management.
Technology scaling has been the most obvious choice of designers and chipmanufacturing companies to improve the performance of analog and digital circuits.With the ever shrinking technological node, process variations...
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Technology scaling has been the most obvious choice of designers and chip
manufacturing companies to improve the performance of analog and digital circuits.
With the ever shrinking technological node, process variations can no longer be ignored
and play a significant role in determining the performance of nanoscaled devices. By
choosing a worst case design methodology, circuit designers have been very munificent
with the design parameters chosen, often manifesting in pessimistic designs with
significant area overheads.
Significant work has been done in estimating the impact of intra-die process
variations on circuit performance, pertinently, noise margin and standby leakage power,
for fixed transistor channel dimensions. However, for an optimal, high yield, SRAM cell
design, it is absolutely imperative to analyze the impact of process variations at every
design point, especially, since the distribution of process variations is a statistically
varying parameter and has an inverse correlation with the area of the MOS transistor.
Furthermore, the first order analytical models used for optimization of SRAM memories
are not as accurate and the impact of voltage and its inclusion as an input, along with
other design parameters, is often ignored.
In this thesis, the performance parameters of a nano-scaled 6-T SRAM cell are
modeled as an accurate, yield aware, empirical polynomial predictor, in the presence of
intra-die process variations. The estimated empirical models are used in a constrained
non-linear, robust optimization framework to design an SRAM cell, for a 45 nm CMOS
technology, having optimal performance, according to bounds specified for the circuit
performance parameters, with the objective of minimizing on-chip area. This statistically aware technique provides a more realistic design methodology to study the trade off
between performance parameters of the SRAM.
Furthermore, a dual optimization approach is followed by considering SRAM
power supply and wordline
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