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Comprehensive analysis of faults and diagnosis techniques in cascaded multi-level inverters

Heliyon 2024年第21期10卷 e39901页

作者： Gatla, Ranjith Kumar Kumar, Devineni Gireesh Shashavali, Palthur Dsnm, Rao Kotb, Hossam Alkuhayli, Abdulaziz Ghadi, Yazeed Yasin Mbasso, Wulfran Fendzi Department of Electrical & Electronics Engineering Institute of Aeronautical Engineering Telangana Dundigal 500043 India Department of Electrical & Electronics Engineering B V Raju Institute of Technology Telangana Narsapur 502313 India Department of EEE S K University College of Engineering & Technology Andhra Pradesh Ananthapuramu 515003 India Department of EEE Gokaraju Rangaraju Institute of Engineering & Technology Telangana Bachupally 500090 India Department of Electrical Power and Machines Faculty of Engineering Alexandria University Alexandria 21544 Egypt Electrical Engineering Department College of Engineering King Saud University Riyadh 11421 Saudi Arabia Department of Computer Science and Software Engineering Al Ain University Abu Dhabi 15322 United Arab Emirates Laboratory of Technology and Applied Sciences University Institute of Technology University of Douala PO Box: 8698 Douala Cameroon

Reliability is a crucial factor to consider for multi-level inverters (MLIs) used in industrial applications. With the increasing number of power semiconductor devices, the potential for defects to significantly degrade the overall system is heightened. A highly effective fault-detection technique is required to minimize the impact of faults. This paper provides a comprehensive overview of the fundamental principles of multi-level inverters and the various sorts of faults that can occur in multi-level inverters. This study provides a comprehensive analysis of five-level cascaded H-bridge multilevel inverters (MLIs) under both normal and defective conditions. The paper outlines a fault-detection method that utilizes total harmonic distortion and a normalized output voltage factor. In addition, the paper discusses a fault-isolation strategy that relies on reducing amplitude modulation. This method leads to the development of a fault-tolerant inverter. The utilization of level-shifted pulse-width modulation (LSPWM) technology is employed for the purpose of switching operations. LSPWM is the most appropriate technique for MLIs that require a low amount of computational resources. The fault-diagnosis approach given is suitable for MLI-based drives, grid-connected operations, and other applications. This paper presents a comprehensive examination of the 5L-CMLI (5-Level Cascaded Multi-Level Inverter) under various fault scenarios in CMLI. Subsequently, various fault diagnosis approaches will be examined, including their advantages and disadvantages. The paper discusses several defects that can occur in the Insulated Gate Bipolar Transistor (IGBT) of a Current Mode Logic Inverter (CMLI), and also presents a design for a reliable fault diagnosis system. Furthermore, this analysis examines several fault detection strategies in CMLI, categorized according to open-loop and closed-loop dynamic systems fault classifications. © 2024 The Authors

关键词： Fault detection Multi-level inverters open-loop and closed-loop systems Total harmonic distortion

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