检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

46 篇 期刊文献
44 篇 会议
1 篇 学位论文

馆藏范围

91 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

87 篇 工学
- 84 篇 计算机科学与技术...
- 22 篇 电气工程
- 17 篇 软件工程
- 2 篇 信息与通信工程
- 1 篇 控制科学与工程
4 篇 理学
- 4 篇 数学
2 篇 管理学
- 2 篇 管理科学与工程(可...

主题

91 篇 parallel program...
7 篇 mpi
7 篇 high performance...
5 篇 parallel program...
5 篇 runtime systems
5 篇 hpc
5 篇 openmp
4 篇 message passing
4 篇 openacc
4 篇 heterogeneous co...
4 篇 cloud computing
4 篇 kokkos
3 篇 component models
3 篇 productivity
3 篇 c plus plus meta...
3 篇 active messages
3 篇 programming
3 篇 signal processin...
3 篇 nested paralleli...
3 篇 embedded systems

机构

4 篇 barcelona superc...
3 篇 evidence srl pis...
3 篇 univ politecn ca...
2 篇 barcelona superc...
2 篇 chapman univ ora...
2 篇 csic iiia artifi...
2 篇 thales res & tec...
2 篇 queens univ belf...
2 篇 swiss fed inst t...
2 篇 nvidia corp sant...
2 篇 univ tennessee c...
2 篇 oak ridge natl l...
2 篇 bsc barcelona
1 篇 univ pisa dipart...
1 篇 univ bologna iis...
1 篇 univ politecn ca...
1 篇 barcelona superc...
1 篇 seoul natl univ ...
1 篇 univ calif davis...
1 篇 sky comput. chel...

作者

8 篇 badia rosa m.
5 篇 labarta jesus
4 篇 gai paolo
4 篇 marongiu andrea
4 篇 ayguade eduard
3 篇 marozzo fabrizio
3 篇 denny joel
3 篇 gonzalez-tallada...
3 篇 quinones eduardo
3 篇 benini luca
3 篇 talia domenico
3 篇 vetter jeffrey s...
3 篇 jimenez-gonzalez...
3 篇 scordino claudio
3 篇 martorell xavier
3 篇 tejedor enric
3 篇 lee seyong
3 篇 filgueras antoni...
3 篇 valero-lara pedr...
3 篇 alvarez carlos

语言

89 篇 英文
1 篇 德文
1 篇 中文

检索条件"主题词=PARALLEL PROGRAMMING MODELS"

共 91 条记录，以下是71-80 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

MC Mutants: Evaluating and Improving Testing for Memory Consistency Specifications 2023

MC Mutants: Evaluating and Improving Testing for Memory Cons...

引用

28th ACM International Conference on Architectural Support for programming Languages and Operating Systems (ASPLOS)

作者： Levine, Reese Guo, Tianhao Cho, Mingun Baker, Alan Levien, Raph Neto, David Quinn, Andrew Sorensen, Tyler UC Santa Cruz Santa Cruz CA 95064 USA NYU New York NY 10003 USA Univ Calif Davis Davis CA USA Google Vancouver BC Canada Google Mountain View CA 94043 USA

ISBN: (纸本)9781450399166

Shared memory platforms provide a memory consistency specification (MCS) so that developers can reason about the behaviors of their parallel programs. Unfortunately, ensuring that a platform conforms to its MCS is difficult, as is exemplified by numerous bugs in well-used platforms. While existing MCS testing approaches find bugs, their efficacy depends on the testing environment (e.g. if synthetic memory pressure is applied). MCS testing environments are difficult to evaluate since legitimate MCS violations are too rare to use as an efficacy metric. As a result, prior approaches have missed critical MCS bugs. This work proposes a mutation testing approach for evaluating MCS testing environments: MC Mutants. This approach mutates MCS tests such that the mutants simulate bugs that might occur. A testing environment can then be evaluated using a mutation score. We utilizeMCMutants in two novel contributions: (1) a parallel testing environment, and (2) An MCS testing confidence strategy that is parameterized over a time budget and confidence threshold. We implement our contributions in WebGPU, a new web-based GPU programming specification, and evaluate our techniques across four GPUs. We improve testing speed by three orders of magnitude over prior work, empowering us to create a conformance test suite that reproduces many mutated tests with high confidence and requires only 64 seconds per test. We identified two bugs in WebGPU implementations, one of which led to a specification change. Moreover, the official WebGPU conformance test suite has adopted our approach due to its efficiency, effectiveness, and broad applicability.

关键词： memory consistency parallel programming models mutation testing

来源：评论

学校读者我要写书评

暂无评论

Expressing Graph Algorithms Using Generalized Active Messages 13

Expressing Graph Algorithms Using Generalized Active Message...

引用

18th ACM SIGPLAN Symposium on Principles and Practice of parallel programming

作者： Edmonds, Nick Willcock, Jeremiah Lumsdaine, Andrew Indiana Univ Bloomington IN 47405 USA

ISBN: (纸本)9781450319225

Recently, graph computation has emerged as an important class of high-performance computing application whose characteristics differ markedly from those of traditional, compute-bound, kernels. Libraries such as BLAS, LAPACK, and others have been successful in codifying best practices in numerical computing. The data-driven nature of graph applications necessitates a more complex application stack incorporating runtime optimization. In this paper, we present a method of phrasing graph algorithms as collections of asynchronous, concurrently executing, concise code fragments which may be invoked both locally and in remote address spaces. A runtime layer performs a number of dynamic optimizations, including message coalescing, message combining, and software routing. Practical implementations and performance results are provided for a number of representative algorithms.

关键词： parallel Graph Algorithms Active Messages parallel programming models

来源：评论

学校读者我要写书评

暂无评论

Enabling Cloud Interoperability with COMPSs

引用

18th International Conference on Euro-Par parallel Processing

作者： Marozzo, Fabrizio Lordan, Francesc Rafanell, Roger Lezzi, Daniele Talia, Domenico Badia, Rosa M. Univ Calabria DEIS I-87036 Arcavacata Di Rende CS Italy Spanish Council Sci Res CSIC Artificial Intelligence Res Inst IIIA Madrid Spain Univ Calabria DEIS Arcavacata Di Rende Italy CNR ICAR Arcavacata Di Rende Italy

ISBN: (纸本)9783642328206

The advent of Cloud computing has given to researchers the ability to access resources that satisfy their growing needs, which could not be satisfied by traditional computing resources such as PCs and locally managed clusters. On the other side, such ability, has opened new challenges for the execution of their computational work and the managing of massive amounts of data into resources provided by different private and public infrastructures. COMP Superscalar (COMPSs) is a programming framework that provides a programming model and a runtime that ease the development of applications for distributed environments and their execution on a wide range of computational infrastructures. COMPSs has been recently extended in order to be interoperable with several cloud technologies like Amazon, OpenNebula, Emotive and other OCCI compliant offerings. This paper presents the extensions of this interoperability layer to support the execution of COMPSs applications into the Windows Azure Platform. The framework has been evaluated through the porting of a data mining workflow to COMPSs and the execution on an hybrid testbed.

关键词： parallel programming models Cloud computing Data mining PaaS

来源：评论

学校读者我要写书评

暂无评论

The AMPERE Project: A Model-driven development framework for highly parallel and EneRgy-Efficient computation supporting multi-criteria optimization 23

The AMPERE Project: A Model-driven development framework for...

引用

IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)

作者： Quinones, Eduardo Royuela, Sara Scordino, Claudio Gai, Paolo Pinho, Luis Miguel Nogueira, Luis Rollo, Jan Cucinotta, Tommaso Biondi, Alessandro Hamann, Arne Ziegenbein, Dirk Saoud, Hadi Soulat, Romain Forsberg, Bjoern Benini, Luca Mando, Gianluca Rucher, Luigi Barcelona Supercomp Ctr Barcelona Spain Evidence Srl Pisa Italy Inst Super Engn Porto Porto Portugal Sysgo Prague Czech Republic Scuola Super Sant Anna Pisa Italy Bosch Stuttgart Germany Thales Res & Technol Palaiseau France Swiss Fed Inst Technol Zurich Switzerland Thales Italy Florence Italy

ISBN: (纸本)9781728169583

The high-performance requirements needed to implement the most advanced functionalities of current and future Cyber-Physical Systems (CPSs) are challenging the development processes of CPSs. On one side, CPSs rely on model-driven engineering (MDE) to satisfy the non-functional constraints and to ensure a smooth and safe integration of new features. On the other side, the use of complex parallel and heterogeneous embedded processor architectures becomes mandatory to cope with the performance requirements. In this regard, parallel programming models, such as OpenMP or CUDA, are a fundamental brick to fully exploit the performance capabilities of these architectures. However, parallel programming models are not compatible with current MDE approaches, creating a gap between the MDE used to develop CPSs and the parallel programming models supported by novel and future embedded platforms. The AMPERE project will bridge this gap by implementing a novel software architecture for the development of advanced CPSs. To do so, the proposed software architecture will be capable of capturing the definition of the components and communications described in the MDE framework, together with the non-functional properties, and transform it into key parallel constructs present in current parallel models, which may require extensions. These features will allow for making an efficient use of underlying parallel and heterogeneous architectures, while ensuring compliance with non-functional requirements, including those on real-time performance of the system.

关键词： parallel programming models parallel and heterogeneous embedded processor architectures model-driven approaches safety-critical embedded systems

来源：评论

学校读者我要写书评

暂无评论

A Runtime Implementation of OpenMP Tasks

A Runtime Implementation of OpenMP Tasks

引用

7th International Workshop on OpenMP (IWOMP)

作者： LaGrone, James Aribuki, Ayodunni Addison, Cody Chapman, Barbara Univ Houston Houston TX 77004 USA Texas Instruments Inc Stafford TX 77477 USA

ISBN: (纸本)9783642214875

Many task-based programming models have been developed and refined in recent years to support application development for shared memory platforms. Asynchronous tasks are a powerful programming abstraction that offer flexibility in conjunction with great expressivity. Research involving standardized tasking models like OpenMP and non-standardized models like Cilk facilitate improvements in many tasking implementations. While the asynchronous task is arguably a fundamental element of parallel programming, it is the implementation, not the concept, that makes all the difference with respect to the performance that is obtained by a program that is parallelized using tasks. There are many approaches to implementing tasking constructs, but few have also given attention to providing the user with some capabilities for fine tuning the execution of their code. This paper provides an overview of one OpenMP implementation, highlights its main features, discusses the implementation, and demonstrates its performance with user controlled runtime variables.

关键词： OpenMP Tasks parallel programming models Runtime Systems

来源：评论

学校读者我要写书评

暂无评论

Communication Avoiding 2D Stencil Implementations over PaRSEC Task-Based Runtime 34

Communication Avoiding 2D Stencil Implementations over PaRSE...

引用

34th IEEE International parallel and Distributed Processing Symposium (IPDPS)

作者： Pei, Yu Cao, Qinglei Bosilca, George Luszczek, Piotr Eijkhout, Victor Dongarra, Jack Univ Tennessee Innovat Comp Lab Knoxville TN 37996 USA Univ Texas Austin Texas Adv Comp Ctr Austin TX USA

ISBN: (纸本)9781728174457

Stencil computation or general sparse matrix-vector product (SpMV) are key components in many algorithms like geometric multigrid or Krylov solvers. But their low arithmetic intensity means that memory bandwidth and network latency will be the performance limiting factors. The current architectural trend favors computations over bandwidth, worsening the already unfavorable imbalance. Previous work approached stencil kernel optimization either by improving memory bandwidth usage or by providing a Communication Avoiding (CA) scheme to minimize network latency in repeated sparse vector multiplication by replicating remote work in order to delay communications on the critical path. Focusing on minimizing communication bottleneck in distributed stencil computation, in this study we combine a CA scheme with the computation and communication overlapping that is inherent in a dataflow task-based runtime system such as PaRSEC to demonstrate their combined benefits. We implemented the 2D five point stencil (Jacobi iteration) in PETSc, and over PaRSEC in two flavors, full communications (base-PaRSEC) and CA-PaRSEC which operate directly on a 2D compute grid. Our results running on two clusters, NaCL and Stampede2 indicate that we can achieve 2X speedup over the standard SpMV solution implemented in PETSc, and in certain cases when kernel execution is not dominating the execution time, the CA-PaRSEC version achieved up to 57% and 33% speedup over base-PaRSEC implementation on NaCL and Stampede2 respectively.

关键词： 2D stencil communication avoiding parallel programming models

来源：评论

学校读者我要写书评

暂无评论

A unified methodology for a fast benchmarking of parallel architecture

A unified methodology for a fast benchmarking of parallel ar...

引用

Design, Automation and Test in Europe Conference and Exhibition (DATE)

作者： Guerre, Alexandre Acquaviva, Jean-Thomas Lhuillier, Yves CEA LIST Embedded Comp Lab F-91191 Gif Sur Yvette France

ISBN: (纸本)9783981537024

Benchmarking of architectures is today jeopardized by the explosion of parallel architectures and the dispersion of parallel programming models. parallel programming requires architecture dependent compilers and languages as well as high programming expertise. Thus, an objective comparison has become a harder task. This paper presents a novel methodology to evaluate and to compare parallel architectures in order to ease the programmer work. It is based on the usage of microbenchmarks, code profiling and characterization tools. The main contribution of this methodology is a semi-automatic prediction of the performance for sequential applications on a set of parallel architectures. In addition the performance estimation is correlated with the cost of other criteria such as power or portability. Our methodology prediction was validated on an industrial application. Results are within a range of 20%.

关键词： benchmark testing parallel architectures parallel programming performance evaluation software tools architecture dependent compilers characterization tools code profiling microbenchmarks parallel architecture benchmarking parallel programming models performance estimation portability programming languages semiautomatic performance prediction sequential applications Benchmark testing Computational modeling Databases Kernel parallel architectures programming

来源：评论

学校读者我要写书评

暂无评论

The Case for Binary Rewriting at Runtime for Efficient Implementation of High-Level programming models in HPC 30

The Case for Binary Rewriting at Runtime for Efficient Imple...

引用

30th IEEE International parallel and Distributed Processing Symposium (IPDPS)

作者： Weidendorfer, Josef Breitbart, Jens Tech Univ Munich Dept Informat Munich Germany

ISBN: (纸本)9781509036820

Implementations of parallel programming models are provided either as language extensions, completely new languages or as a library. The first two options often provides high productivity, but requires the porting of codes. In contrast, calls to new libraries can be added more easily, however the use of abstractions in such programming model implementations can have high runtime overhead. In both cases, the mentioned drawbacks often hinder the adaptation of novel programming models for large existing codes. To combine the advantages of compiler analysis with the composability of pure libraries towards more efficient programming model implementations, in this paper, we propose a low level API for programmer controlled binary rewriting at runtime. This can be used by programming models provided as libraries to efficiently integrate their abstractions with application code. It enables incremental adoption for existing codes as well as favoring input-dependent optimization strategies yet providing similar performance as language extension approaches. We show first promising experiences.

关键词： High Performance Computing parallel programming models Dynamic Optimizations

来源：评论

学校读者我要写书评

暂无评论

sKokkos: Enabling Kokkos with Transparent Device Selection on Heterogeneous Systems using OpenACC 24

sKokkos: Enabling Kokkos with Transparent Device Selection o...

引用

7th International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia)

作者： Valero-Lara, Pedro Lee, Seyong Denny, Joel Teranishi, Keita Vetter, Jeffrey S. Gonzalez-Tallada, Marc Oak Ridge Natl Lab Oak Ridge TN 37830 USA Univ Politecn Cataluna Barcelona Spain

ISBN: (纸本)9798400708893

This paper presents a new feature to enable Kokkos with transparent device selection. For application developers, it is not easy to identify which device is the most appropriate to use in a heterogeneous system, since this depends on the characteristics of both the application and the hardware. In Kokkos, a backend is associated with one specific programming model/hardware. Programmers decide which backend to use at compilation time. This new feature implemented on the OpenACC backend eliminates the burden of deciding which device to use, providing a highly productive programming solution for Kokkos applications. This work includes implementation details and a performance study conducted with a set of mini-benchmarks (i.e., AXPY and dot product), kernels (Lattice-Bolzmann method), and two mini-apps (LULESH and miniFE) on two heterogeneous systems with different hardware capabilities. This new Kokkos feature provides high accelerations of up to 35x thanks to automatic and transparent device selection.

关键词： Kokkos OpenACC C plus plus Metaprogramming Heterogeneous Systems CPU GPU parallel programming models Auto-tuning

来源：评论

学校读者我要写书评

暂无评论

Overlapping Communication and Computation with ExaMPI's Strong Progress and Modern C plus plus Design

Overlapping Communication and Computation with ExaMPI's Stro...

引用

8th Workshop on Exascale MPI (ExaMPI)

作者： Schafer, Derek Hines, Thomas Suggs, Evan Drake Rufenacht, Martin Skjellum, Anthony Univ Tennessee Chattanooga TN 37403 USA Leibniz Supercomp Ctr Bavaria Germany

ISBN: (纸本)9781665411080

ExaMPI is a modern, C++17+ MPI implementation designed for modularity, extensibility, and understandability. In this work, we overview functionality new to ExaMPI since its initial release, including Libfabric-based network transport support. We also explain our rationale for why and how we choose to add new MPI features (and defer others). Lastly, we measured the latency of the aforementioned transports in ExaMPI and found that ExaMPI, while having slightly higher latency than other production MPIs, is competitive. It is no longer uncommon to see MPI applications using extra MPI calls during non-blocking MPI operations to coax MPI's progress engine. Strong, asynchronous progress (aka application bypass) in MPI is instead based on the premise that an application asks MPI to perform a non-blocking communication in the background and MPI completes said communication without requiring any additional MPI calls from the application to advance the underlying transport. Strong progress often requires an additional background thread, but with the current trend in exascale computing, cores appear to be in excess. Indeed, for earlier MPI implementations that supported it well, strong progress enabled overlap and reduced time to completion for some MPI applications. However, enabling or adding strong progress to existing MPI implementations is not straightforward;changing such implementations is cumbersome, difficult, invasive, and time-consuming-a key motivation for our research MPI implementation, ExaMPI. Specifically, we tested the ability for ExaMPI's strong progress engine to enable overlap communication and computation, finding that considerable overlap is achieved without needing additional MPI "helper" calls such as MPI_Test.

关键词： MPI middleware architecture parallel programming models overlap performance portability

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共10页 << < 1 2 3 4 5 6 7 8 9 10 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：