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Monitoring cache behavior on parallel SMP architectures and related programming tools

FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF GRID COMPUTING AND ESCIENCE 2005年第8期21卷 1298-1311页

作者： Brandes, T Schwamborn, H Gerndt, M Jeitner, J Kereku, E Schulz, M Brunst, H Nagel, W Neumann, R Müller-Pfefferkorn, R Trenkler, B Karl, W Tao, J Hoppe, HC Fraunhofer Gesellsch FhG Inst Algorithmen & Wissensch Rechnen SCAI D-53754 At Augustin Germany Tech Univ Munich LRR D-85748 Garching Germany Tech Univ Dresden Zentrum Hochleistungsrechnen ZHR D-01062 Dresden Germany Univ Karlsruhe Inst Rechnerentwurf & Fehlertoleranz D-76128 Karlsruhe Germany Intel GmbH Software & Solut Grp D-50321 Bruhl Germany

This paper describes the ideas and developments of the project EP-CACHE. Within this project new methods and tools are developed to improve the analysis and the optimization of programs for cache architectures, especially for SMP clusters. The tool set comprises the semi-automatic instrumentation of user programs, the monitoring of the cache behavior, the visualization of the measured data, and optimization techniques for improving the user program for better cache usage. As current hardware performance counters do not give sufficient user relevant information, new hardware monitors are designed that provide more detailed information about the cache utilization related to the data structures and code blocks in the user program. The expense of the hardware and software realization will be assessed to minimize the risk of a real implementation of the investigated monitors. The usefulness of the hardware monitors is evaluated by a cache simulator. (c) 2004 Published by Elsevier B.V.

关键词： hardware cache monitoring performance analysis cache optimizations parallel programming tools SMP cluster

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Monitoring cache behavior on parallel SMP architectures and related programming tools

Monitoring cache behavior on parallel SMP architectures and ...

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European Grid Conference

关键词： hardware cache monitoring performance analysis cache optimizations parallel programming tools SMP cluster

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Relative debugging for data parallel programs: A ZPL case study

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IEEE CONCURRENCY 2000年第4期8卷 42-52页

作者： Watson, G Abramson, D Monash Univ Clayton Vic 3168 Australia

Relative debugging is a powerful paradigm that lets us locate errors in programs that result from porting or rewriting code. The authors describe their experience using relative debugging to compare a program written ... 详细信息

关键词： Debugging parallel programming tools Program Development Data parallel Language ZPL Relative Debugging

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Finding, expressing and managing parallelism in programs executed on clusters of workstations

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COMPUTER COMMUNICATIONS 1999年第11期22卷 998-1016页

作者： Goscinski, AM Deakin Univ Sch Comp & Math Geelong Vic 3217 Australia

The goal of this paper to identify and discuss the basic issues of and solutions to parallel processing on clusters of workstations (COWs). Firstly, identification and expressing parallelism in application programs are discussed. The following approaches to finding and expressing parallelism are characterized: parallel programming languages, parallel programming tools, sequential programming supported by distributed shared memory (DSM), and parallelising compilers. Secondly, efficient management of available parallelism is discussed. As parallel execution requires an efficient management of processes and computational resources, a parallel execution environment proposed here is to be built based on a distributed operating system. This system, in order to allow parallel programs to achieve high performance and transparency, should provide services such as global scheduling, process migration, local and remote process creation, computation coordination, group communication and distributed shared memory. (C) 1999 Elsevier Science B.V. All rights reserved.

关键词： parallel programming languages parallel programming tools DSM parallelizing compilers parallelism management distributed operating systems supporting parallelism management

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PPT - A parallel programming TOOL FOR DISTRIBUTED-MEMORY MULTIPROCESSORS

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JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS 1995年第3期18卷 365-378页

作者： CHUNG, YC HO, WH LIU, CC Department of Information Engineering and Computer Science Feng Chia University Taichung 407 Taiwan

Traditionally, to program a distributed memory multiprocessor, a programmer is responsible for partitioning an application program into modules or tasks, scheduling tasks on processors, inserting communication primitives, and generating parallel codes for each processor manually. As both the number of processors and the complexity of problems to be solved increases, programming distributed memory multiprocessors becomes difficult and error-prone. In a distributed memory multiprocessor, the program partitioning and scheduling play an important role in the performance of a parallel program. However, how to find the best program partitioning and scheduling so that the best performance of a parallel program on a distributed memory multiprocessor can be achieved, is not an easy task. In this paper, we present a parallel programming tool, PPT, to aid programmers to find the best program partitioning and scheduling and automatically generate the parallel code for the single program multiple data (SPMD) model on a distributed memory multiprocessor. An example of designing a parallel FFT program by using PPT on an NCUBE-2 is also presented.

关键词： SPMD DISTRIBUTED MEMORY MULTIPROCESSORS parallel programming tools PROGRAM PARTITIONING SCHEDULING

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Compiler-based tools for analyzing parallel programs

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parallel COMPUTING 1998年第3-4期24卷 401-420页

作者： Armstrong, B Kim, SW Park, I Voss, M Eigenmann, R Purdue Univ Sch Elect & Comp Engn W Lafayette IN 47907 USA

In this paper, we present several tools for analyzing parallel programs. The tools are built on top of a compiler infrastructure, which provides advanced capabilities for symbolic program analysis and manipulation. The tools can display characteristics of a program and relate this information to data gathered from instrumented program runs and other performance analysis tools. They also support an interactive compilation scenario, giving the user feedback on how the compilation process performed and how to improve it. We will present case studies demonstrating the tool use. These include the characterization of an industrial application and the study of new compiler techniques and portable parallel languages. (C) 1998 Elsevier Science B.V. All rights reserved.

关键词： parallelizing compilers parallel programming tools integrated tools program characterization performance analysis

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Heterogeneous distribution of computations solving linear algebra problems on networks of heterogeneous computers

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JOURNAL OF parallel AND DISTRIBUTED COMPUTING 2001年第4期61卷 520-535页

作者： Kalinov, A Lastovetsky, A Russian Acad Sci Inst Syst Programming Moscow 109004 Russia

This paper presents and analyzes two different strategies of heterogeneous distribution of computations solving dense linear algebra problems on heterogeneous networks of computers. The first strategy is based on heterogeneous distribution of processes over processors and homogeneous block cyclic distribution of data over the processes. The second is based on homogeneous distribution of processes over processors and heterogeneous block cyclic distribution of data over the processes. Both strategies were implemented in the mpC language-a dedicated parallel extension of ANSI C for efficient and portable programming of heterogeneous networks of computers. The first strategy was implemented using calls to ScaLAPACK;the second strategy was implemented with calls to LAPACK and BLAS. Cholesky factorization on a heterogeneous network of workstations is used to demonstrate that the heterogeneous distributions have an advantage over the traditional homogeneous distribution (C) 2001 Academic Press.

关键词： parallel programming tools parallel linear algebra software ScaLAPACK heterogeneous computing parallel languages

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A Taxonomy of Modern GPGPU programming Methods: On the Benefits of a Unified Specification

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2022年第6期41卷 1649-1662页

作者： Capodieci, Nicola Cavicchioli, Roberto Marongiu, Andrea Univ Modena & Reggio Emilia Dept Phys Informat & Math I-41121 Modena Italy

Several application programming interfaces (APIs) and frameworks have been proposed to simplify the development of general-purpose GPU (GPGPU) applications. GPGPU application development typically involves specific customization for the target operating systems and hardware devices. The effort to port applications from one API to the other (or to develop multitarget applications) is complicated by the availability of a plethora of specifications, which in essence offers very similar underlying functionality. In this work we provide an in-depth study of six state-of-the-art GPGPU APIs. From these we derive a taxonomy of the common semantics and propose a unified specification. We describe a methodology to translate this unified specification into different target APIs. This simplifies cross-platform application development and provides a clean framework for benchmarking. Our proposed unified specification is called GPGPU unified specification and translation (GUST) and it captures common functionality found in compute-only APIs (e.g., compute unified device architecture and open computing language), in the compute pipeline of traditional graphic-oriented APIs (e.g., open graphic language and Direct3D11) and in last-generation bare-metal APIs (e.g., Vulkan and Direct3D12). The proposed translation methodology solves differences between specific APIs in a transparent manner, without hiding available tuning knobs for compute kernel optimizations and fostering best programming practices in a simple manner.

关键词： Graphics processing units programming Hardware Kernel Standards Semantics Encoding General-purpose GPU (GPGPU) parallel programming tools

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Performance tools for today's HPC: Are we addressing the right issues?

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parallel COMPUTING 2001年第11期27卷 1403-1415页

作者： Pancake, CM Oregon State Univ NW Alliance Computat Sci & Engn Corvallis OR 97331 USA

High-performance computing (HPC) application developers can no longer afford the luxury of programming to just one platform. The usefulness and longevity of software now depend on portability as well as performance. This paper examines the appropriateness of existing tools in developing and tuning applications that must be both efficient and portable. A series of design tradeoffs have been made, with the result that today's tools are slanted toward one goal or the other but do not respond adequately to both. These tradeoffs are explored through a series of examples drawn from current tools. Suggestions are presented for how tools might better support the evolving needs of HPC programmers. (C) 2001 Elsevier Science B.V. All rights reserved.

关键词： program portability performance analysis tools parallel programming tools

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Tool gear: Infrastructure for parallel tools

Tool gear: Infrastructure for parallel tools

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International Conference on parallel and Distributed Processing Techniques and Applications

作者： May, J Gyllenhaal, J Lawrence Livermore Natl Lab Livermore CA 94550 USA

ISBN: (纸本)1892512459

Tool Gear is a software infrastructure for developing performance analysis and other tools. Unlike existing integrated toolkits, which focus on providing a suite of capabilities, Tool Gear is designed to help toot developers create new tools quickly. It combines dynamic instrumentation capabilities with an efficient database and a sophisticated and extensible graphical user interface. This paper describes the design of Tool Gear and presents examples of tools that have been built with it.

关键词： parallel programming tools performance analysis automatic instrumentation tool infrastructure

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