The diverse application vertices of internet-of-things (IoT) including internet of vehicles (IoV), industrial IoT (IIoT) and internet of drones things (IoDT) involve intelligent communication between the massive numbe...
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The diverse application vertices of internet-of-things (IoT) including internet of vehicles (IoV), industrial IoT (IIoT) and internet of drones things (IoDT) involve intelligent communication between the massive number of objects around us. This digital transformation strives for seamless data flow, uninterrupted communication capabilities, low latency and ultra-high reliability. The limited capabilities of fifth generation (5G) technology have given way to sixth generation (6G) wireless technology. This paper presents a dynamic cell-free framework for a 6G-enabled IoT network. A number of access points (APs) are distributed over a given geographical area to serve a large number of user nodes. A pilot-based AP selection (pbas) algorithm is proposed, which offers robust resource control through AP selection based on pilots. Selecting a subset of APs against all APs for each user node results in improved performance. In this paper, the performance of the proposed transmission model is evaluated for the achieved data rate and spectral efficiency using the proposed algorithm. It is shown that the proposed pbas algorithm improves the spectral efficiency by 22% at the cell-edge and 1.5% at the cell-center. A comparison of the different combining techniques used at different user locations is also provided, along with the mathematical formulations. Finally, the proposed model is compared with two other transmission models for performance evaluation. It is observed that the spectral efficiency achieved by an edge node with the proposed scheme is 5.3676 bits/s/Hz, compared to 0.756 bits/s/Hz and 1.0501 bits/s/Hz, attained with transmission schemes 1 and 2, respectively.
The article presents a hardware implementation of the foreground object detection algorithmpbas (Pixel-Based Adaptive Segmenter) with a scene analysis module. A mechanism for static object detection is proposed, whic...
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The article presents a hardware implementation of the foreground object detection algorithmpbas (Pixel-Based Adaptive Segmenter) with a scene analysis module. A mechanism for static object detection is proposed, which is based on consecutive frame differencing. The method allows to distinguish stopped foreground objects (e.g. a car at the intersection, abandoned luggage) from false detections (so-called ghosts) using edge similarity. The improved algorithm was compared with the original version on popular test sequences from the changedetection. net dataset. The obtained results indicate that the proposed approach allows to improve the performance of the method for sequences with the stopped objects. The algorithm has been implemented and successfully verified on a hardware platform with Virtex 7 FPGA device. The pbas segmentation, consecutive frame differencing, Sobel edge detection and advanced one-pass connected component analysis modules were designed. The system is capable of processing 50 frames with a resolution of 720 x 576 pixels per second.
In this paper a hardware implementation of the state-of-the-art pbas (Pixel-Based Adaptive Segmenter) foreground object detection algorithm in FPGA is presented. This background modelling and subtraction technique is ...
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ISBN:
(纸本)9788363578015
In this paper a hardware implementation of the state-of-the-art pbas (Pixel-Based Adaptive Segmenter) foreground object detection algorithm in FPGA is presented. This background modelling and subtraction technique is using novel ideas which improve the detection results. In this work a research is presented that determines which parts of the original algorithm need to be adjusted and modified to allow hardware implementation. A comparison is presented how this modifications influence the results accuracy compared to the original software implementation and other algorithms. An example working system based on the proposed module using the evaluation board with Virtex 7 device is also presented. This is the first reported FPGA implementation of this algorithm.
In this paper a hardware implementation of the state-of-the-art pbas (Pixel-Based Adaptive Segmenter) foreground object detection algorithm in FPGA is presented. This background modelling and subtraction technique is ...
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ISBN:
(纸本)9781479913589
In this paper a hardware implementation of the state-of-the-art pbas (Pixel-Based Adaptive Segmenter) foreground object detection algorithm in FPGA is presented. This background modelling and subtraction technique is using novel ideas which improve the detection results. In this work a research is presented that determines which parts of the original algorithm need to be adjusted and modified to allow hardware implementation. A comparison is presented how this modifications influence the results accuracy compared to the original software implementation and other algorithms. An example working system based on the proposed module using the evaluation board with Virtex 7 device is also presented. This is the first reported FPGA implementation of this algorithm.
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