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CMOS Low-Power Lock-In Amplifiers With Signal Rectification in Current Domain

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT 2015年第7期64卷 1858-1867页

作者： Mariana Maya-Hernandez, Paulina Teresa Sanz-Pascual, Maria Calvo, Belen Natl Inst Astrophys Opt & Elect Dept Elect Puebla 72840 Mexico Aragon Inst Engn Res Fac Ciencias Grp Elect Design Zaragoza 50009 Spain

This paper presents the design and experimental characterization of two lock-in amplifier (LIA) prototypes integrated in a 0.18-mu m CMOS process with a single supply voltage of 1.8 V. As opposed to previously reported integrated LIAs, synchronous rectification is performed in the current domain, providing key features such as low power (< 420 mu W) and reduced area (0.013 mm(2)), with a dynamic reserve better than 35 dB and less than 5% relative error in the signal recovery. The principle of operation of each prototype is presented and their performance is compared with previous implementations, validating their suitability for low-cost portable applications.

关键词： Analog integrated design analog processing circuits lock-in amplifiers (LIAs) low-voltage low-power programmable circuits

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An Introduction to Reconfigurable Systems

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PROCEEDINGS OF THE IEEE 2015年第3期103卷 291-317页

作者： Lyke, James C. Christodoulou, Christos G. Vera, G. Alonzo Edwards, Arthur H. Air Force Res Lab Kirtland AFB NM 87117 USA Univ New Mexico Dept Elect & Comp Engn Albuquerque NM 87131 USA

Reconfigurability can be thought of as software-defined functionality, where flexibility is controlled predominately through the specification of bit patterns. Reconfigurable systems can be as simple as a single switch, or as abstract and powerful as programmable matter. This paper considers the generalization of reconfigurable systems as an important evolving discipline, bolstered by real-world archetypes such as field programmable gate arrays and software-definable radio (platform and application, respectively). It considers what reconfigurable systems actually are, their motivation, their taxonomy, the fundamental mechanisms and architectural considerations underlying them, designing them and using them in applications. With well-known real-world instances, such as the field programmable gate array, the paper attempts to motivate an understanding of the many possible directions and implications of a new class of system which is fundamentally based on the ability to change.

关键词： Computer architecture field programmable analog arrays field programmable gate arrays integrated circuit packaging memory metamaterials microelectromechanical system microfluidics microwave circuits neural networks photonics programmable circuits reconfigurable architectures reconfigurable logic routing software defined networking software radio switching circuits

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Low noise amplifier for MB-OFDM UWB receivers

Low noise amplifier for MB-OFDM UWB receivers

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International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA)

作者： Madiha Hajri Dalenda Ben Issa Hekmet Samet LETI Laboratory University of Sfax Sfax Tunisia

ISBN: (纸本)9781509034086

This paper presented a reconfigurable low noise amplifier (LNA) design. This circuit is the most critical block in a multi-band Ultra Wide Band (UWB) receiver architectures. The proposed LNA is composed of three stages. The first one is a common source (CS) stage. Its objective is to provide a good input reflection coefficient S11 and a low noise figure. The second stage composed of a programmable circuit to select the operation band. A current reuse technique is used in the third stage to achieve a high gain and low power consumption. The proposed multi-band LNA operates in 3 sub bands of Multi Band Orthogonal Frequency Division Multiplexing (MB-OFDM) of 500 MHz, centered at 3.5, 4, 4.5 GHz frequencies. The simulated results of the designed LNA show an average power gain up to 28 dB, 25 dB, 27 dB for band 1, band 2 and band 3, respectively. At a voltage supply equal to 1V, The LNA consumes only 3.4mW. This circuit is designed in CMOS 0.18 μm technology.

关键词： Gain Low-noise amplifiers Receivers Reflection coefficient Noise figure programmable circuits Power demand

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Current-mode-based programming interpolation circuit

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ELECTRONICS LETTERS 2015年第24期51卷 1977-+页

作者： Li, Hongge Wang, Xiang Beihang Univ Sch Elect & Informat Engn Beijing 100191 Peoples R China

The current-mode-based programming interpolation circuit is presented. The proposed circuit can be configured so that any arbitrary number of currents can be generated and independently programmed. The programming circuit is verified by a polynomial interpolation current-modulation sub-DAC. The polynomial interpolation method provides highly accurate grey-level voltages because of the programming source. The DAC including the programming interpolation cell was implemented in 0.35 m CMOS process with DNL and INL of 0.43 and 0.40 LSB, respectively.

关键词： current-mode circuits programmable circuits interpolation polynomials digital-analogue conversion CMOS integrated circuits current-mode-based programming interpolation circuit polynomial interpolation current-modulation subDAC grey-level voltage programming interpolation cell CMOS process DNL INL LSB digital-analog converter complementary metal oxide semiconductor differential nonlinearity integral nonlinearity least significant bit size 0 35 mum

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Threshold Logic Computing: Memristive-CMOS circuits for Fast Fourier Transform and Vedic Multiplication

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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2015年第11期23卷 2690-2694页

作者： James, Alex Pappachen Kumar, Dinesh S. Ajayan, Arun Nazarbayev Univ Dept Elect & Elect Engn Astana 010000 Kazakhstan Enview Res & Dev Labs Trivandrum 695584 Kerala India

Brain-inspired circuits can provide an alternative solution to implement computing architectures taking advantage of fault tolerance and generalization ability of logic gates. In this brief, we advance over the memristive threshold circuit configuration consisting of memristive averaging circuit in combination with operational amplifier and/or CMOS inverters in application to realizing complex computing circuits. The developed memristive threshold logic gates are used for designing fast Fourier transform and multiplication circuits useful for modern microprocessors. Overall, the proposed threshold logic outperforms previous memristive-CMOS logic cells on every aspect, however, they indicate a lower chip area, lower total harmonic distortion, and controllable leakage power, but a higher power dissipation with respect to CMOS logic.

关键词： Digital circuits digital integrated circuits memristors programmable circuits threshold logic

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An Adaptive Analog Circuit for LVDT's Nanometer Measurement Without Losing Sensitivity and Range

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IEEE SENSORS JOURNAL 2015年第4期15卷 2248-2254页

作者： Chen, Gang Zhang, Bo Liu, Pinkuan Ding, Han Shanghai Jiao Tong Univ State Key Lab Mech Syst & Vibrat Shanghai 200030 Peoples R China Huazhong Univ Sci & Technol Coll Mech Sci & Engn Wuhan 430074 Peoples R China

A self-adaptive circuit for the linear variable differential transformer (LVDT) has been developed to enhance its nanometer measurement range without loss resolution. By applying a fuzzy-proportional-integral-derivative controlled programmable gain amplifier array to produce a reference signal, which can adjust itself according to LVDT's core position, the conditioning circuit has ensured the signal to analog-to-digital converter varying in a very small interval over full-scale operating range. Thus, the sensitivity of the measurement system can be improved without losing measurement range. The simulation result demonstrated that the proposed circuit has solved the contradiction between resolution and range, which usually occurs in weak signal detection. Moreover, the signal-to-noise ratio has been ameliorated greatly. Additionally, the DSP-based signal conditioner, which utilizes the self-adaptive circuit, demonstrates the performance of the novel design and nanometer precision is obtained in a wide range.

关键词： Nanometer measurement signal processing programmable circuits fuzzy control

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A survey of advancements in nucleic acid-based logic gates and computing for applications in biotechnology and biomedicine

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CHEMICAL COMMUNICATIONS 2015年第18期51卷 3723-3734页

作者： Wu, Cuichen Wan, Shuo Hou, Weijia Zhang, Liqin Xu, Jiehua Cui, Cheng Wang, Yanyue Hu, Jun Tan, Weihong Univ Florida Dept Chem Ctr Res Bio Nano Interface Gainesville FL 32611 USA Univ Florida Dept Physiol & Funct Genom Shands Canc Ctr UF Genet Inst Gainesville FL 32611 USA Univ Florida McKnight Brain Inst Gainesville FL 32611 USA Sun Yat Sen Univ Affiliated Hosp 3 Dept Nucl Med Guangzhou 510630 Guangdong Peoples R China Hunan Tumor Hosp Changsha 410082 Hunan Peoples R China

Nucleic acid-based logic devices were first introduced in 1994. Since then, science has seen the emergence of new logic systems for mimicking mathematical functions, diagnosing disease and even imitating biological systems. The unique features of nucleic acids, such as facile and high-throughput synthesis, Watson-Crick complementary base pairing, and predictable structures, together with the aid of programming design, have led to the widespread applications of nucleic acids (NA) for logic gate and computing in biotechnology and biomedicine. In this feature article, the development of in vitro NA logic systems will be discussed, as well as the expansion of such systems using various input molecules for potential cellular, or even in vivo, applications.

关键词： NUCLEIC acids LOGIC circuits COMPUTERS in biology NUCLEOTIDE sequence NEURAL networks (Computer science) POLYACRYLAMIDE gel electrophoresis programmable circuits

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A Reconfigurable Medically Cohesive Biomedical Front-End with ΣΔ ADC in 0.18μm CMOS 37

A Reconfigurable Medically Cohesive Biomedical Front-End wit...

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37th Annual International Conference of the IEEE-Engineering-in-Medicine-and-Biology-Society (EMBC)

作者： Jha, Pankaj Patra, Pravanjan Naik, Jairaj Acharya, Amit Rajalakshmi, P. Singh, Shiv Govind Dutta, Ashudeb Indian Inst Technol Hyderabad Dept Elect Engn Hyderabad 502205 Andhra Pradesh India

ISBN: (纸本)9781424492701

This paper presents a generic programmable analog front-end (AFE) for acquisition and digitization of various biopotential signals. This includes a lead-off detection circuit, an ultra-low current capacitively coupled signal conditioning stage with programmable gain and bandwidth, a new mixed signal automatic gain control (AGC) mechanism and a medically cohesive reconfigurable Sigma Delta ADC. The full system is designed in UMC 0.18 mu m CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47 mu W power consumption. The ADC provides 2nd order noise-shaping while using single integrator and an ENOB of similar to 11 bits with 5 mu W power consumption. The system was successfully verified for various ECG signals from PTB database. This system is intended for portable batteryless u-Healthcare devices.

关键词： CMOS analogue integrated circuits bioelectric potentials programmable circuits CMOS automatic gain control biopotential signals acquisition biopotential signals digitization capacitively coupled signal conditioning stage lead off detection circuit portable batteryless u-Healthcare devices programmable analog front-end reconfigurable medically cohesive biomedical front end Bandwidth Detectors Electrocardiography Gain control Noise shaping Power demand Signal resolution

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Class of memristors from cascade of static nonlinear two ports with dynamic one-ports

Class of memristors from cascade of static nonlinear two por...

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International Joint Conference on Neural Networks (IJCNN)

作者： Ascoli, Alon Tetzlaff, Ronald Corinto, Fernando Tech Univ Dresden Fac Elect & Electrotech D-01062 Dresden Germany Politecn Torino Dept Elect & Telecommun Turin Italy

ISBN: (纸本)9781479919598

A class of memristor circuits is obtained by cascading a static nonlinear two-port with a dynamical one-port. The terminals of the input port of the static non linearity represent the access nodes for each memristor in the class. The class may be splitted into two sub-classes, namely the current-and voltage-controlled memristors. Two further sets of memristors may be identified within each of such sub-classes, particularly the current-and voltage state memristors. The simplest memristor circuits from the proposed class employ solely passive two-terminal elements from circuit theory. This represents an absolute novelty in the panorama of memristor emulators. The passive elements from the class are volatile memories. However, non-volatile memory behaviour may arise in case the dynamical one-port contains active elements. The versatile nature of the circuit topologies of the proposed memristors allows the emergence of a wide variety of complex dynamical behaviours, which may enable the accomplishment of novel signal processing tasks or lead to improvements in the performance of conventional circuits.

关键词： Bridge circuits Conductivity Integrated circuits Memristors programmable circuits

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248pW, 0.11mV/°C Glitch-Free programmable Voltage Detector With Multiple Voltage Duplicator for Energy Harvesting 41

248pW, 0.11mV/°C Glitch-Free Programmable Voltage Detector ...

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41st European Solid-State circuits Conference (ESSCIRC)

作者： Someya, Teruki Fuketa, Hiroshi Matsunaga, Kenichi Morimura, Hiroki Sakurai, Takayasu Takamiya, Makoto Univ Tokyo Tokyo 1138654 Japan NTT Corp NTT Device Technol Labs Tokyo Japan

ISBN: (纸本)9781467374729

A glitch-free programmable voltage detector is proposed for RF energy harvesting. In energy harvesting applications, ultra-low power (< 1nW), PVT-variation tolerant, and glitch-free voltage detectors are required to turn on or off the output switch which connects an output capacitor of the energy harvester and the load circuits. The proposed multiple voltage duplicator (MVD) enables the ultra-low power (248pW at 1V) feature, detection voltage programmability (< 49-mV step), and temperature-variation tolerant (0.11mV/degrees C in -20 degrees C to 80 degrees C) operation in 250-nm CMOS. In the conventional voltage detectors, when the input voltage is increased from 0V, a glitch of the output is observed, which mistakenly turns on the output switch and spoils the energy harvesting. To remove the glitch, the glitch-free programmable voltage detector is proposed.

关键词： CMOS integrated circuits detector circuits energy harvesting programmable circuits PVT-variation tolerant detectors RF energy harvesting detection voltage programmability energy harvester energy harvesting applications glitch-free programmable voltage detector load circuits multiple voltage duplicator power 248 pW size 250 nm temperature -20 C to 80 C voltage 1 V Detectors Energy harvesting Radio frequency Temperature dependence Temperature measurement Voltage measurement energy harvesting voltage detector CMOS integrated circuits Detector circuits programmable circuits voltage measurement temperature measurement radiofrequency Load Circuit temperature dependence Copy machine VOLTAGE detector output capacitor

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