We formulate a risk-averse two-stage stochastic linear programming problem in which unresolved uncertainty remains after the second stage. The objective function is formulated as a composition of conditional risk meas...
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We formulate a risk-averse two-stage stochastic linear programming problem in which unresolved uncertainty remains after the second stage. The objective function is formulated as a composition of conditional risk measures. We analyze properties of the problem and derive necessary and sufficient optimality conditions. Next, we construct a new decomposition method for solving the problem that exploits the composite structure of the objective function. We illustrate its performance on a portfolio optimization problem.
There are many models of computation, but they all share the same underlying laws of physics. Software can represent physical quantities, but is not itself written with physical units. This division in representations...
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There are many models of computation, but they all share the same underlying laws of physics. Software can represent physical quantities, but is not itself written with physical units. This division in representations, dating back to the origins of computer science, imposes increasingly heroic measures to maintain the fiction that software is executed in a virtual world. I consider instead an alternative approach, representing computation so that hardware and software are aligned at all levels of description. By abstracting physics with asynchronous logic automata I show that this alignment can not only improve scalability, portability, and performance, but also simplify programming and expand applications.
We present a mixed integer programming (MIP) model to solve the problems of (i) selecting an airport's optimal sequence of runway configurations and (ii) determining the optimal balance of arrivals and departures ...
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We present a mixed integer programming (MIP) model to solve the problems of (i) selecting an airport's optimal sequence of runway configurations and (ii) determining the optimal balance of arrivals and departures to be served at any moment. These problems, the runway configuration management (RCM) problem and the arrival/departure runway balancing (ADRB) problem, respectively, are of critical importance in minimizing the delay of both in-flight and on-the-ground aircraft along with their associated costs. We show that under mild assumptions on the time required to change between configurations, large realistic problem instances can be solved within several seconds. Furthermore, as assumptions are relaxed, optimal solutions are still found within several minutes. Comparison with a sophisticated baseline heuristic reveals that in many cases the potential reduction in cost from using the method is significant and could be expected to be of the order of at least 10%. Finally, we present an extension of the MIP model to solve these two problems for a group of airports in a metropolitan area such as New York (metroplex), where operations at each airport within the metroplex might have an impact on operations at some of the other airports due to limitations in shared airspace.
When parallel applications are run in large-scale distributed environments, such as grids, peer-to-peer (P2P) systems, and clouds, the set of resources used can change dynamically as machines crash, reservations end, ...
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When parallel applications are run in large-scale distributed environments, such as grids, peer-to-peer (P2P) systems, and clouds, the set of resources used can change dynamically as machines crash, reservations end, and new resources become available. It is vital for applications to respond to these changes. Therefore, it is necessary to keep track of the available resources-a problem which is known to be notoriously difficult. In this article we argue that resource tracking must be provided as the standard functionality in the lower parts of the software stack. We propose a general solution to resource tracking: the Join-Elect-Leave (JEL) model. JEL provides unified resource tracking for parallel and distributed applications across environments. JEL is a simple yet powerful model based on notifying when resources have Joined or Left the computation. We demonstrate that JEL is suitable for resource tracking in a wide variety of programming models, ranging from the fixed resource sets traditionally used in MPI-1 to flexible grid-oriented programming models. We compare several JEL implementations, and show these to perform and scale well in several real-world scenarios involving grids, clouds and P2P systems applied concurrently, and wide-area systems with failing resources. Using JEL, we have won the first prize in a number of international distributed computing competitions. Copyright (C) 2010 John Wiley & Sons, Ltd.
In today's multiprocessor SoCs (MPSoCs), parallel programming models are needed to fully exploit hardware capabilities and to achieve the 100 Gops/W energy efficiency target required for Ambient Intelligence Appli...
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In today's multiprocessor SoCs (MPSoCs), parallel programming models are needed to fully exploit hardware capabilities and to achieve the 100 Gops/W energy efficiency target required for Ambient Intelligence Applications. However, mapping abstract programming models onto tightly power-constrained hardware architectures imposes overheads which might seriously compromise performance and energy efficiency. The objective of this work is to perform a comparative analysis of message passing versus shared memory as programming models for single-chip multiprocessor platforms. Our analysis is carried out from a hardware-software viewpoint: We carefully tune hardware architectures and software libraries for each programming model. We analyze representative application kernels from the multimedia domain, and identify application-level parameters that heavily influence performance and energy efficiency. Then, we formulate guidelines for the selection of the most appropriate programming model and its architectural support.
Large-scale systems increasingly exhibit a differential between intra-chip and inter-chip communication performance especially in hybrid systems using accelerators. Processor-cores on the same socket are able to commu...
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Large-scale systems increasingly exhibit a differential between intra-chip and inter-chip communication performance especially in hybrid systems using accelerators. Processor-cores on the same socket are able to communicate at lower latencies, and with higher bandwidths, than cores on different sockets either within the same node or between nodes. A key challenge is to efficiently use this communication hierarchy and hence optimize performance. We consider here the class of applications that contains wave-front processing. In these applications data can only be processed after their upstream neighbors have been processed. Similar dependencies result between processors in which communication is required to pass boundary data downstream and whose cost is typically impacted by the slowest communication channel in use. In this work we develop a novel hierarchical wave-front approach that reduces the use of slower communications in the hierarchy but at the cost of additional steps in the parallel computation and higher use of on-chip communications. This tradeoff is explored using a performance model. An implementation using the reverse-acceleration programming model on the petascale Roadrunner system demonstrates a 27% performance improvement at full system-scale on a kernel application. The approach is generally applicable to large-scale multi-core and accelerated systems where a differential in communication performance exists. (C) 2011 Elsevier B.V. All rights reserved.
Although there are certainly revolutionary advances in technology, their effect accumulates slowly and the ultimate impact often contradicts the initial prognostications.
Although there are certainly revolutionary advances in technology, their effect accumulates slowly and the ultimate impact often contradicts the initial prognostications.
We present MPOpt-Cell, an architecture-aware framework for high-productivity development and efficient execution of stream applications on the CELL BE Processor. It enables developers to quickly build Synchronous Data...
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ISBN:
(纸本)9781450306980
We present MPOpt-Cell, an architecture-aware framework for high-productivity development and efficient execution of stream applications on the CELL BE Processor. It enables developers to quickly build Synchronous Data Flow (SDF) applications using a simple and intuitive programming interface based on a set of compiler directives that capture the key abstractions of SDF. The compiler backend and system runtime efficiently manage hardware resources.
A variety of programming models exist to support large-scale, distributed memory, parallel computation. These programming models have historically targeted coarse-grained applications with natural locality such as tho...
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ISBN:
(纸本)9781450301190
A variety of programming models exist to support large-scale, distributed memory, parallel computation. These programming models have historically targeted coarse-grained applications with natural locality such as those found in a variety of scientific simulations of the physical world. Fine-grained, irregular, and unstructured applications such as those found in biology, social network analysis, and graph theory are less well supported. We propose Active Pebbles, a programming model which allows these applications to be expressed naturally;an accompanying execution model ensures performance and scalability.
In this paper, we describe challenges and solutions for programming multi-processor systems-on-a-chip, based on our experience in programming Platform2012, a large-scale multicore fabric under development by STMicroel...
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ISBN:
(纸本)9781450306362
In this paper, we describe challenges and solutions for programming multi-processor systems-on-a-chip, based on our experience in programming Platform2012, a large-scale multicore fabric under development by STMicroelectronics and CEA, using the MultiFlex multi-core programming environment. We present a component-based environment which is the basis for a rich set of parallel programming constructs supporting task level and data level parallelism. The MultiFlex programming tools are described, supporting platform mapping, debug, trace and analysis. We discuss the applicability of different parallel programming model variants for two versions of a high-definition VC-1 decoding video application. These two versions are mapped onto variants of a homogeneous multi-core platform.
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