检索结果-内蒙古大学图书馆

IEEE DESIGN & TEST OF COMPUTERS 2008年第4期25卷 312-320页

作者： Hwu, Wen-mei Mattson, Timothy G. Keutzer, Kuirt Univ Illinois Coordinated Sci Lab Urbana IL 61801 USA Intel Corp Applicat Res Lab Santa Clara CA 95051 USA Univ Calif Berkeley Berkeley CA 94720 USA

The evolutionary path of microprocessor design includes both multicore and many-core architectures. Harnessing the most computing throughput from these architectures requires concurrent or parallel execution of instructions. The authors describe the challenges facing the industry as parallel-computing platforms become even more widely available.

关键词： Concurrency Parallel programming Application Frameworks programming models programming Tools Multicore Many Core Software Engineering Autotuning

来源：评论

学校读者我要写书评

暂无评论

Multi-processor SoC-based design methodologies using configurable and extensible processors

引用

JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2008年第1-2期53卷 113-127页

作者： Martin, Grant Tensilica Inc Santa Clara CA USA

The growing interest in multiprocessor system-on-chip (MPSoC) design, or 'multicore' processors, has resulted in some confusion between the various types of multiprocessor architectures and their suitability in different application spaces. In particular, there are clear differences between the general-purpose, symmetric multiprocessor (SMP) approaches, and the application-specific, asymmetric multiprocessor (AMP) architectures. Configurable and extensible processors are especially suited for the AMP approach, yet their flexibility means that new design methodologies and tools must be developed to allow effective utilisation of multiple instruction-set processors in a complex design. Configurable and extensible processors are especially well suited for data-intensive computational tasks, such as are found in many signal and image processing applications, including audio, video, and wireless and wired networking. A design methodology for such applications must pay careful attention to the right programming models, and dataflow styles of processing seem a natural fit to the application space. In this paper, we describe a design methodology, flow and tools for MPSoC design using configurable and extensible processors that is especially interesting for data-intensive dataflow style applications. Some of the issues involved in this design approach are used to highlight opportunities for ongoing research.

关键词： MPSoC multiprocessor system-on-chip configurable processor instruction-set extension electronic system-level design programming models dataflow

来源：评论

学校读者我要写书评

暂无评论

Multi-processor SoC-based design methodologies using configurable and extensible processors

Multi-processor SoC-based design methodologies using configu...

引用

17th IEEE International Conference on Application-Specific Systems, Architectures and Processors

作者： Martin, Grant Tensilica Inc Santa Clara CA USA

关键词： MPSoC multiprocessor system-on-chip configurable processor instruction-set extension electronic system-level design programming models dataflow

来源：评论

学校读者我要写书评

暂无评论

Resource tracking in parallel and distributed applications 08

Resource tracking in parallel and distributed applications

引用

17th International Symposium on High Performance Distributed Computing 2008, HPDC'08

作者： Drost, Niels Van Nieuwpoort, Rob V. Maassen, Jason Bal, Henri E. Department of Computer Science VU University Amsterdam Netherlands

ISBN: (纸本)9781595939975

In this paper, we introduce the Join-Elect-Leave (JEL) model, a simple yet powerful model for tracking the resources participating in an application. This model is based on the concept of signaling, i.e., notifying the application when resources have Joined or Left the computation. In addition, the model includes Elections, which can be used to select resources with a special role. JEL supports several consistency models and is suitable for resource coordination of a wide variety of applications, ranging from the traditional fixed resource sets used in MPI, to flexible grid-oriented programming models.

关键词： robust programming models resource tracking

来源：评论

学校读者我要写书评

暂无评论

Parallel programmability and the Chapel language

引用

INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS 2007年第3期21卷 291-312页

作者： Chamberlain, B. L. Callahan, D. Zima, H. P. Cray Res Inc Seattle WA 98104 USA Microsoft Corp Redmond WA 98052 USA Univ Vienna A-1010 Vienna Austria JPL Pasadena CA USA

In this paper we consider productivity challenges for parallel programmers and explore ways that parallel language design might help improve end-user productivity. We offer a candidate list of desirable qualities for a parallel programming language, and describe how these qualities are addressed in the design of the Chapel language. In doing so, we provide an overview of Chapel's features an how they help address parallel productivity. We also survey current techniques for parallel programming and describe ways in which we consider them to fall short of our idealized productive programming model.

关键词： parallel languages productivity parallel programming programming models Chapel

来源：评论

学校读者我要写书评

暂无评论

SP@CE -: An SP-Based programming model for consumer electronics streaming applications

SP@CE -: An SP-Based programming model for consumer electron...

引用

19th International Workshop on Languages and Compilers for Parallel Computing

作者： Varbanescu, Ana Lucia Nijhuis, Maik Gonzalez-Escribano, Arturo Sips, Henk Bos, Herbert Bal, Henri Delft Univ Technol Dept Comp Sci NL-2600 AA Delft Netherlands Vrije Univ Amsterdam Dept Comp Sci Amsterdam Netherlands Univ Valladolid Dept Informat Valladolid Spain

ISBN: (纸本)9783540725206

Efficient programming of multimedia streaming applications for Consumer Electronics (CE) devices is not trivial. As a solution for this problem, we present SP@CE, a novel programming model designed to balance the specific requirements of CE streaming applications with the simplicity and efficiency of the Series-Parallel Contention (SPC) programming model. To enable the use of SP@CE, we have designed a framework that guides the programmer to design, evaluate, optimize and execute the application on the target CE platform. To evaluate the entire system, we have used SP@CE to implement a set of real-life streaming applications and we present the results obtained by running them on the Wasabi/SpaceCAKE architecture from Philips, a multiprocessor system-on-chip (MPSoC) CE platform. The experiments show that SP@CE enables rapid application development, induces low overhead, offers high code reuse potential, and takes advantage of the inherent application parallelism.

关键词： streaming applications consumer electronics programming models SP@CE component-based framework MPSoC

来源：评论

学校读者我要写书评

暂无评论

Dynamic Multigrain Parallelization on the Cell Broadband Engine 07

Dynamic Multigrain Parallelization on the Cell Broadband Eng...

引用

ACM SIGPLAN Symposium on Principles and Practice of Parallel programming

作者： Blagojevic, Filip Nikolopoulos, Dimitrios S. Stamatakis, Alexandros Antonopoulos, Christos D. Virginia Tech Ctr High End Comp Syst Blacksburg VA 24061 USA

ISBN: (纸本)9781595936028

This paper addresses the problem of orchestrating and scheduling parallelism at multiple levels of granularity on heterogeneous multicore processors. We present mechanisms and policies for adaptive exploitation and scheduling of layered parallelism on the Cell Broadband Engine. Our policies combine event-driven task scheduling with malleable loop-level parallelism, which is exploited from the runtime system whenever task-level parallelism leaves idle cores. We present a scheduler for applications with layered parallelism on Cell and investigate its performance with RAxML, an application which infers large phylogenetic trees, using the Maximum Likelihood (ML) method. Our experiments show that the Cell benefits significantly from dynamic methods that selectively exploit the layers of parallelism in the system, in response to workload fluctuation. Our scheduler outperforms the MPI version of RAxML, scheduled by the Linux kernel, by up to a factor of 2.6. We are able to execute RAxML on one Cell four times faster than on a dual-processor system with Hyperthreaded Xeon processors, and 5-10% faster than on a single-processor system with a dual-core, quad-thread IBM Power5 processor.

关键词： IBM Cell programming models Process Scheduling RAxML

来源：评论

学校读者我要写书评

暂无评论

Benefits from US monetary policy experimentation in the days of Samuelson and Solow and Lucas

引用

JOURNAL OF MONEY CREDIT AND BANKING 2007年第1期39卷 67-99页

作者： Cogley, Timothy Colacito, Riccardo Sargent, Thomas J. Univ Calif Davis Davis CA 95616 USA Univ N Carolina Kenan Flagler Business Sch Chapel Hill NC 27515 USA NYU New York NY USA

A policy maker knows two models. One implies an exploitable inflation-unemployment trade-off, the other does not. The policy maker's prior probability over the two models is part of his state vector. Bayes' law converts the prior probability into a posterior probability and gives the policy maker an incentive to experiment. For models calibrated to U.S. data through the early 1960s, we compare the outcomes from two Bellman equations. The first tells the policy maker to "experiment and learn." The second tells him to "learn but don't experiment." In this way, we isolate a component of government policy that is due to experimentation and estimate the benefits from intentional experimentation. We interpret the Bellman equation that learns but does not intentionally experiment as an "anticipated utility" model and study how well its outcomes approximate those from the "experiment and learn" Bellman equation. The approximation is good. For our calibrations, the benefits from purposeful experimentation are small because random shocks are big enough to provide ample unintentional experimentation.

关键词： learning model uncertainty Bayes' law intentional experimentation Phillips curve opportunism Bayesian analysis optimization techniques programming models dynamic analysis central banks and their policies

来源：评论

学校读者我要写书评

暂无评论

High performance remote memory access communication: The ARMCI approach

引用

INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS 2006年第2期20卷 233-253页

作者： Nieplocha, J. Tipparaju, V. Krishnan, M. Panda, D. K. Pacific NW Natl Lab Computat Sci & Math Dept Richland WA 99352 USA Ohio State Univ Columbus OH 43210 USA

This paper describes the Aggregate Remote Memory Copy Interface (ARMCI), a portable high performance remote memory access communication interface, developed originally under the U.S. Department of Energy (DOE) Advanced Computational Testing and Simulation Toolkit project and currently used and advanced as a part of the run-time layer of the DOE project, programming models for Scalable Parallel Computing. The paper discusses the model, addresses challenges of portable implementations, and demonstrates that ARMCI delivers high performance on a variety of platforms. Special emphasis is placed on the latency hiding mechanisms and ability to optimize noncontiguous data transfers.

关键词： remote memory access one-sided communication programming models ARMCI high performance networks

来源：评论

学校读者我要写书评

暂无评论

Planning the future of Botswana's coal

引用

INTERNATIONAL JOURNAL OF GLOBAL ENERGY ISSUES 2006年第1-2期25卷 60-82页

作者： Fichani, Khaulani Labys, Walter West Virginia Univ Nat Res Econ Program Morgantown WV 26506 USA

Botswana has vast proven deposits of steam coal, which, for a long time, the government has wanted to develop but without much success. The main objectives of this study are to forecast possible coal exports from Botswana and the land routes for these exports to determine the competitiveness of Botswana's coal in world steam coal trade to make recommendations on the appropriate policy for the exploitation of this coal. To accomplish these objectives, we construct a model of the global steam coal trade and apply this model to forecast the likely optimal size of mine, timing of capacity, and choice of export port for the years 2005 and 2010 from a 2000 base forecast year. The results of our regional analysis suggest that Botswana's coal exports are competitive in Asia and Western Europe. These results are shown to be least sensitive to changes in rail transportation costs and marginal supply costs but more sensitive to changes in capital costs for mine development.

关键词： long run marginal cost function econometric models programming models international steam coal trade model Botswana's energy policy

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：