The paper presents a taxonomy for parallel processing systems. Because of technological limitations, high-speed computing has to be achieved nowadays by innovative architectures whose distinctive features cannot be cl...
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The paper presents a taxonomy for parallel processing systems. Because of technological limitations, high-speed computing has to be achieved nowadays by innovative architectures whose distinctive features cannot be clearly brought out by any of the taxonomies proposed to date. The paper discusses the drawbacks of these taxonomies before proposing a new method of classification based on some dominant architectural features, such as the level of concurrency, method of algorithm realisation, execution characteristic and control structure. The principal aim of proposing a new taxonomy is to develop a nomenclature which can be used to describe the salient features of all the types of parallel processing systems that have been proposed to date. In the last part of the paper it is shown how the nomenclature suggested in the proposed scheme of classification can be used to describe the ‘pure’ high-speed computing systems such as systolic array, pipeline processor, multiprocessor, data-flow processor, multifunction processor, array processor, associative processor and also the systems formed by hybridation of these ‘pure’ systems.
The passive ranging algorithm off-line is implemented and tested with the use of helicopter-collected images. It is observed that the real-time data and computational requirements of the algorithm are beyond the capab...
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The passive ranging algorithm off-line is implemented and tested with the use of helicopter-collected images. It is observed that the real-time data and computational requirements of the algorithm are beyond the capability of any off-the-shelf microprocessor or digital signal processor. The purpose of this study is to describe the computational requirements of the algorithm. parallelprocessing technology is used to meet the computational requirements. Several issues regarding the selection of a parallelprocessing architecture are discussed and four computer architectures are evaluated with respect to their suitability to process the algorithm in real-time. This evaluation leads to the conclusion that real-time passive ranging is a realistic goal and can be achieved within a short time.
The aim of this paper is that spectral determinants are objects that can be effectively used as a performance prediction tool for the modern parallel processing systems. In the aim to confirm this we give the matrix r...
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The aim of this paper is that spectral determinants are objects that can be effectively used as a performance prediction tool for the modern parallel processing systems. In the aim to confirm this we give the matrix representation of the linear evolution operator of the certain class of parallel processing systems. An explicit polynomial expression of the corresponding spectral determinant has been established and eigenvalues were computed. Derived eigenvalues were validated against the results of the simulation. The strong agreement between computed results and those obtained through the simulation has been found. (C) 2001 Elsevier Science Ltd. All rights reserved.
This paper discusses implementation of advanced numerical and image-processing applications on a multiprocessor system. With a view toward 'coarse-grain' rapid prototyping, we implement two diverse application...
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ISBN:
(纸本)0818684798
This paper discusses implementation of advanced numerical and image-processing applications on a multiprocessor system. With a view toward 'coarse-grain' rapid prototyping, we implement two diverse applications onto a common framework, i.e., MAC type processors interconnected by a TESH network. TESH (Tori connected mESHes) is a recently developed interconnection network. It is hierarchical, thus allowing exploitation of computation locality as well as easy expansion, which permits efficient VLSI/ULSI realization, and appears to be well suited for 3-D VLSI/ULSI implementation. Specifically, the paper develops parallel implementation of (a) real-time solution of partial differential equations and (b) 2-D Wavelet transform, in such a way so as to completely hide the communication overhead. It is shown that the performance of TESH implemented algorithms is comparable to the MESH based algorithm. However, TESH networks are much easier to implement because of the significantly reduced wiring than MESH networks.
Orthogonal graphs are a simple but powerful tool for the analysis and description of a class of interconnection networks. Omega graphs and multidimensional orthogonal graphs are considered in this work for the generat...
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This paper focuses on techniques for enhancing the feasibility of using graphic visualization in analyzing the complexities of parallel software. The central drawback to applying such visual techniques is the overhead...
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Despite the rapid advances in development of parallel processing systems in recent years, the progress in software development to effectively utilize the parallel processing systems has been relatively slow. In this p...
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The workload of a computer system is traditionally defined as all inputs from the user to the system. As the use of this real workload is usually impossible in most performance analysis studies, it is necessary to abs...
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Current trends indicate that future C3 (command, control, and communications) systems will likely contain suites of heterogeneous computing facilities composed of both parallel and sequential computing components. Als...
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In this paper, we use a Generalized Stochastic Petri Net (GSPN) to model multiprocessor parallelprocessing architectures. It can precisely describe the dynamic operations and states of the system with the reachabilit...
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In this paper, we use a Generalized Stochastic Petri Net (GSPN) to model multiprocessor parallelprocessing architectures. It can precisely describe the dynamic operations and states of the system with the reachability graph and the reachability set generated by the GSPN approach. The structural properties and temporal specifications of GSPN are described. Then, the effectiveness of this modeling technique in the case of parallel architecture with common bus structures of shared memory style and with message passing style is investigated in detail.
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