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The Energy Efficiency Evaluating Method Determining Energy Consumption of the parallel program According to Its Profile

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LOBACHEVSKII JOURNAL OF MATHEMATICS 2020年第12期41卷 2542-2551页

作者： Kiselev, E. A. Kiselev, V. I. Shabanov, B. M. Aladyshev, O. S. Baranov, A. V. Russian Acad Sci Joint Supercomp Ctr Sci Res Inst Syst Anal Moscow 119334 Russia Russian Univ Transport MIIT Moscow 127994 Russia

The paper is devoted to the evaluation of energy efficiency of High Performance Computing systems used in a scientific supercomputer center. The authors propose a method for the comparison of energy efficiency of computing systems based on the power consumption and execution time of parallel programs. The paper presents a software tool that allows to determine the energy consumption profile of a parallel program automatically without changing its source code. The paper also presents the results of power consumption comparison of NAS parallel Benchmarks (BT, EP, IS, and LU) tests on computing systems with codenames Intel microprocessors Broadwell, Cascade Lake, Knights Landing and Skylake).

关键词： supercomputer energy efficiency power consumption profile parallel program high performance computing system HPC NAS parallel Benchmarks Intel

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Safety Mechanism Design and Verification of Safety Computer parallel program

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Chinese Journal of Electronics 2018年第6期27卷 1163-1169页

作者： ZHANG Yuzhuo HONG Chunhua CAO Yuan MA Lianchuan WEN Yinghong School of Electronic and Information Engineering Beijing Jiaotong University National Engineering Research Center of Rail Traffic Control System Beijing Jiaotong University

The extensive application of Commercial off-the-shelf(COTS) components into safety computers in train control systems has caused safety problems. Aiming at the parallel programs, a concurrent program safety management mechanism based on transactional memory is proposed. The proposed mechanism implements concurrent behaviors of the application in the safe policy. A verification framework based on invariant proof and parallel separation logic theory is designed and operating system operation semantics are given for mathematical reasoning and proving. An example of code execution process is demonstrated to explain the safety control process of concurrent safety mechanism. The results indicate that the program can meet the safety and reliability requirements of concurrent safety computer platforms.

关键词： Safety computer parallel program Transactional memory Invariant proof Concurrent separation logic

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Predicting HPC parallel program performance based on LLVM compiler

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CLUSTER COMPUTING-THE JOURNAL OF NETWORKS SOFTWARE TOOLS AND APPLICATIONS 2017年第2期20卷 1179-1192页

作者： Zhang, Weizhe Hao, Meng Snir, Marc Harbin Inst Technol Sch Comp Sci & Technol Harbin Peoples R China Univ Illinois Dept Comp Sci Champaign IL USA

Performance prediction of parallel program plays key roles in many areas, such as parallel system design, parallel program optimization, and parallel system procurement. Accurate and efficient performance prediction on large-scale parallel systems is a challenging problem. To solve this problem, we present an effective framework for performance prediction based on the LLVM compiler technique in this paper. We can predict the performance of a parallel program on a small amount of nodes of the target parallel system using this framework toned but not execute this parallel program on a corresponding full-scale parallel system. This framework predicts the performance of computation and communication components separately and combines the two predictions to achieve full program prediction. As for sequential computation, we first combine the static branch probability and loop trip count identification and propose a new instrumentation method to acquire the number of each instruction type. We then construct a test program to measure the average execution time of each instruction type. Finally, we utilize the pruning technique to convert a parallel program into a corresponding sequential program to predict the performance on only one node of the target parallel system. As for communication, we utilize the LogGP model to model point-to-point communication and the artificial neural network technique to model collective communication. We validate our approach by a set of experiments that predict the performance of NAS parallel benchmarks and CGPOP parallel application. Experimental results show that the proposed framework can accurately predict the execution time of parallel programs, and the average error rate of these programs is 10.86%.

关键词： parallel program Performance prediction Loop trip count Artificial neural network LLVM

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Space-based parallel program design process with high-level communication channels

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JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS 2017年第4期40卷 347-354页

作者： Lee, Tsung Huang, Yao-Yi Natl Sun Yat Sen Univ Dept Elect Engn Kaohsiung Taiwan

In this research, we reduce design complexity of parallel programs by performing the design task at the high level. We devised a formalism of the parallel program design process to support space-based parallel program design. In this formalism, program designs are captured in entity spaces. Entity spaces, including data spaces, tasks, etc. can be subdivided and freely distributed into logical node clusters that are assigned to processes. We designed high-level communication channels for communication among divided subtasks in a parallel program for space-based communication integration. Supported program models range in single program multiple data, multiple program multiple data, and their hybrid model. We designed single-space and cross-space high-level communication channels with various communication topologies. They are specified externally and decoupled from a parallel program. This makes the program logical and easily designed and reused. A practical example is used for illustrating the design process.

关键词： parallel program middleware software engineering communication channel

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Use LLVM for Optimization of parallel Execution of program Code on the Certain Configuration 12

Use LLVM for Optimization of Parallel Execution of Program C...

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12th International Conference on Elektro

作者： Ivutin, Alexey N. Troshina, Anna G. Tula State Univ Dept Comp Technol Tula Russia

ISBN: (纸本)9781538647592

Automating of parallelization requires the analysis of program code from the point of view of semantic relations between operations. At the same time, up-to-date tools for automation of parallelization usually have a number of restrictions related to binding the parallelization system to the language on which the source code is written. The other restrictions appear from requirement to indicate the blocks in program code should be implemented in parallel or even make some "modifications" of the code in manual mode. The LLVM system provides manifold possibilities for automation of code analysis and optimization for its subsequent parallel execution. The article discusses the approach to parallelization of sequential program code by using LLVM for code analysis and its presentation in the form of semantic Petri-Markov nets.

关键词： parallel program semantic Petri-Markov nets semantic relations simulation parallelization LLVM

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Reverse Engineering of Dynamic parallel program Behavior from Execution Traces 22

Reverse Engineering of Dynamic Parallel Program Behavior fro...

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22nd IEEE International Conference on parallel and Distributed Systems (ICPADS)

作者： Tsai, Shin-Chieh Chang, Chiu-Ping King, Chung-Ta Natl Tsing Hua Univ Dept Comp Sci Hsinchu Taiwan

ISBN: (纸本)9781509044573

Trace-driven simulation has been used widely for architectural exploitation in electronic system-level (ESL) designs for complex SoCs (system-on-chips). Most often the trace files are provided by third parties without source code. This makes it difficult to process and manipulate the trace files, e.g. to identify the region of interest (ROI), for efficient and more focused simulations. It is thus necessary to deduce high-level structures and patterns in the trace to facilitate such manipulations. This can be viewed as a reverse engineering process to derive the dynamic control flow of the original program from its execution trace. Furthermore, after the high-level structure is manipulated, it is also important to generate a new trace from the resultant structure that preserves the characteristics of the original trace for effective trace-driven simulations. The problem becomes even more difficult if the trace was generated from a parallel program because of the complex interactions between the multiple threads of executions. In this paper, a novel scheme to reverse-engineering the program execution trace is proposed, which can obtain the high-level dynamic control structure of the original parallel program as well as regenerate a similar trace from the derived structure, all without referencing the source code. The effectiveness of the proposed scheme is evaluated and verified with extensive experiments.

关键词： Execution traces finite-state machine parallel program reverse engineering trace-driven simulation

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User-level failure detection and auto-recovery of parallel programs in HPC systems

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Frontiers of Computer Science 2021年第6期15卷 31-42页

作者： Guozhen ZHANG Yi LIU Hailong YANG Jun XU Depei QIAN State Key Laboratory of Software Development Environment Beijing 100191China Sino-German Joint Software Institute Beihang UniversityBeijing 100191China School of Computer Science and Engineering Beihang UniversityBeijing 100191China Science and Technology on Space System Simulation Laboratory Beijing Simulation Center Beijing 100854China

As the mean-time-between-failures(MTBF)continues to decline with the increasing number of components on large-scale high performance computing(HPC)systems,program failures might occur during the execution period with high *** successful execution of the HPC programs has become an issue that the unprivileged users should be *** the user perspective,if the program failure cannot be detected and handled in time,it would waste resources and delay the progress of program ***,the unprivileged users are unable to perform program state checking due to execution control by the job management system as well as the limited ***,automated tools for supporting user-level failure detection and autorecovery of parallel programs in HPC systems are *** paper proposes an innovative method for the unprivileged user to achieve failure detection of job execution and automatic resubmission of failed *** state checker in our method is encapsulated as an independent job to reduce interference with the user *** addition,we propose a dual-checker mechanism to improve the robustness of our *** implement the proposed method as a tool named automatic re-launcher(ARL)and evaluate it on the Tianhe-2 *** results show that ARL can detect the execution failures effectively on Tianhe-2 *** addition,the communication and performance overhead caused by ARL is *** good scalability of ARL makes it applicable for large-scale HPC systems.

关键词： high performance computing parallel program failure detection failure auto-recovery

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Impact of parallel Code Optimization on Computer Power Consumption

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LOBACHEVSKII JOURNAL OF MATHEMATICS 2023年第12期44卷 5306-5319页

作者： Kiselev, E. A. Telegin, P. N. Baranov, A. V. Russian Acad Sci Joint Supercomp Ctr Sci Res Inst Syst Anal Moscow 119334 Russia

The increase in performance and power of computing systems requires the wider use of program optimizations. The goal of performing optimizations is not only to reduce program runtime, but also to reduce other computer resources including power consumption. The goal of the study was to evaluate the impact of different optimization levels and various optimization strategies on power consumption. In a series of experiments, it was established that the average power consumption tends to peak for the programs with optimized source code. The articles also describes the impact of changing computer architecture on power consumption graphs. The relationships between the average and median values of power consumption by example programs are considered. The possibility of creating program energy consumption profile for a parallel program is shown.

关键词： supercomputer energy efficiency power consumption profile parallel program high performance computing system HPC program optimization

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Energy optimization of parallel programs in a heterogeneous system by combining processor core-shutdown and dynamic voltage scaling

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FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE 2019年 92卷 198-209页

作者： Wang, Zhuowei Wang, Hao Zhao, Wuqing Cheng, Lianglun Guangdong Univ Technol Sch Comp Guangzhou 510006 Guangdong Peoples R China Norwegian Univ Sci & Technol Dept ICT & Nat Sci Trondheim Norway Dingxin Informat Technol Co Ltd Guangzhou 510006 Guangdong Peoples R China

Reducing power consumption and improving efficiency are important aspects of the development of supercomputers into large-scale systems. As a result, heterogeneous systems have become an important development trend in high-performance computing. From the perspective of heterogeneous systems, this study establishes a model for energy optimization of parallel programs (EOPP) and puts forward a method of using it. By considering the energy overheads caused by re-synchronization, voltage switching, and operations in critical sections, the model effectively combines processor core-shutdown and dynamic voltage scaling technologies, which can be applied in a heterogeneous system to guide the optimization process. The results show that the proposed model can effectively reduce the energy consumption of parallel programs. Moreover, increasing the proportion of operations in the critical section enhances the optimal frequency of a processor while decreasing the probability of conflicts in the critical section. It can thus provide optimization space for reducing the frequency of a processor which ultimately reduces the energy overhead of the system. (C) 2018 Elsevier B.V. All rights reserved.

关键词： Energy optimization parallel program Heterogeneous system Processor core-shutdown Dynamic voltage scaling

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Genetic algorithm based test data generation for MPI parallel programs with blocking communication

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JOURNAL OF SYSTEMS AND SOFTWARE 2019年第0期155卷 130-144页

作者： Tian, Tian Gong, Dunwei Kuo, Fei-Ching Liu, Huai Shandong Jianzhu Univ Sch Comp Sci & Technol Jinan 250101 Shandong Peoples R China China Univ Min & Technol Sch Informat & Control Engn Xuzhou 221116 Jiangsu Peoples R China Swinburne Univ Technol Dept Comp Sci & Software Engn Hawthorn Vic 3122 Australia

parallel computing is one of mainstream techniques for high-performance computation in which MPI parallel programs have gained more and more attention. Genetic algorithms (GAs) have been widely employed in automated test data generation, leading to a major family of search-based software testing techniques. However, previous GA-based methods have limitations when testing MPI parallel programs with blocking communication. In this paper, we focus on the path coverage problem for MPI parallel programs with blocking communication, and formulate the problem as an optimization problem with its decision variable being the program input and the execution order of sending nodes. In addition, we develop target amending strategies for candidates when solving the problem using genetic algorithms. The proposed method is evaluated and compared with several state-of-the-art methods through a series of controlled experiments on five typical programs. The experimental results show that the proposed method can effectively and efficiently generate test data for path coverage. (C) 2019 Elsevier Inc. All rights reserved.

关键词： parallel program Blocking communication Path coverage Test data Genetic algorithm

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