We present a new parallel programming tool environment that is (1) accessible and executable "anytime, anywhere," through standard Web browsers and (2) integrated in that it provides tools that adhere to a c...
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Final group projects are an integral part of the graduate mechatronics course, "Introduction to Mechatronics", in the Woodruff School of Mechanical Engineering at Georgia Tech. Students are able to develop b...
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Final group projects are an integral part of the graduate mechatronics course, "Introduction to Mechatronics", in the Woodruff School of Mechanical Engineering at Georgia Tech. Students are able to develop both practical and theoretical understanding of mechatronics while working on their final group projects. They also develop interpersonal and communication skills necessary to work in a multi-disciplinary field. To assist students, a framework has been developed to help them realize goals they propose for their final group project. It helps them to work effectively within a team environment and present their projects utilizing different media outlets, such as writing technical reports, developing web pages for their final group projects, and making oral presentations. This framework includes lecture topics covered in class, project requirements, grading methods, material resources, and support from graduate teaching assistants, electronic, and machine shop. In this paper, the framework and example projects demonstrating its effectiveness will be presented.
Commodities-built clusters, a low cost alternative for distributed parallel processing, brought high-performance computing to a wide range of users. However, the existing widespread tools for distributed parallel prog...
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Commodities-built clusters, a low cost alternative for distributed parallel processing, brought high-performance computing to a wide range of users. However, the existing widespread tools for distributed parallel programming, such as messaging passing libraries, does not attend new software engineering requirements that have emerged due to increase in complexity of applications. Haskell/sub #/ is a parallel programming language intending to reconcile higher abstraction and modularity with scalable performance. It is demonstrated the use of Haskell/sub #/ in the programming of three SPMD benchmark programs, which have lower-level MPI implementations available.
The following topics are dealt with: advanced tools for parallel and distributed programming; architectures and compilers; cluster computing; memory hierarchies; scheduling and load balancing; interconnection networks...
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The following topics are dealt with: advanced tools for parallel and distributed programming; architectures and compilers; cluster computing; memory hierarchies; scheduling and load balancing; interconnection networks; grid computing; distributed algorithms and systems; programming tools and methodologies; parallel algorithms; performances analysis; Web computing; and QoS in mobile networking.
Despite the enormous amount of research and development work in the area of parallel computing, it is a common observation that simultaneous performance and ease-of-use are elusive. We believe that ease-of-use is crit...
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ISBN:
(纸本)9780769519654
Despite the enormous amount of research and development work in the area of parallel computing, it is a common observation that simultaneous performance and ease-of-use are elusive. We believe that ease-of-use is critical for many end users, and thus seek performance enhancing techniques that can be easily retrofitted to existing parallel applications. In a precious paper we have presented MPI (message passing interface) process swapping, a simple add-on to the MPI programming environment that can improve performance in shared computing environments. MPI process swapping requires as few as three lines of source code change to an existing application. In this paper we explore a question that we had left open in our previous work: based on which policies should processes be swapped for best performance? Our results show that, with adequate swapping policies, MPI process swapping can provide substantial performance benefits with very limited implementation effort.
The emergence of system-on-chip (SOC) design shows the growing popularity of the integration of multiple-processors into one chip. We propose that high-level abstraction of parallel programming like OpenMP is suitable...
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The emergence of system-on-chip (SOC) design shows the growing popularity of the integration of multiple-processors into one chip. We propose that high-level abstraction of parallel programming like OpenMP is suitable for chip multiprocessors. For SOCs, the heterogeneity exists within one chip such that it may have different types of multiprocessors, e.g. RISC-like processors or DSP-like processors. Incorporating different processors into OpenMP is challenging. We present our solutions to extend OpenMP directives to tackle this heterogeneity. Several optimization techniques are proposed to utilize advanced architecture features of our target SOC, the software scalable system on chip (3SoC). Preliminary performance evaluation shows scalable speedup using different types of processors and performance improvement through individual optimization.
The steady increase of computing power at lower and lower cost enables molecular dynamics simulations to investigate the process of protein folding with an explicit treatment of water molecules. Such simulations are t...
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ISBN:
(纸本)9780769519197
The steady increase of computing power at lower and lower cost enables molecular dynamics simulations to investigate the process of protein folding with an explicit treatment of water molecules. Such simulations are typically done with well known computational chemistry codes like CHARMM. Desktop grids such as the United Devices MetaProcessor are highly attractive platforms, since scavenging for unused machines on Intra- and Internet delivers compute power that is almost free. However, the predominant programming paradigm for current desktop grids is pure task parallelism and might not fit the needs for protein folding simulations with explicit water molecules. A short overall turn-around time of a simulation remains highly important for research productivity, but the need for an accurate model and long simulation time-scales leads to tasks that are too large for optimal scheduling on a desktop grid. To address this problem, we introduce a combination of task- and data parallelism as a well suitable computing paradigm for protein folding investigations on grid platforms. As a proof of concept, we design and implement a simple system for protein folding simulations based on the notion of combined task and data parallelism with clustered workers. Clustered workers are machines grouped into small clusters according to network and CPU performance criteria and act as super-nodes within a desktop grid, permitting the utilization of data parallelism in addition to the task parallelism. We integrate our new paradigm into the existing software environment of the United Devices MetaProcessor. For a test protein, we reach a better quality of the folding calculations than we reached using just task parallelism on distributed systems.
Performance obtained with existing library-based parallelization tools for implementing high performance image processing applications is often sub-optimal. This is because inter-operation optimization (or: optimizati...
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Performance obtained with existing library-based parallelization tools for implementing high performance image processing applications is often sub-optimal. This is because inter-operation optimization (or: optimization across library calls) is often not incorporated in the library implementations. This paper presents a simple, efficient, finite state machine-based method for global performance optimization, called 'lazy parallelization'. Experimental results based on this approach show significant performance improvements over non-optimized parallel implementations.
In this paper, we show how to use Verilog HDL along with PLI (programming Language Interface) to model asynchronous circuits at the behavioral level by implementing CSP (Communicating Sequential Processes) language co...
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ISBN:
(纸本)9781581136883
In this paper, we show how to use Verilog HDL along with PLI (programming Language Interface) to model asynchronous circuits at the behavioral level by implementing CSP (Communicating Sequential Processes) language constructs. Channels and communicating actions are modeled in Verilog HDL as abstract actions.
The system being developed is a power system module that will calculate load flow processes and outputting results for better understanding of the grid being analyzed. A dedicated multiprocessors system is developed t...
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The system being developed is a power system module that will calculate load flow processes and outputting results for better understanding of the grid being analyzed. A dedicated multiprocessors system is developed to suit the purpose. The multiprocessors will utilize low-cost and readily available processors. At the moment, there are only three (3), computers will be connected as a multiprocessors system. Beowulf Linux clustering is implemented to create a 'supercomputer' like environment of the multiprocessor system. Through Linux stable operating system environment, the program would simulate the network using Newton-Raphson iterations to produce results. Fast solutions are enabled using parallel programming and load balancing technique among the multiprocessors system. User-friendly interface is created for easy access and easy interaction with the program and data input. Any trained personnel can monitor the system using the wide 21" screen that will also display the status of other processors currently working.
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