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The cluster coffer: Teaching HPC on the road

JOURNAL OF parallel AND DISTRIBUTED COMPUTING 2021年 155卷 50-62页

作者： Gschwandtner, Philipp Hirsch, Alexander Thoman, Peter Zangerl, Peter Jordan, Herbert Fahringer, Thomas Univ Innsbruck Technikerstr 21a Innsbruck Austria

Teaching parallel programming and HPC is a difficult task. There is a large number of sophisticated hardware and software components, each complex on their own and often showing non-intuitive interaction when used in combination. We consider education in HPC among the more difficult topics in computer science due to the fact that larger distributed memory systems are ubiquitous yet inaccessible and intangible to students. In this work, we present the Cluster Coffer, a miniature cluster computer based on 16 ARM compute boards that we believe is suitable for reducing the entry barrier to HPC in teaching and public outreach. We discuss our design goals for providing a portable, inexpensive system that is easy to maintain and repair. We outline the implementation path we took in terms of hardware and software, in order to provide others with the information required to reproduce and extend our work. Finally, we present two use cases for which the Cluster Coffer has been used multiple times, and will continue to be used in the upcoming years. (C) 2021 Elsevier Inc. All rights reserved.

关键词： High performance computing Teaching parallel programming Portability Public outreach

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Transformations of High-Level Synthesis Codes for High-Performance Computing

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IEEE TRANSACTIONS ON parallel AND DISTRIBUTED SYSTEMS 2021年第5期32卷 1014-1029页

作者： de Fine Licht, Johannes Besta, Maciej Meierhans, Simon Hoefler, Torsten Univ Zurich Dept Comp Sci ETH Zurich CH-8092 Zurich Switzerland

Spatial computing architectures promise a major stride in performance and energy efficiency over the traditional load/store devices currently employed in large scale computing systems. The adoption of high-level synthesis (HLS) from languages such as C++ and OpenCL has greatly increased programmer productivity when designing for such platforms. While this has enabled a wider audience to target spatial computing architectures, the optimization principles known from traditional software design are no longer sufficient to implement high-performance codes, due to fundamentally distinct aspects of hardware design, such as programming for deep pipelines, distributed memory resources, and scalable routing. To alleviate this, we present a collection of optimizing transformations for HLS, targeting scalable and efficient architectures for high-performance computing (HPC) applications. We systematically identify classes of transformations (pipelining, scalability, and memory), the characteristics of their effect on the HLS code and the resulting hardware (e.g., increasing data reuse or resource consumption), and the objectives that each transformation can target (e.g., resolve interface contention, or increase parallelism). We show how these can be used to efficiently exploit pipelining, on-chip distributed fast memory, and on-chip dataflow, allowing for massively parallel architectures. To quantify the effect of various transformations, we cover the optimization process of a sample set of HPC kernels, provided as open source reference codes. We aim to establish a common toolbox to guide both performance engineers and compiler engineers in tapping into the performance potential offered by spatial computing architectures using HLS.

关键词： Pipeline processing Hardware Computer architecture Optimization Software Performance evaluation Registers parallel architectures parallel programming high performance computing

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uBlade: Efficient Batch Processing for Uncertainty Graph Queries

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Proceedings of the ACM on Management of Data 2024年第3期2卷 1-24页

作者： Siyuan Yao Yuchen Li Shixuan Sun Jiaxin Jiang Bingsheng He Singapore Management University & National University of Singapore Singapore Singapore Singapore Management University Singapore Singapore Shanghai Jiao Tong University Shanghai China National University of Singapore Singapore Singapore

The study of uncertain graphs is crucial in diverse fields, including but not limited to protein interaction analysis, viral marketing, and network reliability. Processing queries on uncertain graphs presents formidable challenges due to the vast probabilistic space they encapsulate. While existing systems employ batch processing to address these challenges, their performance is often compromised by the suboptimal selection of parallel graph traversal methods, the excessive costs in random number generation, and additional workloads intrinsic to batch processing. In this paper, we introduce uBlade, an efficient batch-processing framework for uncertain graph queries on multi-core CPUs. uBlade utilizes the work-efficient graph traversal, achieving superior parallelism in the batch processing model. Additionally, our Quasi-Sampling technique reduces the random number generation cost by a factor of B, with O(B) denoting the batch size. We further examine the extra workload resulting from batch processing and introduce an efficient strategy to reorder possible worlds, minimizing this associated overhead. Through comprehensive evaluations, we showcase that uBlade achieves up to two orders of magnitude speedups against the state-of-the-art CPU and GPU-based solutions.

关键词： graph algorithms parallel programming uncertain graphs

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OpenCL-Darknet: implementation and optimization of OpenCL-based deep learning object detection framework

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WORLD WIDE WEB-INTERNET AND WEB INFORMATION SYSTEMS 2021年第4期24卷 1299-1319页

作者： Koo, Yongbon Kim, Sunghoon Ha, Young-guk Elect & Telecommun Res Inst 218 Gajeong Ro Daejeon South Korea Konkuk Univ 120 Neungdong Ro Seoul South Korea

Object detection is a technology that deals with recognizing classes of objects and their location. It is used in many different areas, such as in face-detecting systems [16, 34, 37], surveillance tools [9], human-machine interfaces [17], and self-driving cars [18, 23, 25, 26, 30]. These days, deep learning object detection approaches have achieved significantly better performance than the classical feature-based algorithms. Darknet [31] is a deep learning object detection framework, which is well known for its fast speed and simple structure. Unfortunately, Darknet can only work with Nvidia CUDA [6] for accelerating its deep learning calculations. For this reason, users have only limited options of selecting appropriate graphic cards. Open computing language (OpenCL) [35], an open standard for cross-platform, parallel programming of heterogeneous systems, is available for the general hardware accelerators. However, many deep learning frameworks including Darknet have no support for OpenCL. In our previous paper, we presented OpenCL-Darknet [19], which transformed the CUDA-based Darknet into an open standard OpenCL backend. The original OpenCL-Darknet successfully showed its ability for the general graphics processing unit (GPU) hardware. However, it could not achieve competitive performance compared with the CUDA version, and it only supported a limited platform. In this study, we improved the performance of OpenCL-Darknet with several optimization techniques and added support for various architectures. We also evaluated OpenCL-Darknet not only in AMD R7 accelerated processing unit (APU) with OpenCL 2.0, but also in Nvidia GPU and ARM Mali embedded GPU with OpenCL 1.2 Profile. The evaluation using the standard object detection datasets showed that our advanced OpenCL-Darknet reduced the processing time by at most 50% on average for various deep learning object detection networks compared with our original implementation. We also showed that our OpenCL deep learning

关键词： deep learning image processing object detection parallel programming OpenCL

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A Data-Aware Scheduling Strategy for Executing Large-Scale Distributed Workflows

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IEEE ACCESS 2021年 9卷 47354-47364页

作者： Giampa, Salvatore Belcastro, Loris Marozzo, Fabrizio Talia, Domenico Trunfio, Paolo Univ Calabria DIMES I-87036 Arcavacata Di Rende Italy Univ Calabria DtoK Lab Srl I-87036 Arcavacata Di Rende Italy

Task scheduling is a crucial key component for the efficient execution of data-intensive applications on distributed environments, by which many machines must be coordinated to reduce execution times and bandwidth consumption. This paper presents ADAGE, a data-aware scheduler designed to efficiently execute data-intensive workflows in large-scale computers. The proposed scheduler is based on three key features: i) critical path analysis, for discovering the critical tasks of a workflow and reducing data transferring between nodes;ii) work giving, a new dynamic planning strategy for migrating tasks from overloaded to unloaded nodes;and iii) task replication, which executes task replicas on different nodes for improving both execution time and fault tolerance. Experiments performed on a distributed computing environment composed of up to 1,024 processing nodes show that ADAGE achieves better performances than existing scheduling systems, obtaining an average reduction of up to 66% in execution time.

关键词： Data-aware scheduler workflow scheduling distributed workflows parallel programming distributed computing exascale computing

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Improving parallelism in Git and GNU Compiler Collection: Strategies, Difficulties, and Lessons Learned

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IEEE SOFTWARE 2021年第5期38卷 92-100页

作者： Bernardino, Matheus Tavares Belinassi, Giuliano Meirelles, Paulo Guerra, Eduardo Martins Goldman, Alfredo Univ Sao Paulo Comp Sci Sao Paulo Brazil Univ Fed Sao Paulo Sao Paulo Brazil Free Univ Bozen Bolzano Bolzano Italy Univ Sao Paulo Sao Paulo Brazil

This article presents approaches for performance improvements into two large and well-known open source projects, Git and GNU Compiler Collection, using parallel programming. We share the difficulties faced and the st... 详细信息

关键词： parallel programming Program Compilers Public Domain Software Git GNU Compiler Collection parallel programming Similar parallelization Processes parallelism Performance Improvements Open Source Projects Optimization parallel Processing Instruction Sets Open Source Software Performance Evaluation parallelism And Concurrency parallel Systems Compilers Version Control GCC Git Conversion From Sequential To parallel Forms

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Latency-aware adaptive micro-batching techniques for streamed data compression on graphics processing units

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2021年第11期33卷 e5786-e5786页

作者： Stein, Charles M. Rockenbach, Dinei A. Griebler, Dalvan Torquati, Massimo Mencagli, Gabriele Danelutto, Marco Fernandes, Luiz G. Tres de Maio Fac SETREM Lab Adv Res Cloud Comp Tres De Maio Brazil Pontifical Catholic Univ Rio Grande Sch Technol Ipiranga Ave Porto Alegre 6681 RS Brazil Univ Pisa Comp Sci Dept Pisa Italy

Stream processing is a parallel paradigm used in many application domains. With the advance of graphics processing units (GPUs), their usage in stream processing applications has increased as well. The efficient utilization of GPU accelerators in streaming scenarios requires to batch input elements in microbatches, whose computation is offloaded on the GPU leveraging data parallelism within the same batch of data. Since data elements are continuously received based on the input speed, the bigger the microbatch size the higher the latency to completely buffer it and to start the processing on the device. Unfortunately, stream processing applications often have strict latency requirements that need to find the best size of the microbatches and to adapt it dynamically based on the workload conditions as well as according to the characteristics of the underlying device and network. In this work, we aim at implementing latency-aware adaptive microbatching techniques and algorithms for streaming compression applications targeting GPUs. The evaluation is conducted using the Lempel-Ziv-Storer-Szymanski compression application considering different input workloads. As a general result of our work, we noticed that algorithms with elastic adaptation factors respond better for stable workloads, while algorithms with narrower targets respond better for highly unbalanced workloads.

关键词： data compression algorithms dynamic reconfiguration parallel programming service level objective stream parallelism stream processing

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Matrix Multiplication Analysis on Sequential and parallel Computation using CUDA 1

Matrix Multiplication Analysis on Sequential and Parallel Co...

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1st International Conference on Technology Innovation and Its Applications, ICTIIA 2022

作者： Hudi, Robertus Kartika, Alessandro Luiz Marcell, Dave Joshua Renatan, Winston Universitas Pelita Harapan Computer Science Department Tangerang Indonesia

ISBN: (数字)9781665488266

ISBN: (纸本)9781665488266

This paper aimed to implement both sequential and parallel implementations using CUDA on matrix multiplication to see the differences and effects of it, followed by an analysis of the result. We used the algorithm as that will be elaborated more on the paper, here we would like to generally compare its memory consumption and run time. It is found out that parallel implementation runs faster on an average of 31.23 compared to sequential implementation running the same task. This faster result on parallel programming comes with a trade-off that it consumes more memory rather than sequential implementation. Optimum threads to be used in parallel programming is also needed to be found, here we try to find it with trial-and-error testing. Further research would involve more complex parallel programming implementation and a more controlled testing environment. © 2022 IEEE.

关键词： parallel programming

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Precision Tuning in parallel Applications 13

Precision Tuning in Parallel Applications

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13th Workshop on parallel programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2022

作者： Magnani, Gabriele Denisov, Lev Cattaneo, Daniele Agosta, Giovanni DEIB Politecnico di Milano Italy

ISBN: (纸本)9783959772310

Nowadays, parallel applications are used every day in high performance computing, scientific computing and also in everyday tasks due to the pervasiveness of multi-core architectures. However, several implementation challenges have so far stifled the integration of parallel applications and automatic precision tuning. First of all, tuning a parallel application introduces difficulties in the detection of the region of code that must be affected by the optimization. Moreover, additional challenges arise in handling shared variables and accumulators. In this work we address such challenges by introducing OpenMP parallel programming support to the TAFFO precision tuning framework. With our approach we achieve speedups up to 750% with respect to the same parallel application without precision tuning. © 2022 Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing. All rights reserved.

关键词： Compilers parallel programming Precision Tuning

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A multi-skilled workforce optimisation in maintenance logistics networks by multi-thread simulated annealing algorithms

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INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH 2021年第9期59卷 2624-2646页

作者： Turan, Hasan Huseyin Kosanoglu, Fuat Atmis, Mahir Univ New South Wales Capabil Syst Ctr Canberra ACT Australia Yalova Univ Dept Ind Engn Yalova Turkey

The sustainability of service and manufacturing operations rely heavily on the availability of equipment and assets. High availability of assets can be achieved with effective maintenance strategies. In this direction, we study a multi-skilled workforce planning problem to establish a resilient maintenance service network for high-value assets. We improve the efficiency of the maintenance network by optimising the workforce capacity in repair shops and achieving workforce heterogeneity by cross-training. As a solution strategy, we develop a two-stage iterative heuristic algorithm. At the first stage, the set of all feasible cross-training policies is effectively and systematically searched via a state-of-art multi-thread simulated annealing (MTSA) metaheuristic to find a policy(ies) that achieves the minimum cost. Further, the developed MTSA algorithm is enhanced with the multi-neighbourhood feature to escape from local optimality and implemented via parallel programming techniques. In the second stage, workforce capacity and spare parts inventory levels are optimised for the cross-training policy found at the first stage by a queuing approximation and a greedy heuristic. The MTSA obtains the lowest cost in 91 cases out of 128 compared to genetic algorithm (GA), variable neighbourhood search (VNS), an improved single-thread simulated annealing algorithm (SA) and integer programming-based clustering (IPBC) algorithms.

关键词： maintenance logistics repair shop cross-training multi-thread simulated annealing queuing approximation parallel programming

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