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arXiv 2022年

作者： Bhattarai, Manish Kharat, Namita Skau, Erik Nebgen, Benjamin Djidjev, Hristo Rajopadhye, Sanjay Smith, James P. Alexandrov, Boian Theoretical Division Los Alamos National Laboratory Los AlamosNM87544 United States Computer Computational and Statistical Science Division Los Alamos National Laboratory Los AlamosNM87544 United States Institute of Information and Communication Technologies Bulgarian Academy of Sciences Sofia Bulgaria The Computer Computational and Statistical Science Division Los Alamos National Laboratory Los AlamosNM87544 United States Department of Computer Science CSU Fort CollinsCO80523 United States

With the boom in the development of computer hardware and software, social media, IoT platforms, and communications, there has been an exponential growth in the volume of data produced around the world. Among these data, relational datasets are growing in popularity as they provide unique insights regarding the evolution of communities and their interactions. Relational datasets are naturally non-negative, sparse, and extra-large. Relational data usually contain triples, (subject, relation, object), and are represented as graphs/multigraphs, called knowledge graphs, which need to be embedded into a low-dimensional dense vector space. Among various embedding models, RESCAL allows learning of relational data to extract the posterior distributions over the latent variables and to make predictions of missing relations. However, RESCAL is computationally demanding and requires a fast and distributed implementation to analyze extra-large real-world datasets. Here we introduce a distributed non-negative RESCAL algorithm for heterogeneous CPU/GPU architectures with automatic selection of the number of latent communities (model selection), called pyDRESCALk. We demonstrate the correctness of pyDRESCALk with real-world and large synthetic tensors, and the efficacy showing near-linear scaling that concurs with the theoretical complexities. Finally, pyDRESCALk determines the number of latent communities in an 11-terabyte dense and 9-exabyte sparse synthetic tensor. Copyright © 2022, The Authors. All rights reserved.

关键词： parallel programming

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parallelization of Local Neighborhood Difference Pattern Feature Extraction using GPU

Parallelization of Local Neighborhood Difference Pattern Fea...

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Knowledge Engineering and Communication Systems (ICKECS), International Conference on

作者： Arisetty Sree Ashish Ashwath Rao B Department of Computer Science and Engineering Manipal Institute of Technology Manipal Academy of Higher Education Manipal Karnataka India

One of the various techniques employed for image feature extraction is the Local Neighborhood Difference Pattern, also called as LNDP. LNDP considers the relationship between neighbors of a central pixel with its adjacent pixels and transforms this mutual relationship of all the neighboring pixels into a binary pattern. It has proven to be a powerful and effective descriptor for texture analysis. A parallel implementation of LNDP using Compute Unified Device Architecture (CUDA) has been proposed in this paper. A speedup of about 1000 times has been achieved through a shared memory parallel implementation for large images. Thus, an efficacious and efficient implementation has resulted in an increased execution speed and reduced execution time.

关键词： Knowledge engineering parallel programming Communication systems Face recognition Graphics processing units Computer architecture Transforms

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programming Bare-Metal Accelerators with Heterogeneous Threading Models: A Case Study of Matrix-3000

arXiv

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arXiv 2022年

作者： Fang, Jianbin Zhang, Peng Huang, Chun Tang, Tao Lu, Kai Wang, Ruibo Wang, Zheng School of Computer Science and Technology National University of Defense Technology Changsha410073 China School of Computing University of Leeds LeedsLS2 9JT United Kingdom

As the hardware industry moves towards using specialized heterogeneous many-cores to avoid the effects of the power wall, software developers are finding it hard to deal with the complexity of these systems. This article shares our experience when developing a programming model and its supporting compiler and libraries for Matrix-3000, which is designed for next-generation exascale supercomputers but has a complex memory hierarchy and processor organization. To assist its software development, we developed a software stack from scratch that includes a low-level programming interface and a high-level OpenCL compiler. Our low-level programming model offers native programming support for using the bare-metal accelerators of Matrix-3000, while the high-level model allows programmers to use the OpenCL programming standard. We detail our design choices and highlight the lessons learned from developing systems software to enable the programming of bare-metal accelerators. Our programming models have been deployed to the production environment of an exascale prototype system. © 2022, CC BY.

关键词： parallel programming

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Vectorizing sparse matrix computations with partially-strided codelets 22

Vectorizing sparse matrix computations with partially-stride...

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Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis

作者： Kazem Cheshmi Zachary Cetinic Maryam Mehri Dehnavi University of Toronto Toronto Canada

The compact data structures and irregular computation patterns in sparse matrix computations introduce challenges to vectorizing these codes. Available approaches primarily vectorize strided computation regions of a sparse code. In this work, we propose a locality-based codelet mining (LCM) algorithm that efficiently searches for strided and partially strided regions in sparse matrix computations for vectorization. We also present a classification of partially strided codelets and a differentiation-based approach to generate codelets from memory accesses in the sparse computation. LCM is implemented as an inspector-executor framework called LCM I/E that generates vectorized code for the sparse matrix-vector multiplication (SpMV), sparse matrix times dense matrix (SpMM), and sparse triangular solver (SpTRSV). LCM I/E outperforms the MKL library with an average speedup of 1.67×, 4.1×, and 1.75× for SpMV, SpTRSV, and SpMM, respectively. It is also faster than the state-of-the-art inspector-executor framework Sympiler [1] for the SpTRSV kernel with an average speedup of 1.9×.

关键词： parallel programming vectorization sparse matrix computation polyhedral analysis

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A Message Passing Interface Library for High-Level Synthesis on Multi-FPGA Systems

A Message Passing Interface Library for High-Level Synthesis...

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IEEE International Symposium on Embedded Multicore Socs (MCSoC)

作者： Kazuei Hironaka Kensuke Iizuka Hideharu Amano Dept. of Information and Computer Science Keio University Yokohama Japan

ISBN: (纸本)9781665465007

One obstacle to application development on multi-FPGA systems with high-level synthesis (HLS) is a lack of support for a programming interface. Implementing and debugging an application on multiple FPGA boards is difficult without a standard interface. Message Passing Interface (MPI) is a standard parallel programming interface commonly used in distributed memory systems. This paper presents a tool-independent MPI library called FiC-MPI that can be used in HLS for multi-FPGA systems in which each FPGA node is connected directly. By using FiC-MPI, various parallel software, including a general-purpose benchmark, can be easily implemented. FiC-MPI was implemented and evaluated on the M-KUBOS cluster consisting of Zynq MPSoC boards connected with a static time-division multiplexing network. By using the FiC-MPI simulator, parallel programs can be debugged before implementing on real machines. As a case study, the Himeno-BMT benchmark was implemented with FiC-MPI. It achieved 178.7 MFLOPS with a single node and scaled to 643.7 MFLOPS with four nodes, and 896.9 MFLOPS with six nodes of the M-KUBOS cluster. Through the implementation, the easiness of developing parallel programs with FiC-MPI on multi-FPGA systems was demonstrated.

关键词： Multiplexing parallel programming Multicore processing Message passing Benchmark testing Libraries Software

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Parla: A Python Orchestration System for Heterogeneous Architectures

Parla: A Python Orchestration System for Heterogeneous Archi...

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Supercomputing Conference

作者： Hochan Lee William Ruys Ian Henriksen Arthur Peters Yineng Yan Sean Stephens Bozhi You Henrique Fingler Martin Burtscher Milos Gligoric Karl Schulz Keshav Pingali Christopher J. Rossbach Mattan Erez George Biros The University of Texas at Austin Austin TX USA Texas State University San Marcos TX USA

ISBN: (纸本)9781665454452

Python's ease of use and rich collection of numeric libraries make it an excellent choice for rapidly developing scientific applications. However, composing these libraries to take advantage of complex heterogeneous nodes is still difficult. To simplify writing multi-device code, we created Parla, a heterogeneous task-based programming framework that fully supports Python's scientific programming stack. Parla's API is based on Python decorators and allows users to wrap code in Parla tasks for parallel execution. Parla arrays enable automatic movement of data between devices. The Parla runtime handles resource-aware mapping, scheduling, and execution of tasks. Compared to other Python tasking systems, Parla is unique in its parallelization of tasks within a single process, its GPU context and resource-aware runtime, and its design around gradual adoption to provide easy migration of and integration into existing Python applications. We show that Parla can achieve performance competitive with hand-optimized code while improving ease of development.

关键词： Runtime Codes Scheduling algorithms parallel programming Prefetching High performance computing Writing

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Towards performance portability of AI graphs using SYCL

Towards performance portability of AI graphs using SYCL

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Performance, Portability and Productivity in HPC (P3HPC)

作者： Kumudha Narasimhan Ouadie El Farouki Mehdi Goli Muhammad Tanvir Svetlozar Georgiev Isaac Ault Codeplay Software Ltd. Edinburgh UK

ISBN: (纸本)9781665460224

The wide adoption of Deep Neural Networks (DNN) has served as an incentive to design and manufacture powerful and specialized hardware technologies, targeting systems from Edge devices to Cloud and *** the proposed ONNX as a de facto for DNN model description, provides portability across various AI frameworks, supporting DNN models on various hardware architectures remains *** provides a C++-based portable parallel programming model to target various devices. Thus, enabling SYCL backend for an AI framework can lead to a hardware-agnostic model for heterogeneous *** paper proposes a SYCL backend for ONNXRuntime as a possible solution towards the performance portability of deep learning algorithms. The proposed backend uses existing state-of-the-art SYCL-DNN and SYCL-BLAS libraries to invoke tuned SYCL kernels for DNN operations. Our performance evaluation shows that the proposed approach can achieve comparable performance with respect to the state-of-the-art optimized vendor-specific libraries.

关键词： Performance evaluation Deep learning Productivity Runtime parallel programming Neural networks Libraries

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UnoAPI: Balancing Performance, Portability, and Productivity (P3) in HPC Education

UnoAPI: Balancing Performance, Portability, and Productivity...

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Workshop on Education for High Performance Computing (EduHPC)

作者： Konstantin Läufer George K. Thiruvathukal Department of Computer Science Software and Systems Laboratory Loyola University Chicago

ISBN: (纸本)9781665473675

oneAPI is a major initiative by Intel aimed at making it easier to program heterogeneous architectures used in high-performance computing using a unified application programming interface (API). While raising the abstraction level via a unified API represents a promising step for the current generation of students and practitioners to embrace high-performance computing, we argue that a curriculum of well-developed software engineering methods and well-crafted exem-plars will be necessary to ensure interest by this audience and those who teach them. We aim to bridge the gap by developing a curriculum-codenamed UnoAPI-that takes a more holistic approach by looking beyond language and framework to include the broader development ecosystem, similar to the experience found in popular HPC languages such as Python. We hope to make parallel programming a more attractive option by making it look more like general application development in modern languages being used by most students and educators today. Our curriculum emanates from the perspective of well-crafted exemplars from the foundations of computer systems-given that most HPC architectures of interest begin from the systems tradition-with an integrated treatment of essential principles of distributed systems, programming languages, and software engineering. We argue that a curriculum should cover the essence of these topics to attract students to HPC and enable them to confidently solve computational problems using oneAPI. By the time of this submission, we have shared our materials with a small group of undergraduate sophomores, and their responses have been encouraging in terms of self-reported comprehension and ability to reproduce the compilation and execution of exemplars on their personal systems. We plan a follow-up study with a larger cohort by incorporating some of our materials in our existing course on High-Performance Computing.

关键词： Productivity parallel programming High performance computing Education Ecosystems Computer architecture Software

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Optimizing GNN on ARM Multi-Core Processors

Optimizing GNN on ARM Multi-Core Processors

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IEEE International Conference on High Performance Computing and Communications (HPCC)

作者： Chaorun Liu Huayou Su Yong Dou Kangkang Chen Yanjie Sun National University of Defense and Technology China

Graph Neural Network (GNN) has shown great success in graph learning, including physics systems, protein interfaces, disease classification, molecular fingerprints, etc. Due to the complexity of the real-world tasks and the big graph datasets, current GNN models become increasingly bigger and more complicated to enhance the learning ability and prediction accuracy. In addition, GNN contains two main major components graph operation and neural network (NN) operation, both are executed alternately during processing. The interleaved complex processing of GNN poses a challenge for many computational platforms, especially for those without accelerators. Current optimization frameworks solely for deep learning or graph computing cannot achieve good performance on GNN. In this work, we first investigate the performance bottlenecks when handling GNN over multi-core processors. Then, we perform a set of optimization strategies to leverage the capability of multi-core processors for GNN processing. Specifically, we build a set of microkernels for graph operations of GNN with assembly instructions that can exploit the capability of SIMD processing units within a core and implement a task allocator based on a greedy algorithm to balance the workloads between the cores of CPU. In addition, we use some strategies to optimize NN operation for GNN, according to the characteristics of NN operation in GNN. Experimental results show that the proposed methods can achieve a maximum of 2.88x and 4.08x performance improvements for various GNN models on Phytium 2000+ and Kunpeng 920 over the state-of-the-art GNN framework.

关键词： Proteins Program processors Multicore processing parallel programming Artificial neural networks Predictive models Graph neural networks

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Analysis of Validating and Verifying OpenACC Compilers 3.0 and Above

Analysis of Validating and Verifying OpenACC Compilers 3.0 a...

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Workshop on Accelerator programming using Directives (WACCPD)

作者： Aaron Jarmusch Aaron Liu Christian Munley Daniel Horta Vaidhyanathan Ravichandran Joel Denny Kyle Friedline Sunita Chandrasekaran University of Delaware Oak Ridge National Laboratory

ISBN: (纸本)9781665490207

OpenACC is a high-level directive-based parallel programming model that can manage the sophistication of heterogeneity in architectures and abstract it from the users. The portability of the model across CPUs and accelerators has gained the model a wide variety of users. This means it is also crucial to analyze the reliability of the compilers’ implementations. To address this challenge, the OpenACC Validation and Verification team has proposed a validation testsuite to verify the OpenACC implementations across various compilers with an infrastructure for a more streamlined execution. This paper will cover the following aspects: (a) the new developments since the last publication on the testsuite, (b) outline the use of the infrastructure, (c) discuss tests that highlight our workflow process, (d) analyze the results from executing the testsuite on various systems, and (e) outline future developments.

关键词： Analytical models Program processors parallel programming Conferences Reliability

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