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parallel systemc simulation for ESL Design

ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 2016年第1期16卷 27-27页

作者： Weinstock, Jan Henrik Murillo, Luis Gabriel Leupers, Rainer Ascheid, Gerd Rhein Westfal TH Aachen Inst Commun Technol & Embedded Syst ICE 611910 D-52056 Aachen Germany

Virtual platforms have become essential tools for the design of embedded systems. Developers rely on them for design space exploration and software debugging. However, with rising HW/SW complexity and the need to simulate more and more processors simultaneously, the performance of virtual platforms degrades rapidly. parallel simulation techniques can help to counter this by leveraging multicore PCs, which are widely available today. This work presents a novel parallel simulation approach that is targeted toward acceleration of virtual platforms from the ESL domain. By trading some timing accuracy, multiprocessor virtual platforms can be accelerated by up to 3.4x on regular quad-core workstations.

关键词： Electronic system level parallel discrete event simulation parallel systemc simulation

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A parallel systemc Virtual Platform for Neuromorphic Architectures 23

A Parallel SystemC Virtual Platform for Neuromorphic Archite...

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23rd International Symposium on Quality Electronic Design (ISQED)

作者： Galicia, Melvin Merchant, Farhad Leupers, Rainer Rhein Westfal TH Aachen Inst Commun Technol & Embedded Syst Aachen Germany

ISBN: (纸本)9781665494663

With the increasing interest in neuromorphic computing, designers of embedded systems face the challenge of efficiently simulating such platforms to enable architecture design exploration early in the development cycle. Executing artificial neural network applications on neuromorphic systems which are being simulated on virtual platforms (VPs) is an extremely demanding computational task. Nevertheless, it is a vital benchmarking task for comparing different possible architectures. Therefore, exploiting the multicore capabilities of the VP's host system is essential to achieve faster simulations. Hence, this paper presents a parallel systemc based VP for RISC-V multicore platforms integrating multiple computing-in-memory neuromorphic accelerators. In this paper, different VP segmentation architectures are explored for the integration of neuromorphic accelerators and are shown their corresponding speedup simulations compared to conventional sequential systemc execution.

关键词： Electronic System Level parallel systemc simulation Neuromorphic Systems Computing-in-Memory

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Work-in-Progress: AMVP - A High Performance Virtual Platform using parallel systemc for Multicore ARM Architectures

Work-in-Progress: AMVP - A High Performance Virtual Platform...

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ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

作者： Weinstock, Jan Henrik Bucs, Robert Lajos Walbroel, Florian Leupers, Rainer Ascheid, Gerd Rhein Westfal TH Aachen Aachen Germany

ISBN: (纸本)9781538655627

This paper presents AMVP - a systemc based simulator for ARM multicore platforms designed as a tool for early SW development during platform bring-up. It uses a parallel systemc simulation approach to counter the performance slowdown incurred when simulating multi-processor designs. AMVP is sufficiently detailed to support running and debugging unmodified SW images of popular benchmark applications and modern OS kernels like Linux.

关键词： Electronic System Level parallel Discrete Event simulation parallel systemc simulation

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AMVP - a high performance virtual platform using parallel systemc for multicore ARM architectures: work-in-progress 18

AMVP - a high performance virtual platform using parallel sy...

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Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis

作者： Jan Henrik Weinstock Róbert Lajos Bücs Florian Walbroel Rainer Leupers Gerd Ascheid RWTH Aachen University

ISBN: (纸本)9781538655627

关键词： parallel systemc simulation parallel discrete event simulation electronic system level

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