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Optimal uniformization for non-uniform two-level loops using a hybrid method

JOURNAL OF SUPERCOMPUTING 2023年第11期79卷 12791-12814页

作者： Mahjoub, Shabnam Golsorkhtabaramiri, Mehdi Amiri, Seyed Sadegh Salehi Islamic Azad Univ Dept Comp Engn Langarud Branch Langarud Iran Islamic Azad Univ Dept Comp Engn Babol Branch Babol Iran Islamic Azad Univ Dept Math Babol Branch Babol Iran

The present study proposes a novel method based on evolutionary and fuzzy approaches for unifying two-level perfect nested loops. In this method, the Shuffled Frog Leaping Algorithm (SFLA) is used for achieving optimal answers, and simultaneously, three critical factors are applied as an input in determining basic dependence vectors. The use of fuzzy logic versus fixed coefficients for these three factors has led to the creation of optimal results with high variability and has solved the problem regarding the existence of the main vectors. In addition, the present algorithm has been proposed for many input data so that it can be used in parallel compilers automatically and with low complexity. After implementing and evaluating the proposed method, it was found that, compared to other existing methods, the results achieved were very close to optimal, in the least time, and with the lowest Dependence Cone Size (DCS) and highest number of input vectors.

关键词： Fuzzy Loop transformation parallel compilers SFLA Two-level loops Uniformization

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A New Combination Method for Improving parallelism in Two and Three Level Perfect Nested Loops

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IEEE ACCESS 2022年 10卷 74542-74554页

作者： Mahjoub, Shabnam Golsorkhtabaramiri, Mehdi Amiri, Seyed Sadegh Salehi Hosseinzadeh, Mehdi Mosavi, Amir Islamic Azad Univ Babol Branch Dept Comp Engn Babol Iran Islamic Azad Univ Babol Branch Dept Math Babol Iran Iran Univ Med Sci Psychosocial Hlth Res Inst Mental Hlth Res Ctr Tehran Iran Univ Human Dev Dept Comp Sci Sulaymaniyah Iraq Obuda Univ John Von Neumann Fac Informat H-1034 Budapest Hungary Univ Publ Serv Inst Informat Soc H-1083 Budapest Hungary Slovak Univ Technol Bratislava Inst Informat Engn Automat & Math Bratislava 81107 Slovakia

The growth of software techniques for implementing applications must go hand in hand with the growth of computer system hardware in the design of multi-core and multi-processor systems;otherwise, we cannot expect to be able to use maximum hardware capacities. One of the most important and challenging techniques for running applications is to run them in parallel with a focus on loop parallelism to reduce execution time. On the other hand, in recent years, many algorithms have been working on volumetric data, i.e., three-dimensional spaces;therefore, parallelization must be possible for all types of two-dimensional and three-dimensional loops. Uniformization is an important part of loop parallelism, and also the present paper's focus. The proposed algorithm in the present paper performed uniformization with a combination of the frog leaping algorithm and the fuzzy system for two- and three-dimensional loops on a wide range of input dependence vectors and achieved a considerable variety of results in the desired time. The results of this study can be used to facilitate the development of parallel codes.

关键词： parallel processing Codes Program processors Runtime Task analysis Pluto Hardware Frog leaping algorithm artificial intelligence parallelization loops uniformization parallel compilers

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USE OF HIGH PERFORMANCE COMPUTING TECHNOLOGIES AND SCRIPT RUN MEDIATOR MIDDLEWARE FOR EDUCATIONAL PROCESS IN LIEPAJA UNIVERSITY 14

USE OF HIGH PERFORMANCE COMPUTING TECHNOLOGIES AND SCRIPT RU...

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14th International Scientific Conference Engineering For Rural Development

作者： Zacs, Laimonis Zigunovs, Maksims Jansone, Anita Liepaja Univ Liepaja Latvia

In this paper the authors describe a solution for implementation of the SRM (ScriptRunMediatorCSP) middleware to resolve trusting and secure connection problems to HPC (High Performance Computing) cluster resources in the Liepaja University. The main idea is to develop a specific middleware tool called SRM, which would allow connection to the parallel computing cluster system, namely to the main server masternode, to provide the easiest solution for using HPC technologies in educational processes. Cluster computing resources could be used for solution and analysis of various scientific problems applying mathematical methods and high performance technological solutions for learning and performing parallel computations in the educational process thus increasing the students' theoretical knowledge in practical applications.

关键词： cluster HPC technologies Lazarus SRM middleware parallel calculations parallel compilers

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Trasgo: a nested-parallel programming system

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JOURNAL OF SUPERCOMPUTING 2011年第2期58卷 226-234页

作者： Gonzalez-Escribano, Arturo Llanos, Diego R. Univ Valladolid Dept Informat Valladolid Spain

Programming models of pure nested-parallelism are appealing due to their ease of programming and good analysis and debugging properties. Although their simple synchronization structure is appropriate to represent abstract parallel algorithms, it does not take into account many implementation issues. In this work we present Trasgo, a programming system based on high-level, nested-parallel specifications. We show how it allows to easily express complex combinations of data and task parallelism with a common scheme, hiding the layout and scheduling details. The approach allows the development of a modular compiler where automatic transformation techniques may exploit lower level and more complex synchronization structures, unlocking the limitations of pure nested-parallel programming. This article presents an overview of the features of Trasgo, and its architecture. We present some performance results using well-known parallel algorithms, and a roadmap of improvements and new features to be added to Trasgo.

关键词： High-level programming models parallel compilers

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A Symbolic Analysis Method of Communication Set Generation for Irregular Array Reference

A Symbolic Analysis Method of Communication Set Generation f...

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第六届运筹学及其应用国际研讨会

作者： Zhen Liu Minyi Guo Graduate School of Engineering Nagasaki Institute of Applied Science Department of Computer Software The University of Aizu

Communication set generation significantly influences the performance of parallel programs. However, seldom works gives attention to the communication generation problem for irregular applications. In this paper, we will explain how support to generate communication set for irregular array references in loops. We propose a compile-time algorithm by introducing some symbolic analysis techniques. In our symbolic analysis system, a set of symbolic solutions of a symbolic expression system is solved by limiting some restrictions. For this proposal, we introduce some symbolic analysis algorithms to fix solutions in a system of equalities and inequalities. Finally, we show experimental results on a parallel computer CM-5 that validate our approach.

关键词： parallel compilers irregular array references Communication optimization

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On the parallel execution time of tiled loops

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IEEE TRANSACTIONS ON parallel AND DISTRIBUTED SYSTEMS 2003年第3期14卷 307-321页

作者： Högstedt, K Carter, L Ferrante, J AT&T Labs Res Florham Pk NJ 07932 USA Univ Calif San Diego Dept Comp Sci & Engn La Jolla CA 92093 USA

Many computationally-intensive programs, such as those for differential equations, spatial interpolation, and dynamic programming, spend a large portion of their execution time in multiply-nested loops that have a regular stencil of data dependences. Tiling is a well-known compiler optimization that improves performance on such loops, particularly for computers with a multileveled hierarchy of parallelism and memory. Most previous work on tiling is limited in at least one of the following ways: they only handle nested loops of depth two, orthogonal tiling, or rectangular tiles. In our work, we tile loop nests of arbitrary depth using polyhedral tiles. We derive a prediction formula for the execution time of such tiled loops, which can be used by a compiler to automatically determine the tiling parameters that minimizes the execution time. We also explain the notion of rise, a measure of the relationship between the shape of the tiles and the shape of the iteration space generated by the loop nest. The rise is a powerful tool in predicting the execution time of a tiled loop. It allows us to reason about how the tiling affects the length of the longest path of dependent tiles, which is a measure of the execution time of a tiling. We use a model of the tiled iteration space that allows us to determine the length of the longest path of dependent tiles using linear programming. Using the rise, we derive a simple formula for the length of the longest path of dependent tiles in rectilinear iteration spaces, a subclass of the convex iteration spaces, and show how to choose the optimal tile shape.

关键词： tiling blocking compiler optimization parallel compilers

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Finding performance bugs with the TNO HPF benchmark suite

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2002年第8-9期14卷 691-712页

作者： Denissen, W Sips, HJ Delft Univ Technol Delft Netherlands TPD TNO Delft Netherlands

High-Performance Fortran (HPF) has been designed to provide portable performance on distributed memory machines. An important aspect of portable performance is the behavior of the available HPF compilers. Ideally, a programmer may expect comparable performance between different HPF compilers, given the same program and the same machine. To test the performance portability between compilers, we have designed a special benchmark suite, called the TNO HPF benchmark suite. It consists of a set of HPF programs that test various aspects of efficient parallel code generation. The benchmark suite consists of a number of template programs that are used to generate test programs with different array sizes, alignments, distributions, and iteration spaces. It ranges from very simple assignments to more complex assignments such as triangular iteration spaces, convex iteration spaces, coupled subscripts, and indirection arrays. We have run the TNO HPF benchmark suite on three compilers: the PREPARE prototype compiler, the PGI-HPF compiler, and the GMD Adaptor HPF compiler. Results show performance differences that can be quite large (up to two orders of magnitude for the same test program). Closer inspection reveals that the origin of most of the differences in performance is due to differences in local enumeration and storage of distributed array elements. Copyright (C) 2002 John Wiley Sons, Ltd.

关键词： HPF parallel compilers benchmarking compiler optimizations

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Design and implementation of automatic parallel detection layer

Design and implementation of automatic parallel detection la...

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IEEE International Conference on Systems, Man and Cybernetics (SMC)

作者： Ahamed, M Eldeeb, H Nassar, S Bagherzadeh, N Cairo Univ Fac Sci Dept Math Cairo Egypt

ISBN: (纸本)0780370872

In this paper, we develop a new software layer named Automatic parallel Detection Layer (APDL) for automatic transformation from sequential code to parallel one. The main interest, in this research, is the parallelism at loop level, because significant parallelism in programs almost invariably occurs in loops. The proposed APDL has five processes for code transformation: the sequential source code parser, data dependence analysis of this code, partitioning, scheduling both task and data, and generating parallel source code. Many cases have been studied to evaluate the performance of the developed layer. The performance is evaluated depended on the execution time of: sequential code, the parallel programmer code, and the code output from APDL for the same case study. Performance results show that APDL greatly improves the execution time with respect to sequential execution time, and save the high cost of parallel programmer.

关键词： implicit and explicit parallelism data dependence task and data parallel parallel compilers

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The extension of the I test

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parallel COMPUTING 1998年第14期24卷 2101-2127页

作者： Chang, WL Chu, CP Natl Cheng Kung Univ Inst Informat Engn Tainan 701 Taiwan

The I test is an efficient and precise data dependence method to ascertain whether integer solutions exist for one-dimensional arrays with constant bounds. For one-dimensional arrays with variable limits, the I test assumes that there may exist integer solutions. In this paper, we extend the I test. The extended I test can be applied towards determining whether integer solutions exist for one-dimensional arrays with variable limits, improving the applicable range of the I test. Experiments with benchmark cited from EISPACK, LINPACK, parallel loops, etc. showed that among 1189 pairs of one-dimensional arrays tested, 183 had their data dependence analysis amended by the extended I test. That is, the extended I test increases the success rate of the I test by approximately 15.4%. Comparing with the Power test and the Omega test, the extended I test has higher accuracy than the Power test and shares the same accuracy with the Omega test for these 1189 pairs of arrays, but has much better efficiency over these two well-known tests. (C) 1998 Elsevier Science B.V. All rights reserved.

关键词： parallel compilers vector compilers data dependence analysis

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A STATIC EXECUTION MODEL FOR DATA parallelISM

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parallel Processing Letters 1994年第4期4卷 367-378页

作者： C. GERMAIN F. DELAPLACE R. CARLIER Laboratorie de Recherche en Informatique CNRS URA 410 Université Paris-Sud F-91405 Orsay Cedex France Laboratoire de Recherche en Informatique France Laboratorie de Recherche en Informatique France

The performance of parallel architectures are limited at least as much by data transfer ability as by computing power. The main limit concerns the transfers on the interconnection network. But it becomes apparent that a majority of these communications can be known at compile time. The static model intends to exploit this a priori knowledge in order to drastically reduce the overhead of message passing, the ultimate goal being to confine the oommunication delays to the hardware propagation delays. In the paper, we present an abstract machine which is the target of a static-oriented compilation. We show how to recognize and sequence the static communication patterns, and we discuss the application scope of the model.

关键词： parallel architectures parallel compilers interconnection networks

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