检索结果-内蒙古大学图书馆

A polyphase filter for many-core architectures

ASTRONOMY AND computing 2016年第0期16卷 1-16页

作者： Adamek, K. Novotny, J. Armour, W. Silesian Univ Opava Fac Philosophy & Sci Inst Phys Bezrucovo Nam 13 Opava 74601 Czech Republic Univ Oxford Oxford Res Ctr E 7 Keble Rd Oxford OX1 3QG England

In this article we discuss our implementation of a polyphase filter for real-time data processing in radio astronomy. The polyphase filter is a standard tool in digital signal processing and as such a well established algorithm. We describe in detail our implementation of the polyphase filter algorithm and its behaviour on three generations of NVIDIA GPU cards (Fermi, Kepler, Maxwell), on the Intel Xeon CPU and Xeon Phi (Knights Corner) platforms. All of our implementations aim to exploit the potential for data reuse that the algorithm offers. Our GPU implementations explore two different methods for achieving this, the first makes use of L1/Texture cache, the second uses shared memory. We discuss the usability of each of our implementations along with their behaviours. We measure performance in execution time, which is a critical factor for real-time systems, we also present results in terms of bandwidth (GB/s), compute (GFLOP/s/s) and type conversions (GTc/s). We include a presentation of our results in terms of the sample rate which can be processed in real-time by a chosen platform, which more intuitively describes the expected performance in a signal processing setting. Our findings show that, for the GPUs considered, the performance of our polyphase filter when using lower precision input data is limited by type conversions rather than device bandwidth. We compare these results to an implementation on the Xeon Phi. We show that our Xeon Phi implementation has a performance that is 1.5 x to 1.92 x greater than our CPU implementation, however is not insufficient to compete with the performance of GPUs. We conclude with a comparison of our best performing code to two other implementations of the polyphase filter, showing that our implementation is faster in nearly all cases. This work forms part of the Astro-Accelerate project, a many-core accelerated real-time data processing library for digital signal processing of time-domain radio astronomy data. (C) 2016 Els

关键词： Graphics processors parallel architectures parallel programming languages parallel computing models parallel algorithms

来源：评论

学校读者我要写书评

暂无评论

Simple memory machine models for GPUs

引用

INTERNATIONAL JOURNAL OF parallel EMERGENT AND DISTRIBUTED SYSTEMS 2014年第1期29卷 17-37页

作者： Nakano, Koji Hiroshima Univ Dept Informat Engn Kagamiyama 1-4-1 Higashihiroshima 7398527 Japan

The main contribution of this paper is to introduce two parallel memory machines, the discrete memory machine (DMM) and the unified memory machine (UMM). Unlike well-studied theoretical parallel computational models such as parallel random access machines, these parallel memory machines are practical and capture the essential feature of the memory access by graphical processing units (GPUs). As a first step of the development of algorithmic techniques on the DMM and the UMM, we first evaluate the computing time for the contiguous access and the stride access to the memory on these models. We then present parallel algorithms to transpose a 2D array on these models and evaluate their performance. Finally, we show that, for any permutation given in offline, data in an array can be moved efficiently along the given permutation both on the DMM and on the UMM. Since the computing time of our permutation algorithms on the DMM and the UMM is equal to the sum of the lower bounds obtained from the memory bandwidth limitation and the latency limitation, they are optimal from the theoretical point of view. We believe that the DMM and the UMM can be good theoretical platforms to develop algorithmic techniques for GPUs.

关键词： memory banks parallel computing models parallel algorithms matrix transpose permutation GPU

来源：评论

学校读者我要写书评

暂无评论

Asynchronous Memory Machine models with Barrier Synchronization

Asynchronous Memory Machine Models with Barrier Synchronizat...

引用

3rd International Conference on Networking and computing (ICNC)

作者： Nakano, Koji Hiroshima Univ Dept Informat Engn Higashihiroshima 7398527 Japan

ISBN: (纸本)9780769548937;9781467346245

The Discrete Memory Machine (DMM) and the Unified Memory Machine (UMM) are theoretical parallel computing models that capture the essence of the shared memory and the global memory of GPUs. It was assumed that warps (i.e. groups of threads) on the DMM and the UMM work synchronously in the round-robin manner. However, warps work asynchronously in the actual GPUs, in the sense that warps may be randomly (or arbitrarily) dispatched for execution. The first contribution of this paper is to introduce an asynchronous version of the DMM and the UMM, in which warps are arbitrarily dispatched. Instead, we assume that threads can execute the "syncthreads" instruction for barrier synchronization. Since the barrier synchronization operation is costly, we should evaluate and minimize the number of barrier synchronization operations performed by parallel algorithms. The second contribution of this paper is to show a parallel algorithm to compute the sum of n numbers in optimal computing time and few barrier synchronization steps. Our parallel algorithm computes the sum of n numbers in O(n/w + l log n) time units and O (log l/w + log log w) barrier synchronization steps using wl threads both on the asynchronous DMM and on the asynchronous UMM with width w and latency l. We also prove that the computing time is optimal because it matches the theoretical lower bound. Quite surprisingly, the number of barrier synchronization steps and the number of threads are independent of n. Even if the input size n is quite large, our parallel algorithm computes the sum in optimal time units and a fixed number of syncthreads using a fixed number of threads.

关键词： parallel computing models parallel algorithms contiguous memory access asynchronous models GPU CUDA

来源：评论

学校读者我要写书评

暂无评论

Simple Memory Machine models for GPUs

Simple Memory Machine Models for GPUs

引用

26th IEEE International parallel and Distributed Processing Symposium (IPDPS)

作者： Nakano, Koji Hiroshima Univ Dept Informat Engn Higashihiroshima 7398527 Japan

ISBN: (纸本)9780769546766

The main contribution of this paper is to introduce two parallel memory machines, the Discrete Memory Machine (DMM) and the Unified Memory Machine (UMM). Unlike well studied theoretical parallel computational models such as PRAMs, these parallel memory machines are practical and capture the essential feature of memory access of NVIDIA GPUs. As a first step of the development of algorithmic techniques on the DMM and the UMM, we first evaluated the computing time for the contiguous access and the stride access to the memory on these models. We then go on to present parallel algorithms to transpose a two dimensional array on these models. Finally, we show that, for any given permutation, data in an array can be moved along a given permutation both on the DMM and on the UMM. Since the computing time of our permutation algorithms on the DMM and the UMM is equal to the sum of the lower bounds obtained from the memory bandwidth limitation and the latency overhead, they are optimal from the theoretical point of view.

关键词： memory banks parallel computing models parallel algorithms stride memory access matrix transpose array permutation GPU CUDA

来源：评论

学校读者我要写书评

暂无评论

Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores 26

Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores

引用

26th Euromicro International Conference on parallel, Distributed, and Network-Based Processing (PDP)

作者： Trabes, Guillermo Gil-Costa, Veronica Printista, Marcela Marin, Mauricio Univ Nacl San Luis Dept Informat LIDIC San Luis Argentina Univ Nacl San Luis San Luis Argentina CCT San Luis CONICET San Luis Argentina Univ Santiago Chile CeBiB Santiago Chile

ISBN: (纸本)9781538649756

Computer models have been used as a bridge between parallel algorithms and hardware architectures. The Bulk-Synchronous parallel (BSP) is a well-known computing model originally devised for distributed algorithms running on clusters of single-core processors. The Multi-BSP model, that extends the classic BSP model, was recently proposed for multi-core processors. However, this model - implemented through the MulticoreBSP-for-C library-presents some restrictions such as the explicit synchronizations between the cores, introducing some challenges on which the hardware characteristics should be taken into account to properly model the parallel algorithms. Therefore, we explore the suitability of these models for the Dell multi-core architecture. The objectives of this contribution are twofold. First, we model two different multi-core Dell architectures. Second, we show that a simple model with few parameters can be easily adapted to each Dell platform rather than complex models which tends to use tricky hardware parameters.

关键词： parallel computing models bulk-synchronous parallel - BSP Multi-BSP Dell multi-cores

来源：评论

学校读者我要写书评

暂无评论

Simulation of Hierarchical parallel computing Model for Fluid Machinery Based on Support Vector Machines

Simulation of Hierarchical Parallel Computing Model for Flui...

引用

2023 IEEE International Conference on Electrical, Automation and Computer Engineering, ICEACE 2023

作者： Wei, Dechen Jiao, Yuanyuan Fan, Yukun College of Electromechanical Engineering Binzhou University Shandong Binzhou256600 China College of Aeronautical Engineering Binzhou University Shandong Binzhou256600 China

ISBN: (纸本)9798350309614

This paper presents a hierarchical parallel computational model for fluid machinery based on Support Vector Machines (SVM), and applies it to the simulation study of axial flow compressors. The model utilizes SVM classification algorithm to model and classify the operating parameters of fluid machinery, achieving accurate simulation of fluid machinery behavior. In order to improve computational efficiency, this paper introduces multi-level task partitioning and parallel computing model, fully utilizing parallel computing resources to enhance computational efficiency and overall performance. The model's efficient parallel computation is achieved through MPI process-level parallel programming technique, while combining MPI+OpenMP technology enables coarse-grained and fine-grained parallel computing, further enhancing efficiency. Additionally, this paper introduces CUDA technology to fully utilize the parallel computing capability of GPUs, further improving computational efficiency and simulation accuracy. Experimental results demonstrate significant performance improvements of the model across different parallel implementations, providing effective support and guidance in the field of fluid machinery simulation. © 2023 IEEE.

关键词： Fluid Mechanics Hierarchical parallel computing models Support Vector Machines

来源：评论

学校读者我要写书评

暂无评论

EFFICIENT MULTIPLE-ITEM BROADCAST IN THE LogP MODEL

引用

parallel Processing Letters 1993年第4期3卷 407-417页

作者： RAMESH SUBRAMONIAN NARAYAN VENKATASUBRAMANYAN Division of Computer Science University of California Berkeley CA 94720 USA Currently with Lockheed Palo Alto Research Laboratory O/96–20 3251 Hanover Street Palo Alto CA 94304–1191 USA. American Airlines Decision Technologies Dallas/Fort Worth Airport TX 75261–9616 USA

A common arising problem in many parallel algorithms is broadcast. Many multiprocessors do not have dedicated hardware for this purpose. In this paper, we address the problem of simulating multiple-item broadcast by point-to-point message transmission, where a source processor has many messages which it wishes to disseminate to P−1 other processors. In a step, a processor can send at most one item from among those in its possession and receive at most one item. An item is received at most L steps after it is sent. The goal is to find a schedule that achieves the broadcast in minimum time. We improve on previous results by developing a simpler and almost optimal solution which makes no assumptions about L or P. We also provide a bound on the performance degradation when the latency, L, is allowed to vary.

关键词： Broadcast parallel computing models distributed memory information dissemination

来源：评论

学校读者我要写书评

暂无评论

Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores

Multi-BSP vs. BSP: A Case of Study for Dell AMD Multicores

引用

Euromicro International Conference on parallel, Distributed and Network-Based Processing

作者： Guillermo Trabes Veronica Gil-Costa Marcela Printista Mauricio Marin LIDIC-Departamento de Informática Universidad Nacional de San Luis CCT San Luis Universidad Nacional de San Luis and CONICET CeBiB Universidad de Santiago de Chile

Computer models have been used as a bridge between parallel algorithms and hardware architectures. The Bulk-Synchronous parallel (BSP) is a well-known computing model originally devised for distributed algorithms running on clusters of single-core processors. The Multi-BSP model, that extends the classic BSP model, was recently proposed for multi-core processors. However, this model -implemented through the MulticoreBSP-for-C library-presents some restrictions such as the explicit synchronizations between the cores, introducing some challenges on which the hardware characteristics should be taken into account to properly model the parallel algorithms. Therefore, we explore the suitability of these models for the Dell multi-core architecture. The objectives of this contribution are twofold. First, we model two different multi-core Dell architectures. Second, we show that a simple model with few parameters can be easily adapted to each Dell platform rather than complex models which tends to use tricky hardware parameters.

关键词： parallel computing models Bulk-synchronous parallel - BSP Multi-BSP Dell multi-cores

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：