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16th International Conference on Algorithms and Architectures for parallel Processing (ICA3PP)

作者： Migallon, Hector Lopez-Granado, Otoniel Galiano, Vicente Pinol, Pablo Malumbres, Manuel P. Miguel Hernandez Univ Dept Phys & Comp Architecture Avda Univ S-N Alicante 03202 Spain

ISBN: (纸本)9783319495835;9783319495828

After the emergence of the new High Efficiency Video Coding standard, several strategies have been followed in order to take advantage of the parallel features available in it. Many of the parallelization approaches in the literature have been performed in the decoder side, aiming at achieving real-time decoding. However, the most complex part of the HEVC codec is the encoding side. In this paper, we perform a comparative analysis of two parallelization proposals. One of them is based on tiles, employing shared memory architectures and the other one is based on Groups Of Pictures, employing distributed shared memory architectures. The results show that good speed-ups are obtained for the tile-based proposal, especially for high resolution video sequences, but the scalability decreases for low resolution video sequences. The GOP-based proposal outperforms the tile-based proposal when the number of processes increases. This benefit grows up when low resolution video sequences are compressed.

关键词： HEVC Video coding parallel encoding Shared memory Distributed shared memory

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aHDFS: An Erasure-Coded Data Archival System for Hadoop Clusters

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IEEE TRANSACTIONS ON parallel AND DISTRIBUTED SYSTEMS 2017年第11期28卷 3060-3073页

作者： Chen, Yuanqi Zhou, Yi Taneja, Shubbhi Qin, Xiao Huang, Jianzhong Auburn Univ Samuel Ginn Coll Engn Shelby Ctr Engn Technol Dept Comp Sci & Software Engn Auburn AL 36849 USA Huazhong Univ Sci & Technol Wuhan Natl Lab Optoelect Wuhan 430074 Hubei Peoples R China

In this paper, we propose an erasure-coded data archival system called aHDFS for Hadoop clusters, where RS(k+r, k) codes are employed to archive data replicas in the Hadoop distributed file system or HDFS. We develop two archival strategies (i.e., aHDFS-Grouping and aHDFS-Pipeline) in aHDFS to speed up the data archival process. aHDFS-Grouping - a MapReduce-based data archiving scheme - keeps each mapper's intermediate output Key-Value pairs in a local key-value store. With the local store in place, aHDFS-Grouping merges all the intermediate key-value pairs with the same key into one single key-value pair, followed by shuffling the single Key-Value pair to reducers to generate final parity blocks. aHDFS-Pipeline forms a data archival pipeline using multiple data node in a Hadoop cluster. aHDFS-Pipeline delivers the merged single key-value pair to a subsequent node's local key-value store. Last node in the pipeline is responsible for outputting parity blocks. We implement aHDFS in a real-world Hadoop cluster. The experimental results show that aHDFS-Grouping and aHDFS-Pipeline speed up Baseline's shuffle and reduce phases by a factor of 10 and 5, respectively. When block size is larger than 32 MB, aHDFS improves the performance of HDFS-RAID and HDFS-EC by approximately 31.8 and 15.7 percent, respectively.

关键词： Hadoop distributed file system replica-based storage clusters archival performance erasure codes parallel encoding

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Advanced multimedia service provisioning based on efficient interoperability of adaptive streaming protocol and high efficient video coding

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JOURNAL OF REAL-TIME IMAGE PROCESSING 2016年第2期12卷 443-454页

作者： Batalla, Jordi Mongay Natl Inst Telecommun Warsaw Poland Warsaw Univ Technol Warsaw Poland

The popularity of the new standard H.265 (High Efficiency Video Coding) depends on two factors: the rapidity of deploying clients for the most outstanding platforms and the capacity of service providers to develop efficient encoders for serving demanding multimedia services such as Live TV. Both encoders and decoders should inter-operate efficiently with the streaming protocols to limit the risks of implementation *** paper presents a synergy framework between High Efficiency Video Coding (HEVC) and Dynamic Adaptive Streaming over HTTP (DASH) that increases the compression capabilities of the encoder and opens new parallel encoding points for accelerating the video content coding and formatting processes. The synergy takes advantage of inter-motion prediction in HEVC for delimiting the segments of DASH protocol, which increases the motion compensation in each segment. Moreover, the impact of encoding multiple DASH representations is limited due to the parallel encoding presented in this paper.

关键词： DASH-HEVC interoperability Video service management Compression efficiency parallel encoding Real-time HEVC encoder

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Heterogeneous CPU plus GPU approaches for HEVC

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JOURNAL OF SUPERCOMPUTING 2019年第3期75卷 1215-1226页

作者： Cebrian-Marquez, Gabriel Galiano, Vicente Migallon, Hector Luis Martinez, Jose Cuenca, Pedro Lopez-Granado, Otoniel Univ Castilla La Mancha Albacete Res Inst Informat I3A Albacete 02071 Spain Miguel Hernandez Univ Dept Phys & Comp Architecture Elche 03202 Spain

The high efficiency video coding (HEVC) standard has opened the door to high-quality multimedia contents and new formats such as ultra-high definition as a result of the unceasing demands of the market. This standard is able to outperform prior standards by up to 50% in terms of perceptual video quality, but at the cost of extremely large computational complexities. For this reason, the development of fast coding algorithms is now a requirement to make HEVC an adequate candidate for real-world scenarios. In this regard, this paper proposes a collaborative CPU + GPU coding architecture for this standard, in which the CPU performs a coarse-grained parallelization of the encoder, while the GPU carries out a fast motion estimation. Given that the GPU algorithm can work together with a wide variety of parallel algorithms, this paper evaluates two of them: tiles, defined in the standard, and slices, already present in previous standards. Results indicate that slices are more adequate in terms of parallel efficiency (10.75x speedup on average using 12 threads), while tiles achieve better coding efficiency.

关键词： HEVC H 265 parallel encoding GPU Tiles Slices

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A Low Complexity encoding Algorithm for Systematic Polar Codes

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IEEE COMMUNICATIONS LETTERS 2016年第7期20卷 1277-1280页

作者： Chen, Guo Tai Zhang, Zhaoyang Zhong, Caijun Zhang, Liang Fujian Normal Univ Fuqing Branch Fuqing 350300 Peoples R China Zhejiang Univ Hangzhou 310027 Peoples R China Zhejiang Univ Coll Informat Sci & Elect Engn Hangzhou 310027 Peoples R China

Arikan has shown that systematic polar codes (SPC) outperform non-SPC (NSPC). However, the performance gain comes at the price of elevated encoding complexity, i.e., compared with NSPC, the available encoding methods for SPC require higher memory and computation. In this letter, we propose an efficient encoding algorithm requiring only N bits of memory and having (N/2) log(2) N XOR operations. Moreover, the auxiliary variables in the algorithm can share the memory to reduce extra memory requirement. Furthermore, a parallel 2-bit encoding algorithm is also presented to improve the encoding throughput. Remarkably, we show that parallel encoding can be implemented with the same number of XOR operations and memory bits. Finally, the proposed encoding algorithm can be directly used for NSPC with the same complexity.

关键词： Polar codes systematic polar codes encoding algorithm parallel encoding

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Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 2020年第5期67卷 1704-1714页

作者： Saldanha, Mario Sanchez, Gustavo Marcon, Cesar Agostini, Luciano Fed Univ Pelotas UFPel Grad Program Comp PPGC BR-96010610 Pelotas RS Brazil Fed Educ Ciencia & Tecnol Farroupilha IF Farroupi BR-95174274 Farroupilha Brazil Pontifical Catholic Univ Rio Grande Sul PUCRS Grad Program Comp Sci PPGCC BR-90619900 Porto Alegre RS Brazil

This paper proposes a tile adaptation for workload balancing to speed up the 3D-High Efficiency Video Coding (3D-HEVC) encoder. Experiments were done to evaluate the usage of tiles when encoding texture and depth maps considering a static uniform partitioning. Based on these evaluations, we observed that the encoding workload of neighboring frames in the same view tends to be similar. Moreover, the encoding workload of dependent views can be predicted using the information of previously encoded frames of the same and base views. Therefore, the proposed solution adaptively defines the boundaries of the tiles based on inter-frame and inter-view correlations to balance the workloads of the tiles, resulting in a higher speedup when executing in homogeneous multicore systems. The proposed method was implemented in 3D-HEVC Test Model and evaluated according to the Common Test Conditions. The results demonstrated that the proposed solution speeds up texture and depth map coding from 9.94% to 18.21%, when compared to the uniform-sized tiles, without coding efficiency loss. To the best of the authors' knowledge, this is the first work proposing a complete solution for speeding up the 3D-HEVC video encoder by balancing the tiles workload dynamically.

关键词： encoding Three-dimensional displays Streaming media parallel processing Tools Video coding Multicore processing 3D-HEVC multicore systems parallel encoding tiles balancing

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Toward invariant functional representations of variable surface fundamental frequency contours: Synthesizing speech melody via model-based stochastic learning

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SPEECH COMMUNICATION 2014年 57卷 181-208页

作者： Xu, Yi Prom-on, Santitham UCL Dept Speech Hearing & Phonet Sci London WC1N 1PF England King Mongkuts Univ Technol Thonburi Dept Comp Engn Fac Engn Bangkok 10140 Thailand

Variability has been one of the major challenges for both theoretical understanding and computer synthesis of speech prosody. In this paper we show that economical representation of variability is the key to effective modeling of prosody. Specifically, we report the development of PENTAtrainer-A trainable yet deterministic prosody synthesizer based on an articulatory functional view of speech. We show with testing results on Thai, Mandarin and English that it is possible to achieve high-accuracy predictive synthesis of fundamental frequency contours with very small sets of parameters obtained through stochastic learning from real speech data. The first key component of this system is syllable-synchronized sequential target approximation implemented as the qTA model, which is designed to simulate, for each tonal unit, a wide range of contextual variability with a single invariant target. The second key component is the automatic learning of function-specific targets through stochastic global optimization, guided by a layered pseudo-hierarchical functional annotation scheme, which requires the manual labeling of only the temporal domains of the functional units. The results in terms of synthesis accuracy demonstrate that effective modeling of the contextual variability is the key also to effective modeling of function-related variability. Additionally, we show that, being both theory-based and trainable (hence data-driven), computational systems like PENTAtrainer can serve as an effective modeling tool in basic research, with which the level of falsifiability in theory testing can be raised, and also a closer link between basic and applied research in speech science can be developed. (C) 2013 Elsevier B.V. All rights reserved.

关键词： Prosody modeling Target approximation parallel encoding Analysis-by-synthesis Simulated annealing

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On Row-by-Row Coding for 2-D Constraints

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IEEE TRANSACTIONS ON INFORMATION THEORY 2009年第8期55卷 3565-3576页

作者： Tal, Ido Etzion, Tuvi Roth, Ron M. Univ Calif San Diego Ctr Magnet Recording Res La Jolla CA 92093 USA Technion Israel Inst Technol Dept Comp Sci IL-32000 Haifa Israel

A constant-rate encoder-decoder pair is presented for a fairly large family of two-dimensional (2-D) constraints. encoding and decoding is done in a row-by-row manner, and is sliding-block decodable. Essentially, the 2-D constraint is turned into a set of independent and relatively simple one-dimensional (1-D) constraints;this is done by dividing the array into fixed-width vertical strips. Each row in the strip is seen as a symbol, and a graph presentation of the respective I-D constraint is constructed. The maxentropic stationary Markov chain on this graph is next considered: a perturbed version of the corresponding probability distribution on the edges of the graph is used in order to build an encoder which operates in parallel on the strips. This perturbation is found by means of a network flow, with upper and lower bounds on the flow through the edges. A key part of the encoder is an enumerative coder for constant-weight binary words. A fast realization of this coder is shown, using floating-point arithmetic.

关键词： Enumerative coding flow networks Kronecker product parallel encoding row-by-row coding runlength-limited (RLL) constraints two-dimensional (2-D) constraints

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Design of balanced and constant weight codes for VLSI systems

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IEEE TRANSACTIONS ON COMPUTERS 1998年第5期47卷 556-572页

作者： Tallini, LG Bose, B Univ Salerno Dipartimento Informat & Applicaz I-84081 Baronissi Salerno Italy Oregon State Univ Dept Comp Sci Corvallis OR 97331 USA

A constant weight, w, code with k information bits and r check bits is a binary code of length n = k + rand cardinality 2(k) such that the number of Is in each code word is equal to w. When w = [n/2], the code is called balanced. This paper describes the design of balanced and constant weight codes with parallel encoding and parallel decoding. Infinite families of efficient constant weight codes are given with the parameters k, r, and the "number of balancing functions used in the code design," p. The larger p grows, the smaller r will be;and the codes can be encoded and decoded with VLSI circuits whose sizes and depths are proportional to pk and log:! p, respectively. For example, a design is given for a constant weight w = 33 code with k = 64 information bits, r = 10 check bits, and p = 8 balancing functions. This code can be implemented by a VLSI circuit using less than 4,054 transistors with a depth of less than 30 transistors.

关键词： constant weight codes balanced codes parallel encoding parallel decoding VLSI systems

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Rapid Automatic Motor encoding of Competing Reach Options

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CELL REPORTS 2017年第7期18卷 1619-1626页

作者： Gallivan, Jason P. Stewart, Brandie M. Baugh, Lee A. Wolpert, Daniel M. Flanagan, J. Randall Queens Univ Ctr Neurosci Studies Kingston ON K7L 3N6 Canada Queens Univ Dept Psychol Kingston ON K7L 3N6 Canada Queens Univ Dept Biomed & Mol Sci Kingston ON K7L 3N6 Canada Univ South Dakota Sanford Sch Med Vermillion SD 57069 USA Univ Cambridge Dept Engn Cambridge CB2 1PZ England

Mounting neural evidence suggests that, in situations in which there are multiple potential targets for action, the brain prepares, in parallel, competing movements associated with these targets, prior to implementing one of them. Central to this interpretation is the idea that competing viewed targets, prior to selection, are rapidly and automatically transformed into corresponding motor representations. Here, by applying target-specific, gradual visuomotor rotations and dissociating, unbeknownst to participants, the visual direction of potential targets from the direction of the movements required to reach the same targets, we provide direct evidence for this provocative idea. Our results offer strong empirical support for theories suggesting that competing action options are automatically represented in terms of the movements required to attain them. The rapid motor encoding of potential targets may support the fast optimization of motor costs under conditions of target uncertainty and allow the motor system to inform decisions about target selection.

关键词： action decision making motor planning parallel encoding reaching sensorimotor visuomotor adaptation

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