Although high quality multiple sequence alignment is an essential task in bioinforma- tics, it becomes a big dilemma nowadays due to the gigantic explosion in the amount of molecular data. The most consuming time and ...
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Although high quality multiple sequence alignment is an essential task in bioinforma- tics, it becomes a big dilemma nowadays due to the gigantic explosion in the amount of molecular data. The most consuming time and space phase is the distance matrix computation. This paper addresses this issue by proposing a vectorized parallel method that accomplishes the huge number of similarity comparisons faster in less space. Per- formance tests on real biological datasets using core-iT show superior results in terms of time and space.
Transient Stability Assessment (TSA) is the major part of Dynamic Security Assessment (DSA) in an electric power system. On-line TSA has gained more importance for power system security in last two decades. The decrea...
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ISBN:
(纸本)9781424434299
Transient Stability Assessment (TSA) is the major part of Dynamic Security Assessment (DSA) in an electric power system. On-line TSA has gained more importance for power system security in last two decades. The decreasing costs of hardware and advanced package programs and techniques encourage researchers to apply parallel programming to the problems that are either too much time consuming or impossible to solve using serial computers. The real-time evaluation of TSA is now almost possible thanks to such tools and techniques. We demonstrate the use of the parallel computing toolbox of Mat lab for TSA. In this regard, IEEE 57 and 118 bus systems are tested with 57 and 56 contingencies respectively. Each contingency requires solution of a transient stability problem. The parallel performance of this implementation is expected to spur researchers to use parallel programming in Mat lab environment. It requires minimal knowledge regarding parallel programming.
The multicore revolution that took place one decade ago has turned parallel programming into a major concern for the mainstream software development industry. In this context, Transactional Memory (TM) has emerged as ...
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The multicore revolution that took place one decade ago has turned parallel programming into a major concern for the mainstream software development industry. In this context, Transactional Memory (TM) has emerged as a simpler and attractive alternative to that of lock-based synchronization, whose complexity and error-proneness are widely recognized. The notion of permissiveness in TM translates to only aborting a transaction when it cannot be accepted in any history that guarantees a target correctness criterion. This theoretically powerful property is often neglected by state-of-the-art TMs because it imposes considerable algorithmic costs. Instead, these TMs opt to maximize their implementation's efficiency by aborting transactions under overly conservative conditions. As a result, they risk rejecting a significant number of safe executions. In this article, we seek to identify a sweet spot between permissiveness and efficiency by introducing the Time-Warp Multiversion (TWM) algorithm. TWM is based on the key idea of allowing an update transaction that has performed stale reads (i.e.,missed the writes of concurrently committed transactions) to be serialized by "committing it in the past," which we call a time-warp commit. At its core, TWM uses a novel, lightweight validation mechanism with little computational overhead. TWMalso guarantees that read-only transactions can never be aborted. Further, TWMguarantees Virtual World Consistency, a safety property that is deemed as particularly relevant in the context of TM. We demonstrate the practicality of this approach through an extensive experimental study: we compare TWM with five other TMs, representative of typical alternative design choices, and on a wide variety of benchmarks. This study shows an average performance improvement across all considered workloads and TMs of 65% in high concurrency scenarios, with gains extending up to 9x with the most favorable benchmarks. These results are a consequence of TWM's ab
With the advent of large-scale heterogeneous platforms such as clusters and grids, resource failures are more likely to occur and have an adverse effect on the applications. Consequently, there is an increasing need f...
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ISBN:
(纸本)9783642141218
With the advent of large-scale heterogeneous platforms such as clusters and grids, resource failures are more likely to occur and have an adverse effect on the applications. Consequently, there is an increasing need for developing techniques to achieve reliability during execution. This paper presents FT-Jace, a new reliable programming model for grid computing environments. FT-JACE achieves reliability in a transparent manner for the programmer. It is based on active replication scheme, capable of supporting r arbitrary fail-silent (a faulty node does not produce any output) and fail-stop (no node recovery) node failures. The strength of our programming environment is that the deployment of the application does not require complicated mechanisms for failure detection. More precisely, node failures are masked and there is no need for detecting and handling such failures. We provide experimental results conducted on Grid'5000(1) platform to demonstrate the usefulness of FT-Jace.
Process-thread hybrid programming paradigm is commonly employed in SMP clusters. XPFortran, a parallel programming language that specifies a set of compiler directives and library routines, can be used to realize proc...
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ISBN:
(纸本)9783642132162
Process-thread hybrid programming paradigm is commonly employed in SMP clusters. XPFortran, a parallel programming language that specifies a set of compiler directives and library routines, can be used to realize process-level parallelism in distributed memory systems. In this paper, we introduce hybrid parallel programming by XPFortran to SNIP clusters, in which thread-level parallelism is realized by OpenMP. We present the language support and compiler implementation of OpenMP directives in XPFortran, and show sonic of our experiences in XPFortran-OpenMP hybrid programming. For nested loops parallelized by process-thread hybrid programming, it's common sense to use process parallelization for outer loops and thread parallelization for inner ones. However, we have found that in sonic cases it's possible to write XPFortran-OpenMP hybrid program in a reverse way, i.e., OpenMP outside, XPFortran inside. Our evaluation results show that this programming style sometimes delivers better performance than the traditional one. We therefore recommend using the hybrid parallelization flexibly.
Currently, the need to learn parallel applications topics in students has become an important issue due to the rapid growth in the parallel computing field. In fact, this topic has been included in Computer Science cu...
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Currently, the need to learn parallel applications topics in students has become an important issue due to the rapid growth in the parallel computing field. In fact, this topic has been included in Computer Science curriculum, but students present difficulties to design MPI parallel applications efficiently. We present a novel methodology for teaching parallel programming centered on improving parallel applications written by students through their experiences obtained during classes. The methodology integrates theoretical and practical sections which are focused on teaching two parallel paradigms, master/Worker and SPMD. These paradigms were selected due to their different communication and computation behaviors, which generate challenges for students when they wish to improve performance application metrics. Our methodology allows students to discover their own errors and how to correct them. In addition, students analyze the issues and advantages in the application designed in order to enhance the performance metrics. Applying this methodology gave us a significant progress in parallel applications designed by students, where we have observed an improvement of around 47% in the students' skill about parallel programming when they design parallel applications. (C) 2010 Published by Elsevier Ltd.
Pipeline parallelism organizes a parallel program as a linear sequence of stages. Each stage processes elements of a data stream, passing each processed data element to the next stage, and then taking on a new element...
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Pipeline parallelism organizes a parallel program as a linear sequence of stages. Each stage processes elements of a data stream, passing each processed data element to the next stage, and then taking on a new element before the subsequent stages have necessarily completed their processing. Pipeline parallelism is used especially in streaming applications that perform video, audio, and digital signal processing. Three out of 13 benchmarks in PARSEC, a popular software benchmark suite designed for shared-memory multiprocessors, can be expressed as pipeline parallelism. Whereas most concurrency platforms that support pipeline parallelism use a "construct-and-run" approach, this article investigates "on-the-fly" pipeline parallelism, where the structure of the pipeline emerges as the program executes rather than being specified a priori. On-the-fly pipeline parallelism allows the number of stages to vary from iteration to iteration and dependencies to be data dependent. We propose simple linguistics for specifying on-the-fly pipeline parallelism and describe a provably efficient scheduling algorithm, the PIPER algorithm, which integrates pipeline parallelism into a work-stealing scheduler, allowing pipeline and fork-join parallelism to be arbitrarily nested. The PIPER algorithm automatically throttles the parallelism, precluding "runaway" pipelines. Given a pipeline computation with T1 work and T∞ span (critical-path length), PIPER executes the computation on P processors in TP ≤ T1/P+ O(T∞ +lg P) expected time. PIPER also limits stack space, ensuring that it does not grow unboundedly with running time. We have incorporated on-the-fly pipeline parallelism into a Cilk-based work-stealing runtime system. Our prototype Cilk-P implementation exploits optimizations such as "lazy enabling" and "dependency folding." We have ported the three PARSEC benchmarks that exhibit pipeline parallelism to run on Cilk-P. One of these, x264, cannot readily be executed by systems that supp
The effect of anesthesia on the patient is referred to as depth of anesthesia. Rapid classification of appropriate depth level of anesthesia is a matter of great importance in surgical operations. Similarly, accelerat...
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The effect of anesthesia on the patient is referred to as depth of anesthesia. Rapid classification of appropriate depth level of anesthesia is a matter of great importance in surgical operations. Similarly, accelerating classification algorithms is important for the rapid solution of problems in the field of biomedical signal processing. However numerous, time-consuming mathematical operations are required when training and testing stages of the classification algorithms, especially in neural networks. In this study, to accelerate the process, parallel programming and computing platform (Nvidia CUDA) facilitates dramatic increases in computing performance by harnessing the power of the graphics processing unit (GPU) was utilized. The system was employed to detect anesthetic depth level on related electroencephalogram (EEG) data set. This dataset is rather complex and large. Moreover, the achieving more anesthetic levels with rapid response is critical in anesthesia. The proposed parallelization method yielded high accurate classification results in a faster time.
parallel programming is the future of computer science. Now days shift to parallel processing makes it even more useful. This research effort aims at helping parallelism education on real life target systems, using pr...
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The Architectural Patterns for parallel programming is a collection of patterns related with a method for developing the coordination structure of parallel software systems. These architectural patterns are applied ba...
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ISBN:
(纸本)9781450302609
The Architectural Patterns for parallel programming is a collection of patterns related with a method for developing the coordination structure of parallel software systems. These architectural patterns are applied based on (a) the available parallel hardware platform, (b) the parallel programming language of this platform, and (c) the analysis of the problem to solve, in terms of an algorithm and data. In this paper, it is presented the application of the architectural patterns along with the method for developing a coordination structure for solving the Two-dimensional Wave Equation. The method used here takes the information from the problem analysis, applies an architectural pattern for the coordination, and provides some elements about its implementation. This paper is aimed to those who are working with the Patterns for parallel Software Design. Nevertheless, it presents only a part of the method, at the architectural level, for solving the Two-dimensional Wave Equation. Other two further design issues should be addressed at the communication and synchronization levels, which are not presented here.
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