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检索条件"主题词=Parallel programming"

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Multilevel Task parallelism Exploitation on Asymmetric Sets of Tasks and When Using Third-Party Tools 14

Multilevel Task Parallelism Exploitation on Asymmetric Sets ...

引用

IEEE 14th International Symposium on parallel and Distributed Computing (ISPDC)

作者： Neves, Diogo Telmo Univ Minho Dept Informat Campus Gualtar Braga Portugal

ISBN: (纸本)9781467371483

To harness the performance potential of current multicore processors, a multitude of algorithms, frameworks and libraries have been developed. Nevertheless, it is still extremely difficult to take advantage of the full potential of multicore processors. Moreover, in the presence of asymmetric sets of tasks, and/or when using third-party tools, this problem would only aggravate. In this paper, we present a software design and two algorithms to enable multilevel task parallelism exploitation on asymmetric sets of tasks and when using third-party tools. The proposed software design along with both algorithms allow, in a seamlessly way, the efficient exploitation of coarse-grained-inter-task-and fine-grained-intra-task-parallelism. Thus, it becomes possible to make a better and transparent usage of the performance potential of current multicore processors on shared-memory systems. To assess the feasibility and the benefit of applying the proposed software design along with both algorithms, we used three irregular applications from Phylogenetics-real world problems-, and several input data sets with different characteristics. Our studies show groundbreaking results in terms of the achieved speedups and that scalability is not impaired.

关键词： Asymmetric Sets of Tasks Multicore Processors Multilevel Task parallelism Exploitation parallel programming Phylogenetics Shared-Memory Systems Third-Party Tools

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parallelism Extraction in Embedded Software for Android Devices 15

Parallelism Extraction in Embedded Software for Android Devi...

引用

International Conference on Embedded Computer Systems Architectures Modeling and Simulation

作者： Aguilar, Miguel Angel Eusse, Juan Fernando Ray, Projjol Leupers, Rainer Ascheid, Gerd Sheng, Weihua Sharma, Prashant Rhein Westfal TH Aachen Inst Commun Technol & Embedded Syst Aachen Germany Silexica Software Solut GmbH Aachen Germany Samsung R&D Inst Surrey England

ISBN: (纸本)9781467373111

In the last years the presence of embedded devices in everyday life has grown exponentially. The market of these devices imposes conflicting requirements such as cost, performance and energy. The use of Multiprocessor Systems on Chip (MPSoCs) is a widely accepted solution to provide a trade-off between these demands. However, programming MPSoCs is still a cumbersome task. Several research efforts have addressed this challenge in two complementary directions: paradigms for parallel programming and tools for parallelism extraction. However, most of these efforts are focused on the high performance domain and they do not consider the characteristics of the underlying platform. In this paper, we present an approach to extract multiple forms of parallelism from sequential C code, which is applied to widespread Android mobile devices. We show the effectiveness of our work by parallelizing relevant embedded benchmarks on a quad-core Nexus 7 tablet.

关键词： Androids Embedded software parallelism Synclitism Methyltestosterone Embedded device Multiple forms parallel programming everyday life C CODES

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Exascaling Your Library: Will Your Implementation Meet Your Expectations? 15

Exascaling Your Library: Will Your Implementation Meet Your ...

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29th ACM International Conference on Supercomputing (ICS)

作者： Shudler, Sergei Calotoiu, Alexandru Hoefler, Torsten Strube, Alexandre Wolf, Felix Tech Univ Darmstadt Darmstadt Germany Swiss Fed Inst Technol Zurich Switzerland Julich Supercomp Ctr Julich Germany

ISBN: (纸本)9781450335591

Many libraries in the HPC field encapsulate sophisticated algorithms with clear theoretical scalability expectations. However, hardware constraints or programming bugs may sometimes render these expectations inaccurate or even plainly wrong. While algorithm engineers have already been advocating the systematic combination of analytical performance models with practical measurements for a very long time, we go one step further and show how this comparison can become part of automated testing procedures. The most important applications of our method include initial validation, regression testing, and benchmarking to compare implementation and platform alternatives. Advancing the concept of performance assertions, we verify asymptotic scaling trends rather than precise analytical expressions, relieving the developer from the burden of having to specify and maintain very fine-grained and potentially non-portable expectations. In this way, scalability validation can be continuously applied throughout the whole development cycle with very little effort. Using MPI as an example, we show how our method can help uncover non-obvious limitations of both libraries and underlying platforms.

关键词： software engineering high performance computing parallel programming performance analysis

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Order Graphs and Cross-layer Parametric Significance-driven Modelling 15

Order Graphs and Cross-layer Parametric Significance-driven ...

引用

15th International Conference on Application of Concurrency to System Design (ACSD)

作者： Rafiev, A. Xia, F. Iliasov, A. Gensh, R. Aalsaud, A. Romanovsky, A. Yakovlev, A. Newcastle Univ Newcastle Upon Tyne Tyne & Wear England

ISBN: (纸本)9781467378826

Traditional hierarchical modelling methods tend to have layers of abstraction corresponding to naturally existing layers of concern in multi-level systems. Although logically and functionally intuitive, this is not always optimal for analysis and design. For instance, parts of a system in the same logical layer may not contribute to the same degree on some metric, e.g. system power consumption. When focusing on a specific parameter or set of parameters, to moderate the analysis, design and runtime effort, less significant parts of the system should be modelled at higher levels of abstraction and more significant ones with more detail. This parametric significance-driven modelling approach focuses more on optimal parametric fidelity than on logical intuition. Using system power consumption as an example parameter, this paper presents Order Graphs (OGs), which have a clear hierarchical structure, and provide straightforward vertical zooming across multiple layers (orders) of model abstraction, resulting in the discovery of power-proportional cuts that run through different orders to be analysed together in a flat manner. Stochastic Activity Networks (SANs), a good flat modelling method, is suggested as an example of studying techniques for cuts discovered with OGs. A series of experiments on an Odroid development system consisting of an ARM big. LITTLE multi-core structure provides initial validation for the approach.

关键词： Analytical models Concurrent computing Hardware Power demand Runtime Stochastic processes System analysis and design cross-layer graph hierarchy modelling parametric-proportional significance-driven Runtime Power demand Modeling Markov chain ANALYSIS MODELS Computer hardware parallel programming Social Hierarchy level of abstraction Intelligent systems analysis and design Abstraction Stochastic Processes Power consumption Parametric cuts

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CUDA Grid-Level Task Progression Algorithms 17

CUDA Grid-Level Task Progression Algorithms

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2015 IEEE 17th International Conference on High Performance Computing and Communications (HPCC)

作者： Kartsaklis, Christos Joubert, Wayne Hernandez, Oscar R. Eisenbach, Markus Elwasif, Wael R. Bernholdt, David E. Oak Ridge Natl Lab Oak Ridge TN 37831 USA

ISBN: (纸本)9781479989379

Tasking is a prominent parallel programming model. In this paper we conduct a first study into the feasibility of task-parallel execution at the CUDA grid, rather than the stream/kernel level, for regular, fixed in-out dependency task graphs, similar to those found in wavefront computational patterns, making the findings broadly applicable. We propose and evaluate three CUDA task progression algorithms, where threadblocks cooperatively process the task graph, and argue about their performance in terms of tasking throughput, atomics and memory IO overheads. Our initial results demonstrate a throughput of 38 million tasks/second on a Kepler K20X architecture.

关键词： parallel architectures parallel programming CUDA grid-level task progression algorithm CUDA task progression algorithm Kepler K20X architecture parallel programming model wavefront computational pattern Computational modeling Graphics processing units Instruction sets Kernel parallel processing Radiation detectors Runtime

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An Efficient parallel Algorithm for Simpson Cumulative Integration on GPU 3

An Efficient Parallel Algorithm for Simpson Cumulative Integ...

引用

3rd International Symposium on Computing and Networking (CANDAR)

作者： Swardiana, Wayan Aditya Wirahman, Taufiq Sadikin, Rifki Indonesian Inst Sci Cibinong Sci Ctr Res Ctr Informat High Performance Comp Lab Jakarta Indonesia

ISBN: (纸本)9781467397971

In this paper, we present an efficient parallel algorithm for calculating cumulative integration based on Simpson's rule. The proposed parallel algorithm exploits two Blelloch's prefix sums. The first scan is used to calculate even-index, while the second scan is used to calculate odd-index cumulative integration. We implement the parallel algorithm on NVIDIA CUDA based GPUs. Performance of the proposed parallel algorithm is measured by calculating speedup. We also present accuracy performance of the proposed algorithm. Based on the performance measurements, we can conclude that the parallel proposed algorithm is faster than optimized CPU codes with 3 times speedup.

关键词： prefix sums cumulative integration graphics processing unit NVIDIA CUDA parallel processing parallel programming

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Developing a Hands-On Course Around Building and Testing High Performance Computing Clusters

Developing a Hands-On Course Around Building and Testing Hig...

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15th Annual International Conference on Computational Science (ICCS)

作者： Frinkle, Karl Morris, Mike Southeastern Oklahoma State Univ Durant OK USA

We describe a successful approach to designing and implementing a High Performance Computing (HPC) class focused on creating competency in building, configuring, programming, troubleshooting, and benchmarking HPC clusters. By coordinating with campus services, we were able to avoid any additional costs to the students or the university. Students built three twelve-unit independently-operating clusters. Working groups were formed for each cluster and they installed the operating system, created users, connected to the campus network and wrote a variety of scripts and parallel programs while documenting the process. We describe how we solved unexpected problems encountered along the way. We illustrate through pre-and post-course surveys that students gained substantial knowledge in fundamental aspects of HPC through the hands-on approach of creating their own clusters.

关键词： High Performance Computing Supercomputing Beowulf Cluster HPC HPC Education Hardware Management parallel programming Cluster Operating Systems Curriculum Development BCCD Course Assessment

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MatrixMap: programming Abstraction and Implementation of Matrix Computation for Big Data Applications 21

MatrixMap: Programming Abstraction and Implementation of Mat...

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21st IEEE International Conference on parallel and Distributed Systems ICPADS

作者： Huangfu, Yaguang Cao, Jiannong Lu, Hongliang Liang, Guanqing Hong Kong Polytech Univ Dept Comp Hong Kong Hong Kong Peoples R China Natl Univ Def Technol Parallel & Distributed Proc Lab Changsha Hunan Peoples R China

ISBN: (纸本)9780769557854

The computation core of many big data applications can be expressed as general matrix computations, including linear algebra operations and irregular matrix operations. However, existing parallel programming systems such as Spark do not have programming abstraction and efficient implementation for general matrix computations. In this paper, we present MatrixMap, a unified and efficient data-parallel system for general matrix computations. MatrixMap provides powerful yet simple abstraction, consisting of a distributed data structure called bulk key matrix and a computation interface defined by matrix patterns. Users can easily load data into bulk key matrices and program algorithms into parallel matrix patterns. MatrixMap outperforms current state-of-the-art systems by employing three key techniques: matrix patterns with lambda functions for irregular and linear algebra matrix operations, asynchronous computation pipeline with optimized data shuffling strategies for specific matrix patterns and in-memory data structure reusing data in iterations. Moreover, it can automatically handle the parallelization and distribute execution of programs on a large cluster. The experiment results show that MatrixMap is 12 times faster than Spark.

关键词： Big Data parallel programming Matrix Computation Machine Learning Graph Processing

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Number of Tasks, not Threads, is Key 23

Number of Tasks, not Threads, is Key

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23rd Euromicro International Conference on parallel, Distributed, and Network-Based Processing (PDP)

作者： Tousimojarad, Ashkan Vanderbauwhede, Wim Univ Glasgow Sch Comp Sci Glasgow G12 8QQ Lanark Scotland

ISBN: (纸本)9781479984909

The concept of task already exists in many parallel programming models. Programmers express parallelism by defining tasks in their applications, and runtime libraries schedule tasks on threads. However, in many task-based parallel programming models, choosing the right number of threads is still key to performance. Hence, the onus is on the programmer to decide not only about the number of tasks, but also about the optimal number of threads in order to get good performance. In this paper, we aim to show that desirable performance can be achieved by only focusing on tasks. For this purpose, we compare a purely task-centric parallel programming model called GPRM with three popular approaches (OpenMP, Intel Cilk Plus, and TBB) on two modern manycore systems, the Tilera TILEPro64 and Intel Xeon Phi, which have respectively 64 and 60 physical cores integrated into a single chip. We have chosen three benchmarks with different characteristics to show that a task-centric approach such as GPRM can facilitate parallel programming while it outperforms other models in most cases. It does so by controlling only the number of tasks, rather than having to tune the number of threads.

关键词： Cilk Plus GPRM Manycore OpenMP parallelism Performance TBB TILEPro64 Task Thread Xeon Phi THREADS Religious Missions Synclitism Program Thread parallel programming parallelism Computer personnel

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parallel Megabase DNA Sequence Comparison with OpenCL 22

Parallel Megabase DNA Sequence Comparison with OpenCL

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22nd International Conference on High Performance Computing

作者： de Figueiredo, Marco Antonio C., Jr. Sandes, Edans F. de O. de Melo, Alba Cristina M. A. Univ Brasilia UnB Brasilia DF Brazil Sarah Network Rehabil Hosp Brasilia DF Brazil

ISBN: (纸本)9781467384889

Biological sequence comparison is a very common task in Bioinformatics applications. Many parallel solutions have been proposed for this problem, using different IIPC platforms, progranuned usually with platform -specific languages and frameworks. With this approach, it is difficult to port solutions among different platforms such as CPUs and GPUs, for instance. To tackle this problem, this paper proposes and evaluates an OpenCL parallel solution for Biological Sequence Comparison, which was integrated to the CUDAlign Megabase Sequence Comparison tool. The evaluation of our solution shows we were able to obtain a program for CPUs and GPUs (NVidia and AMD) with basically the same OpenCL code. In addition, in the comparison with SW# and CUDAlign optimized CUDA codes, we show that the performance of our OpenCL version has comparable and, many times, superior performance.

关键词： Biological Sequence Comparison Graphical Processor Units (GPUs) OpenCL parallel programming

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