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IEEE International Conference on Big Data

作者： Wu, Dongyao Sakr, Sherif Zhu, Liming Lu, Qinghua NICTA Software Syst Res Grp Sydney NSW Australia Univ New South Wales Sch Comp Sci & Engn Sydney NSW Australia King Saud bin Abdulaziz Univ Hlth Sci Riyadh Saudi Arabia China Univ Petr Coll Comp & Commun Engn Qingdao Peoples R China

ISBN: (纸本)9781479999255

Over the past years, frameworks such as MapReduce and Spark have been introduced to ease the task of developing big data programs and applications. However, the jobs in these frameworks are roughly defined and packaged as executable jars without any functionality being exposed or described. This means that deployed jobs are not natively composable and reusable for subsequent development. Besides, it also hampers the ability for applying optimizations on the data flow of job sequences and pipelines. In this paper, we present the Hierarchically Distributed Data Matrix (HDM) which is a functional, strongly-typed data representation for writing composable big data applications. Along with HDM, a runtime framework is provided to support the execution of HDM applications on distributed infrastructures. Based on the functional data dependency graph of HDM, multiple optimizations are applied to improve the performance of executing HDM jobs. The experimental results show that our optimizations can achieve improvements of between 10% to 60% of the Job-Completion-Time for different types of operation sequences when compared with the current state of art, Apache Spark.

关键词： big data processing parallel programming functional programming distributed systems system architecture

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CIVL: The Concurrency Intermediate Verification Language 15

CIVL: The Concurrency Intermediate Verification Language

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International Conference for High Performance Computing, Networking, Storage and Analysis (SC)

作者： Siegel, Stephen F. Zheng, Manchun Luo, Ziqing Zirkel, Timothy K. Marianiello, Andre V. Edenhofner, John G. Dwyer, Matthew B. Rogers, Michael S. Univ Delaware Dept Comp & Informat Sci Newark DE 19716 USA Univ Nebraska Dept Comp Sci & Engn Lincoln NE 68588 USA

ISBN: (纸本)9781450337236

There are many ways to express parallel programs: message passing libraries (MPI) and multithreading/GPU language extensions such as OpenMP, Pthreads, and CUDA, are but a few. This multitude creates a serious challenge for developers of software verification tools: it takes enormous effort to develop such tools, but each development effort typically targets one small part of the concurrency landscape, with little sharing of techniques and code among efforts. To address this problem, we present CIVL: the Concurrency Intermediate Verification Language. CIVL provides a general concurrency model capable of representing programs in a variety of concurrency dialects, including those listed above. The CIVL framework currently includes front-ends for the four dialects, and a back-end verifier which uses model checking and symbolic execution to check a number of properties, including the absence of deadlocks, race conditions, assertion violations, illegal pointer dereferences and arithmetic, memory leaks, divisions by zero, and out-of bound array indexing;it can also check that two programs are functionally equivalent.

关键词： concurrency verification parallel programming program transformation intermediate representation MPI OpenMP CUDA Pthreads model checking symbolic execution

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Extended Species for Code parallelization Through Algorithmic Classification 5

Extended Species for Code Parallelization Through Algorithmi...

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IEEE International Advance Computing Conference (IACC 2015)

作者： Mustafa, B. Ahmed, Waseem Bearys Inst Technol Dept Comp Sci & Engn Mangalore India HKBK Coll Engn Dept Comp Sci & Engn Bangalore Karnataka India

ISBN: (纸本)9781479980475

Multicore systems along with GPUs enabled to increase the parallelism extensively. Few compilers are enhanced to emerging issues with respect to threading and synchronization. Proper classification of algorithms and programs will benefit largely to the community of programmers to get chances for efficient parallelization. In this work we analyzed the existing species for algorithm classification, where we discuss the classification of related work and compare the amount of problems which are difficult for classification. We have selected set of algorithms which resemble in structure for various problems but perform given specific tasks. These algorithms are tested using existing tools such as Bones compiler and A-Darwin, an automatic species extraction tool. The access patterns are produced for various algorithmic kernels by running against A-Darwin and analysis is done for various code segments. We have identified that all the algorithms cannot be classified using only existing patterns and created new set of access patterns.

关键词： parallel programming Bones Access Patterns Algorithm Classification A-Darwin

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Mechanisms of the formation and propagation of sociobiological interactions: a computer simulation study

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Russian Journal of Genetics: Applied Research 2015年第6期5卷 672-678页

作者： Lashin, S.A. Mamontova, E.A. Matushkin, Yu. G. Kolchanov, N.A. Institute of Cytology and Genetics Siberian Branch of the Russian Academy of Sciences Novosibirsk 630090 Russian Federation Novosibirsk State University Novosibirsk Russian Federation

Over 10000 scientific studies have been dedicated to mathematical modeling and simulations of biologic systems at all levels of their organization. At the Institute of Cytology and Genetics, Novosibirsk, software tools are being developed for the analysis of the propagation of ideas/opinions in social systems with regard not only to social but also biological (genetic, physiological, and psychological) factors. The consideration of more factors in these models allows better analysis of social processes, more precise predictions, and smarter strategies for process control. Agent-based modeling is an approach that is widely used for these tasks. In the present study, the simple model introduced by Bonabeau (2002) is considered and extended. In the original model, the complex behavior of the system arises on the basis of two different strategies of agent behavior. The extended sociobiological model describes more sophisticated agents with additional characteristics. It allows social and biological submodels to be combined within a common software tool. As the number of agent parameters (dissatisfaction, enmity, and mobility) increases, the dynamic variability of the model increases manifold times. The addition of the dissatisfaction parameter enables an agent to compare his success with other agents, which may be interpreted as self-esteem. The model can be further improved by the addition of various mechanisms of idea and opinion transmission, which will make it possible to model the dissemination of ideas within populations (and, in addition, the spread of diseases, rumors, and any sort of information), to model a heterogeneous distribution of parameters within population, and to consider different topologies of social networks. Nevertheless, even now the “aggressor–defender” model can simulate many social and biological phenomena. © 2015, Pleiades Publishing, Ltd.

关键词： agent-based model parallel programming social system “aggressor–defender” model

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Towards Classification of Concurrency Bugs Based on Observable Properties 1

Towards Classification of Concurrency Bugs Based on Observab...

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First International Workshop on Complex faUlts and Failures in LargE Software Systems COUFLESS

作者： Asadollah, Sara Abbaspour Hansson, Hans Sundmark, Daniel Eldh, Sigrid Malardalen Univ Vasteras Sweden Ericsson AB Kista Sweden

ISBN: (纸本)9781467370349

In software engineering, classification is a way to find an organized structure of knowledge about objects. Classification serves to investigate the relationship between the items to be classified, and can be used to identify the current gaps in the field. In many cases users are able to order and relate objects by fitting them in a category. This paper presents initial work on a taxonomy for classification of errors (bugs) related to concurrent execution of application level software threads. By classifying concurrency bugs based on their corresponding observable properties, this research aims to examine and structure the state of the art in this field, as well as to provide practitioner support for testing and debugging of concurrent software. We also show how the proposed classification, and the different classes of bugs, relates to the state of the art in the field by providing a mapping of the classification to a number of recently published papers in the software engineering field.

关键词： bugs state of the art Bugs parallel programming Taxonomy parallel execution Debugging Concurrency Software engineering

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parallel Megabase DNA Sequence Comparison with OpenCL 22

Parallel Megabase DNA Sequence Comparison with OpenCL

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22nd International Conference on High Performance Computing

作者： de Figueiredo, Marco Antonio C., Jr. Sandes, Edans F. de O. de Melo, Alba Cristina M. A. Univ Brasilia UnB Brasilia DF Brazil Sarah Network Rehabil Hosp Brasilia DF Brazil

ISBN: (纸本)9781467384889

Biological sequence comparison is a very common task in Bioinformatics applications. Many parallel solutions have been proposed for this problem, using different IIPC platforms, progranuned usually with platform -specific languages and frameworks. With this approach, it is difficult to port solutions among different platforms such as CPUs and GPUs, for instance. To tackle this problem, this paper proposes and evaluates an OpenCL parallel solution for Biological Sequence Comparison, which was integrated to the CUDAlign Megabase Sequence Comparison tool. The evaluation of our solution shows we were able to obtain a program for CPUs and GPUs (NVidia and AMD) with basically the same OpenCL code. In addition, in the comparison with SW# and CUDAlign optimized CUDA codes, we show that the performance of our OpenCL version has comparable and, many times, superior performance.

关键词： Biological Sequence Comparison Graphical Processor Units (GPUs) OpenCL parallel programming

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Using Per-Loop CPU Clock Modulation for Energy Efficiency in OpenMP Applications 44

Using Per-Loop CPU Clock Modulation for Energy Efficiency in...

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44th Annual International Conference on parallel Processing Workshops (ICPPW)

作者： Wang, Wei Porterfield, Allan Cavazos, John Bhalachandra, Sridutt Univ Delaware Dept Comp & Informat Sci Newark DE 19716 USA Univ N Carolina Renaissance Comp Inst Chapel Hill NC 27515 USA Univ N Carolina Dept Comp Sci Chapel Hill NC 27515 USA

ISBN: (纸本)9781467375887

As the HPC community moves into the exascale computing era, application energy is becoming as large of a concern as performance. Optimizing for energy will be essential in the effort to overcome the limited power envelope. Existing efforts to optimize energy in applications employ Dynamic Frequency and Voltage Scaling (DVFS) to maximize energy savings in less compute-intensive regions or non-critical execution paths. However, we found that DVFS has high power state switching overhead, preventing its use when a more fine-grained technique is necessary. In this work, we take advantage of the low transition overhead of CPU clock modulation and apply it to fine-grained OpenMP parallel loops. The energy behavior of OpenMP parallel regions is first characterized by changing the effective frequency using clock modulation. The clock modulation setting that achieves the best energy efficiency is then determined for each region. Finally, different CPU clock modulation settings are applied to the different loops within the same application. The resulting multi-frequency execution of OpenMP applications achieves better energy-delay trade-off than any single frequency setting. In the best case scenario, the multi-frequency approach achieved 8.6% energy savings with less than 1.5% execution time increase. Concurrency throttling (i.e., reducing the number of hardware threads used by an application) saves more energy and can be combined with CPU clock modulation. Using both, we see savings of 21% energy and improvement of energy-delay product (EDP) by 16%.

关键词： Clocks Concurrent computing Frequency control Frequency locked loops Frequency modulation Time-frequency analysis Timing devices Frequency control Energy efficiency Frequency modulation Time frequency analysis frequency locked loops parallel programming Energy sources central processing units energy saving multiple-frequency

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Impact of Version Management on Transactional Memories' Performance 27

Impact of Version Management on Transactional Memories' Perf...

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IEEE 27th International Symposium on Computer Architecture and High Performance Computing

作者： Teixeira, Felipe L. Pilla, Mauricio L. Du Bois, Andre R. Mosse, Daniel Univ Fed Pelotas CDTec PPGC Lab Ubiquitous & Parallel Syst Pelotas Brazil Univ Pittsburgh Dept Comp Sci Pittsburgh PA 15260 USA

ISBN: (纸本)9781467386210

Software Transactional Memory (STM) is a synchronization method proposed as an alternative to lock-based synchronization. It provides a higher-level of abstraction that is easier to program, and that enables software composition. Transactions are defined by programmers, but the runtime system is responsible for detecting conflicts and avoiding race conditions. One of the design axis in STMs is how version management is implemented in order to secure atomicity. There are two type of version management: Eager Versioning and Lazy Versioning. In this work, we evaluate the version management options implemented in TinySTM through an orthogonal analysis and performance evaluation.

关键词： Software transactional memory transactional memory parallel programming

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Dynamic Task Scheduling Scheme for a GPGPU programming Framework 3

Dynamic Task Scheduling Scheme for a GPGPU Programming Frame...

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3rd International Symposium on Computing and Networking (CANDAR)

作者： Ohno, Kazuhiko Yamamoto, Rei Mie Univ Dept Informat Engn Tsu Mie Japan

ISBN: (纸本)9781467397971

The computational power and the physical memory size of a single GPU device are often insufficient for large-scale problems. Using CUDA, the user must explicitly partition such problems into several tasks repeating the data transfer and kernel execution. To use multiple GPUs, explicit device switching is also needed. Furthermore, low-level hand optimizations such as load balancing and determining task granularity are required to achieve high performance. To handle large-scale problems without any additional user code, we introduce an implicit dynamic task scheduling scheme to our CUDA variation MESI-CUDA. MESI-CUDA is designed to abstract the low-level GPU features;virtual shared variables and logical thread mappings hide the complex memory hierarchy and physical characteristics. On the other hand, explicit parallel execution using kernel functions is the same as in CUDA. In our scheme, each kernel invocation in the user code is translated into a job submission to the runtime scheduler. The scheduler partitions a job into tasks considering the device memory size and dynamically schedules them to the available GPU devices. Thus the user can simply specify kernel invocations independent of the execution environment. The evaluation result shows that our scheme can automatically utilize heterogeneous GPU devices with small overhead.

关键词： GPGPU CUDA parallel programming compiler optimization scheduling

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Multilevel Task parallelism Exploitation on Asymmetric Sets of Tasks and When Using Third-Party Tools 14

Multilevel Task Parallelism Exploitation on Asymmetric Sets ...

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IEEE 14th International Symposium on parallel and Distributed Computing (ISPDC)

作者： Neves, Diogo Telmo Univ Minho Dept Informat Campus Gualtar Braga Portugal

ISBN: (纸本)9781467371483

To harness the performance potential of current multicore processors, a multitude of algorithms, frameworks and libraries have been developed. Nevertheless, it is still extremely difficult to take advantage of the full potential of multicore processors. Moreover, in the presence of asymmetric sets of tasks, and/or when using third-party tools, this problem would only aggravate. In this paper, we present a software design and two algorithms to enable multilevel task parallelism exploitation on asymmetric sets of tasks and when using third-party tools. The proposed software design along with both algorithms allow, in a seamlessly way, the efficient exploitation of coarse-grained-inter-task-and fine-grained-intra-task-parallelism. Thus, it becomes possible to make a better and transparent usage of the performance potential of current multicore processors on shared-memory systems. To assess the feasibility and the benefit of applying the proposed software design along with both algorithms, we used three irregular applications from Phylogenetics-real world problems-, and several input data sets with different characteristics. Our studies show groundbreaking results in terms of the achieved speedups and that scalability is not impaired.

关键词： Asymmetric Sets of Tasks Multicore Processors Multilevel Task parallelism Exploitation parallel programming Phylogenetics Shared-Memory Systems Third-Party Tools

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