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检索条件"主题词=Parallel programming"

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UCX: An Open Source Framework for HPC Network APIs and Beyond 23

UCX: An Open Source Framework for HPC Network APIs and Beyon...

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IEEE 23rd Annual Symposium on High-Performance Interconnects

作者： Shamis, Pavel Venkata, Manjunath Gorentla Lopez, M. Graham Baker, Matthew B. Hernandez, Oscar Itigin, Yossi Dubman, Mike Shainer, Gilad Graham, Richard L. Liss, Liran Shahar, Yiftah Potluri, Sreeram Rossetti, Davide Becker, Donald Poole, Duncan Lamb, Christopher Kumar, Sameer Stunkel, Craig Bosilca, George Bouteiller, Aurelien Oak Ridge Natl Lab Oak Ridge TN 37831 USA Mellanox Technol Yokneam Illit Israel NVIDIA Corp Santa Clara CA USA IBM Corp Armonk NY USA Univ Tennessee Knoxville TN USA

ISBN: (纸本)9781467391603

This paper presents Unified Communication X (UCX), a set of network APIs and their implementations for high throughput computing. UCX comes from the combined effort of national laboratories, industry, and academia to design and implement a high-performing and highly-scalable network stack for next generation applications and systems. UCX design provides the ability to tailor its APIs and network functionality to suit a wide variety of application domains and hardware. We envision these APIs to satisfy the networking needs of many programming models such as Message Passing Interface (MPI), OpenSHMEM, Partitioned Global Address Space (PGAS) languages, task-based paradigms and I/O bound applications. To evaluate the design we implement the APIs and protocols, and measure the performance of overhead-critical network primitives fundamental for implementing many parallel programming models and system libraries. Our results show that the latency, bandwidth, and message rate achieved by the portable UCX prototype is very close to that of the underlying driver. With UCX, we achieved a message exchange latency of 0.89 us, a bandwidth of 6138.5 MB/s, and a message rate of 14 million messages per second. As far as we know, this is the highest bandwidth and message rate achieved by any network stack (publicly known) on this hardware.

关键词： application program interfaces input-output programs message passing parallel programming public domain software HPC network APIs I/O bound applications MPI OpenSHMEM PGAS languages UCX Unified Communication X high throughput computing highly-scalable network stack message passing interface open source framework parallel programming models partitioned global address space languages system libraries task-based paradigms Bandwidth Electronics packaging Hardware Libraries Memory management programming Protocols HPC Infiniband Middleware PGAS RDMA message passing mannose phosphate isomerase remote procedure calls parallel programming input-output programs open source software Application programming interfaces Infiniband Electronics packaging RDMA Bandwidth High Performance Computing Computer hardware Store management Middleware

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Low-Cost and Low-Power Video Filtering with parallel Many Cores 9

Low-Cost and Low-Power Video Filtering with Parallel Many Co...

引用

9th International Conference on Electrical and Electronics Engineering (ELECO)

作者： Gener, Y. Serhan Yildiz, Abdullah Goren, Sezer Yeditepe Univ Dept Comp Engn Istanbul Turkey

ISBN: (纸本)9786050107371

This report examines the advantages of low-cost many-core architectures over graphical processing units (GPU) for massively parallel applications. We show that graphical processing units (GPU) could be costly and power inefficient for workloads such as spatial domain video filtering tasks that take advantage of parallel computing. In this study, we analyze a simple video filtering application on a low-cost parallel programming platform called "parallella" which includes a Xilinx Zynq all programmable system-on-chip (SoC) along with a parallel processing architecture named "Epiphany" co-processor which includes 16 small RISC cores. We compare it to other hardware and software alternatives in terms of cost, power, and performance. We show that it is possible to use such a low-cost platform for these kinds of workloads without too much programming effort.

关键词： parallel programming

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Design and Development of Domain Specific Active Libraries with Proxy Applications

Design and Development of Domain Specific Active Libraries w...

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IEEE International Conference on Cluster Computing (CLUSTER)

作者： Reguly, I. Z. Mudalige, G. R. Giles, M. B. Univ Oxford Oxford E Res Ctr Oxford OX1 2JD England Pazmany Peter Catholic Univ Fac Informat Technol & Bion Budapest Hungary

ISBN: (纸本)9781467365987

Representative applications are versatile tools to evaluate new programming approaches, techniques and optimisations as a way to ensure continued high performance on future computing architectures. They make experimentation much easier before adopting changes/insights into the large scientific codes. In this paper we demonstrate the important role played by representative/proxy applications in designing and developing two high-level programming approaches: namely the OP2 and OPS domain specific (active) libraries. OP2 and OPS utilizes code generation techniques to produce automatic parallelisations from a high-level abstract problem declaration. The strategy delivers significant developer productivity to the domain scientist, while at the same time allowing computational experts to adopt the latest programming models and hardware-specific optimisations into the library and code generation tools to achieve near optimal performance. We show how representative applications have been a cornerstone in the development of OP2 and OPS and chart our experiences. In particular, we demonstrate how the range of hand-tuned optimized parallelisations of the CloverLeaf hydrodynamics mini-app allowed us to gain clear evidence that the OPS based code generated parallelisations were indeed as optimal as the hand-tuned versions. Additionally, with the use of a representative application from the CFD domain we demonstrate how the optimisations discovered and applied to proxy apps are indeed directly transferable to a large-scale industrial application at Rolls Royce plc. These results provide significant evidence into the utility of representative applications to improve productivity, enable performance portability and ultimately future-proof scientific applications.

关键词： computational fluid dynamics hydrodynamics parallel programming program compilers software libraries CFD domain CloverLeaf hydrodynamics mini-app OPS domain specific active libraries Rolls Royce plc automatic parallelisations code generation technique computing architecture developer productivity future-proof scientific application hand-tuned optimized parallelisation hardware-specific optimisation high-level abstract problem declaration high-level programming approach large-scale industrial application near optimal performance performance portability programming model proxy application representative applications scientific codes Automotive components Computational modeling Computer architecture Graphics processing units Libraries Optimization programming

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Automatic Cluster parallelization and Minimizing Communication via Selective Data Replication

Automatic Cluster Parallelization and Minimizing Communicati...

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IEEE High Performance Extreme Computing Conference (HPEC)

作者： Tavarageri, Sanket Meister, Benoit Baskaran, Muthu Pradelle, Benoit Henretty, Tom Konstantinidis, Athanasios Johnson, Ann Lethin, Richard Reservoir Labs 632 Broadway New York NY 10012 USA

ISBN: (纸本)9781467392860

The technology scaling has initiated two distinct trends that are likely to continue into future: first, the increased parallelism in hardware and second, the increasing performance and energy cost of communication relative to computation. Both of the above trends call for development of compiler and runtime systems to automatically parallelize programs and reduce communication in parallel computations to achieve the desired high performance in an energy-efficient fashion. In this paper, we propose the design of an integrated compiler and runtime system that auto-parallelizes loop-nests to clusters and, a novel communication avoidance method that reduces data movement between processors. Communication minimization is achieved via data replication: data is replicated so that a larger share of the whole data set may be mapped to a processor and hence, non-local memory accesses reduced. Experiments on a number of benchmarks show the effectiveness of the approach.

关键词： data handling parallel programming parallelising compilers power aware computing program control structures storage management automatic cluster parallelization automatic program parallelization communication avoidance method communication minimization compiler energy efficiency hardware parallelism loop-nest autoparallelization nonlocal memory access parallel computation processor data movement runtime system selective data replication technology scaling Arrays Benchmark testing Complexity theory Memory management Minimization Program processors Runtime

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Energy-Efficient Brute Force Password Cracking

Energy-Efficient Brute Force Password Cracking

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2015 European Intelligence and Security Informatics Conference

作者： Mount, Sarah Newman, Robert Wolverhampton Univ Sch Math & Comp Sci Wolverhampton W Midlands England

ISBN: (纸本)9781479986576

This paper considers the feasibility of applying low-power, energy-efficient hardware to the problem of password cracking. Low-power hardware may be usefully applied to security problems in applications where speed is not critical, but devices must be deployed discreetly and may be powered by energy-harvesting (e.g. long term surveillance). A proof of concept implementation is described and the performance trade-offs related to parallelising the implementation are discussed.

关键词： cryptography parallel programming passwords

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STAPL-RTS: An Application Driven Runtime System 15

STAPL-RTS: An Application Driven Runtime System

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29th ACM International Conference on Supercomputing (ICS)

作者： Papadopoulos, Ioannis Thomas, Nathan Fidel, Adam Amato, Nancy M. Rauchwerger, Lawrence Texas A&M Univ College Stn TX 77843 USA

ISBN: (纸本)9781450335591

Modern HPC systems are growing in complexity, as they move towards deeper memory hierarchies and increasing use of computational heterogeneity via GPUs or other accelerators. When developing applications for these platforms, programmers are faced with two bad choices. On one hand, they can explicitly manage all machine resources, writing programs decorated with low level primitives from multiple APIs (e.g. Hybrid MPI / OpenMP applications). Though seemingly necessary for efficient execution, it is an inherently non-scalable way to write software. Without a separation of concerns, only small programs written by expert developers actually achieve this efficiency. Furthermore, the implementations are rigid, difficult to extend, and not portable. Alternatively, users can adopt higher level programming environments to abstract away these concerns. Extensibility and portability, however, often come at the cost of lost performance. The mapping of a user's application onto the system now occurs without the contextual information that was immediately available in the more coupled approach. In this paper, we describe a framework for the transfer of high level, application semantic knowledge into lower levels of the software stack at an appropriate level of abstraction. Using the stapl library, we demonstrate how this information guides important decisions in the runtime system (stapl-rts), such as multi-protocol communication coordination and request aggregation. Through examples, we show how generic programming idioms already known to C++ programmers are used to annotate calls and increase performance.

关键词： parallel programming Data flow Runtime Systems Application Driven Optimizations Distributed Memory Shared Memory Remote Method Invocation

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Perspectives on White-Box Testing: Coverage, Concurrency, and Concolic Execution 8

Perspectives on White-Box Testing: Coverage, Concurrency, an...

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8th IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)

作者： Farzan, Azadeh Holzer, Andreas Veith, Helmut Univ Toronto Toronto ON M5S 1A1 Canada Vienna Univ Technol Vienna Austria

ISBN: (纸本)9781479971251

The last years have seen a fruitful exchange of ideas between automated software verification and white-box software testing;the industrial impact of concolic testing for sequential software is the most notable result of this interdisciplinary effort. While concolic testing is very successful at finding bugs, and even achieves verification in the limit, it is often hard to quantify the progress it achieves towards verification. In this paper, we survey two recent projects which aim to remedy this situation: In the FQL project, we devise a test specification language which facilitates precise specification of coverage criteria, and a separation of concerns between test specification and test case generation. In con2colic testing, we develop a concolic testing methodology for concurrent programs where progress is measured in terms of the data flow between program threads.

关键词： data flow test coverage Intellectual cooperation program verification parallel programming Verification Specifications CASING INSPECTION Perspective Legal Executions Concurrency TEST SPECIFICATION

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An Efficient Data-Dependence Profiler for Sequential and parallel Programs 29

An Efficient Data-Dependence Profiler for Sequential and Par...

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29th IEEE International parallel and Distributed Processing Symposium (IPDPS)

作者： Li, Zhen Jannesari, Ali Wolf, Felix German Res Sch Simulat Sci D-52062 Aachen Germany Tech Univ Darmstadt D-64289 Darmstadt Germany

ISBN: (纸本)9781479986484

Extracting data dependences from programs serves as the foundation of many program analysis and transformation methods, including automatic parallelization, runtime scheduling, and performance tuning. To obtain data dependences, more and more related tools are adopting profiling approaches because they can track dynamically allocated memory, pointers, and array indices. However, dependence profiling suffers from high runtime and space overhead. To lower the overhead, earlier dependence profiling techniques exploit features of the specific program analyses they are designed for. As a result, every program analysis tool in need of data-dependence information requires its own customized profiler. In this paper, we present an efficient and at the same time generic data-dependence profiler that can be used as a uniform basis for different dependence-based program analyses. Its lock-free parallel design reduces the runtime overhead to around 86x on average. Moreover, signature-based memory management adjusts space requirements to practical needs. Finally, to support analyses and tuning approaches for parallel programs such as communication pattern detection, our profiler produces detailed dependence records not only for sequential but also for multi-threaded code.

关键词： data dependence profiling program analysis parallelization parallel programming

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An Enhanced Profiling Framework for the Analysis and Development of parallel Primitives for GPUs 9

An Enhanced Profiling Framework for the Analysis and Develop...

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9th IEEE International Symposium on Embedded Multicore/Manycore Systems-on-Chip (MCSoC)

作者： Bombieri, Nicola Busato, Federico Fummi, Franco Univ Verona Dept Comp Sci I-37100 Verona Italy

ISBN: (纸本)9781479986705

parallelizing software applications through the use of existing optimized primitives is a common trend that mediates the complexity of manual parallelization and the use of less efficient directive-based programming models. parallel primitive libraries allow software engineers to map any sequential code to a target many-core architecture by identifying the most computational intensive code sections and mapping them into one ore more existing primitives. On the other hand, the spreading of such a primitive-based programming model and the different GPU architectures have led to a large and increasing number of third-party libraries, which often provide different implementations of the same primitive, each one optimized for a specific architecture. From the developer point of view, this moves the actual problem of parallelizing the software application to selecting, among the several implementations, the most efficient primitives for the target platform. This paper presents a profiling framework for GPU primitives, which allows measuring the implementation quality of a given primitive by considering the target architecture characteristics. The framework collects the information provided by a standard GPU profiler and combines them into optimization criteria. The criteria evaluations are weighed to distinguish the impact of each optimization on the overall quality of the primitive implementation. The paper shows how the tuning of the different weights has been conducted through the analysis of five of the most widespread existing primitive libraries and how the framework has been eventually applied to improve the implementation performance of a standard primitive.

关键词： graphics processing units parallel programming GPU GPU profiler directive-based programming models graphics processing unit many-core architecture parallel primitives primitive-based programming model profiling framework software applications parallelization Graphics processing units Instruction sets Kernel Libraries Optimization Synchronization Graphics Processing Unit instruction sets Libraries parallel programming GRAPPER PICK UP core construction Primitive Applications software Kernel Frameworks sequential codes

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A Survey of Approaches used in parallel Architectures and Multi-core Processors, For Performance Improvement

A Survey of Approaches used in Parallel Architectures and Mu...

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23rd International Conference on Systems Engineering

作者： Shukla, Surendra Kumar Murthy, C. N. S. Chande, P. K. CDGI Dept CSE Indore MP India DAVV Univ Sch Comp Sci & IT Indore MP India

ISBN: (纸本)9783319084213

Multi-core architecture is the necessity of today's world. Now Moore's law has gone, speed of processors can not be increase because, we have reached in the limit of physics law. Further increase of speed of single processor is not possible. Energy requirement is the biggest hurdle of the multi-core architecture. There is a need to find out basics of multi-core processors, which will help in increasing the speed of multi-core processor and finding the problems of multi-core processors. We must have to also understand that multi-core concept has came after the parallel processors concepts. There is a possibility, that all the concepts that are used in parallel processors may be used in the multi-core processors. In this paper we will try to find out what are the concepts/techniques which can be used in the multi-core processors, and what are those concepts which can be used as it is in the multi-core processors. After the detailed study, there is a scope of finding the new techniques that can be used in multi-core architecture. In this paper we will compare major techniques, concepts that are different in parallel processors like multi-processors. © Springer International Publishing Switzerland 2015.

关键词： DMA multi-core NUMA parallel programming performance

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