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检索条件"主题词=Parallel programming"

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A Cloud Based Super-Optimization Method to parallelize the Sequential Code's Nested Loops 13

A Cloud Based Super-Optimization Method to Parallelize the S...

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IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSoC)

作者： Majd, Amin Loni, Mohammad Sahebi, Golnaz Daneshtalab, Masoud Troubitsyna, Elena Abo Akad Univ Dept Informat Technol Turku Finland Malardalen Univ Sch Innovat Design & Engn Vasteras Sweden KTH Royal Inst Technol Theoret Comp Sci Dept Stockholm Sweden

ISBN: (纸本)9781728148823

Advances in hardware architecture regarding multi-core processors make parallel computing ubiquitous. To achieve the maximum utilization of multi-core processors, parallel programming techniques are required. However, there are several challenges standing in front of parallel programming. These problems are mainly divided into three major groups. First, although recent advancements in parallel programming languages (e.g. MPI, OpenCL, etc.) assist developers, still parallel programming is not desirable for most programmers. The second one belongs to the massive volume of old software and applications, which have been written in serial mode. However, converting millions of line of serial codes to parallel codes is highly time-consuming and requiring huge verification effort. Third, the production of software and applications in parallel mode is very expensive since it needs knowledge and expertise. Super-optimization provided by super compilers is the process of automatically determine the dependent and independent instructions to find any data dependency and loop-free sequence of instructions. Super compiler then runs these instructions on different processors in the parallel mode, if it is possible. Super-optimization is a feasible solution for helping the programmer to get relaxed from parallel programming workload. Since the most complexity of the sequential codes is in the nested loops, we try to parallelize the nested loops by using the idea of super-optimization. One of the underlying stages in the super-optimization is scheduling tiled space for iterating nested loops. Since the problem is NP-Hard, using the traditional optimization methods are not feasible. In this paper, we propose a cloud-based super-optimization method as Software-as-a-Service (SaaS) to reduce the cost of parallel programming. In addition, it increases the utilization of the processing capacity of the multi-core processor. As the result, an intermediate programmer can use the whole process

关键词： parallel programming Cloud Computing Super Compiler Speedup Diophantine Algorithm

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HPC Education for domain scientists: An Indian experience and perspective 26

HPC Education for domain scientists: An Indian experience an...

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26th International Conference on High Performance Computing, Data and Analytics (HiPCW)

作者： Shenoi, V. Venkatesh Shah, Vaishali Joshi, Sandeep K. HPC Infrastruct & Ecosyst Ctr Dev Adv Comp Pune Maharashtra India Savitribai Phule Pune Univ Interdisciplinary Sch Sci Comp Pune Maharashtra India

ISBN: (纸本)9781728148946

We review the HPC training avenues for masters, Ph.D. students, postdocs and young faculty in Indian universities and research institutes. Their interest in HPC arises from their need to use it for research in their scientific domain having done some background courses in programming with Fortran/C/C++ and numerical methods. Very few Indian educational institutes offer a course/courses in parallel programming and the course is mostly offered in some of the high ranking engineering institutes. Even in the stream of Computer Science, the course if at all offered is an elective course. The non-Computer Science domain users that makeup as the majority of users of HPC in India do not possess sufficient background in Computer Science and gear up as HPC users mostly through self-study or short term training workshops that address their requirements. However, such training programmes are not a regular activity in India and cater to a broad audience with a varied level of aptitude in computing, programming, and simulation via mathematical modelling. In this paper, we discuss the current HPC education scenario and propose an education strategy to broaden the base of HPC users and to help researchers at all levels to effectively use HPC for their academic research and development work.

关键词： High Performance Computing HPC parallel programming scientific computing training course

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Activity Based Approach for Teaching parallel Computing: An Indian Experience 33

Activity Based Approach for Teaching Parallel Computing: An ...

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33rd IEEE International parallel and Distributed Processing Symposium (IPDPS)

作者： Chitra, P. Ghafoor, Sheikh. K. Thiagarajar Coll Engn Dept Comp Sci & Engn Madurai Tamil Nadu India Tennessee Technol Univ Dept Comp Sci Cookeville TN USA

ISBN: (纸本)9781538655559

Due to the rapid growth in the multicore and GPU based computing devices, the need to teach parallel computing in CS/CE curriculum has become almost mandatory nowadays. A course on parallel Computing Systems (PCS) has been designed to provide an understanding of the fundamental principles and engineering trade-offs involved in designing modern parallel computing systems as well as to teach parallel programming techniques necessary to effectively utilize these machines. An activity based learning approach was adopted for teaching the course and several parallel programming paradigms and technologies such OpenMP, MPI, and CUDA have been covered. This course was offered as a required course to graduate students. This paper describes the implementation of the course at Thiagarajar College of Engineering. Evaluation of the implementation of the course reveals that for students who have not been exposed to parallel and distributed computing, i) activity based learning results in better knowledge gain compared to the traditional approach, ii) learning OpenMP was much easier than MPI or CUDA, iii) some parallel and Distributed Computing (PDC) concepts such as false sharing were harder to grasp compared to basic concepts, and iv) it is essential to introduce parallel computing in the undergraduate curriculum.

关键词： parallel processing Graphics processing units Education parallel programming Distributed computing

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Predicting Execution Time of CUDA Kernels with Unified Memory Capability 9

Predicting Execution Time of CUDA Kernels with Unified Memor...

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9th International Conference on Computer and Knowledge Engineering (ICCKE)

作者： Khorshahiyan, Fatemeh Shekofteh, S. Kazem Noori, Hamid Ferdowsi Univ Mashhad Fac Engn Dept Comp Engn Mashhad Razavi Khorasan Iran Shandiz Inst Higher Educ Dept Comp Engn Mashhad Razavi Khorasan Iran

ISBN: (纸本)9781728150758

Nowadays, GPUs are known as one of the most important, most remarkable, and perhaps most popular computing platforms. In recent years, GPUs have increasingly been considered as co-processors and accelerators. Along with growing technology, Graphics Processing Units (GPUs) with more advanced features and capabilities are manufactured and launched by the world's largest commercial companies. Unified memory is one of these new features introduced on the latest generations of Nvidia GPUs which allows programmers to write a program considering the uniform memory shared between CPU and GPU. This feature makes programming considerably easier. The present study introduces this new feature and its attributes. In addition, a model is proposed to predict the execution time of applications if using unified memory style programming based on the information of non-unified style implementation. The proposed model can predict the execution time of a kernel with an average accuracy of 87.60%.

关键词： GPU graphics card unified memory parallel programming CUDA Nvidia

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Integrating parallel Computing in the Curriculum of the University Politehnica of Bucharest 24th

Integrating Parallel Computing in the Curriculum of the Univ...

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International European Conference on parallel and Distributed Computing (Euro-Par)

作者： Carabas, Mihai Draghici, Adriana Lupescu, Grigore Samoila, Cosmin-Gabriel Slusanschi, Emil-Ioan Univ Politehn Bucuresti 313 Splaiul Independentei Bucharest Romania

ISBN: (纸本)9783030105495;9783030105488

The continuous shift of hardware computing architectures, from single to many-core processors, as well as the blurring of the hardware - software interface, has made the introduction of parallel and distributed computing topics in the undergraduate curriculum an essential requirement for any quality computer science program. The University Politehnica of Bucharest offers a unique approach, employing a heterogeneous hardware and software teaching and computing infrastructure, to its over 450 students enrolled in undergraduate studies of Computer Science and Electrical Engineering. In this study we present two of the most important lectures covering PDC topics at the UPB.

关键词： parallel programming Python Performance optimization GPU computing PDC Undergraduate education

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Understanding the Scalability of Molecular Simulation Using Empirical Performance Modeling 6th

Understanding the Scalability of Molecular Simulation Using ...

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7th Workshop on Extreme-Scale programming Tools (ESPT)

作者： Shudler, Sergei Vrabec, Jadran Wolf, Felix Argonne Natl Lab 9700 S Cass Ave Argonne IL 60439 USA Tech Univ Berlin Thermodynam & Proc Engn D-10587 Berlin Germany Tech Univ Darmstadt Lab Parallel Programming D-64289 Darmstadt Germany

ISBN: (纸本)9783030178727;9783030178710

Molecular dynamics (MD) simulation allows for the study of static and dynamic properties of molecular ensembles at various molecular scales, from monatomics to macromolecules such as proteins and nucleic acids. It has applications in biology, materials science, biochemistry, and biophysics. Recent developments in simulation techniques spurred the emergence of the computational molecular engineering (CME) field, which focuses specifically on the needs of industrial users in engineering. Within CME, the simulation code ms2 allows users to calculate thermodynamic properties of bulk fluids. It is a parallel code that aims to scale the temporal range of the simulation while keeping the execution time minimal. In this paper, we use empirical performance modeling to study the impact of simulation parameters on the execution time. Our approach is a systematic workflow that can be used as a blue-print in other fields that aim to scale their simulation codes. We show that the generated models can help users better understand how to scale the simulation with minimal increase in execution time.

关键词： Molecular dynamics Performance modeling parallel programming

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Hardware-Accelerated Energy-Efficient Synchronization and Communication for Ultra-Low-Power Tightly Coupled Clusters 22

Hardware-Accelerated Energy-Efficient Synchronization and Co...

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22nd Design, Automation and Test in Europe Conference and Exhibition (DATE)

作者： Glaser, Florian Haugou, Germain Rossi, Davide Huang, Qiuting Benini, Luca Swiss Fed Inst Technol Integrated Syst Lab Zurich Switzerland Univ Bologna Elect Elect & Informat Engn Bologna Italy

ISBN: (纸本)9783981926323

parallel ultra low power computing is emerging as an enabler to meet the growing performance and energy efficiency demands in deeply embedded systems such as the end-nodes of the internet-of-things (IoT). The parallel nature of these systems however adds a significant degree of complexity as processing elements (PEs) need to communicate in various ways to organize and synchronize execution. Naive implementations of these central and non-trivial mechanisms can quickly jeopardize overall system performance and limit the achievable speedup and energy efficiency. To avoid this bottleneck, we present an event-based solution centered around a technology-independent, light-weight and scalable (up to 16 cores) synchronization and communication unit (SCU) and its integration into a shared-memory multicore cluster. Careful design and tight coupling of the SCU to the data interfaces of the cores allows to execute common synchronization procedures with a single instruction. Furthermore, we present hardware support for the common barrier and lock synchronization primitives with a barrier latency of only eleven cycles, independent of the number of involved cores. We demonstrate the efficiency of the solution based on experiments with a post-layout implementation of the multicore cluster in a 22 nm CMOS process where the SCU constitutes less than 2% of area overhead. Our solution supports parallel sections as small as 100 or 72 cycles with a synchronization overhead of just 10 %, an improvement of up to 14x or 30x with respect to cycle count or energy, respectively, compared to a test-and-set based implementation.

关键词： Synchronization Multicore processing Hardware Clocks Software parallel programming

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ASPEN: An Efficient Algorithm for Data Redistribution Between Producer and Consumer Grids 24th

ASPEN: An Efficient Algorithm for Data Redistribution Betwee...

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International European Conference on parallel and Distributed Computing (Euro-Par)

作者： Foyer, Clement Tate, Adrian McIntosh-Smith, Simon Cray EMEA Res Lab Bristol Avon England Univ Bristol High Performance Comp Res Grp Dept Comp Sci Bristol Avon England

ISBN: (纸本)9783030105495;9783030105488

HPC applications and libraries have frequently moved parallel data from one distribution scheme to another, for reasons of performance. In modern times, a resurgence of interest in this data redistribution problem has emerged due to the need to relocate data distributed across one Producer grid onto a different distribution scheme across a Consumer grid. In this paper, we study the efficient algorithms to perform redistribution, and show how the best methods from the literature are still dependent on the number of processors in both grids. We describe a new algorithm ASPEN that exploits more cyclic patterns and relations in the distribution, is not dependent on the total number of processors and is thus well suited for use in a workflow management systems. We describe a preliminary implementation of the algorithm within such a workflow system and show performance results that indicate a significant performance benefit in data redistribution generation.

关键词： Data distribution Redistribution Data placement Data locality Memory layout Communication pattern parallel programming Distributed memory

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Global Task Data-Dependencies in PGAS Applications 34th

Global Task Data-Dependencies in PGAS Applications

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34th International Conference on High Performance Computing (ISC High Performance)

作者： Schuchart, Joseph Gracia, Jose High Performance Comp Ctr Stuttgart HLRS Nobelstr 19 D-70569 Stuttgart Germany

ISBN: (纸本)9783030206567;9783030206550

Recent years have seen the emergence of two independent programming models challenging the traditional two-tier combination of message passing and thread-level work-sharing: partitioned global address space (PGAS) and task-based concurrency. In the PGAS programming model, synchronization and communication between processes are decoupled, providing significant potential for reducing communication overhead. At the same time, task-based programming allows to exploit a large degree of shared-memory concurrency. The inherent lack of fine-grained synchronization in PGAS can be addressed through fine-grained task synchronization across process boundaries. In this work, we propose the use of task data dependencies describing the data-flow in the global address space to synchronize the execution of tasks created in parallel onmultiple processes. We present a description of the global data dependencies, describe the necessary interactions between the distributed scheduler instances required to handle them, and discuss our implementation in the context of the DASHC++ PGASframework. We evaluate our approach using the Blocked Cholesky Factorization and the LULESH proxy app, demonstrating the feasibility and scalability of our approach.

关键词： parallel programming PGAS Task parallelism RMA

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Peachy parallel Assignments (EduPar 2019) 33

Peachy Parallel Assignments (EduPar 2019)

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33rd IEEE International parallel and Distributed Processing Symposium (IPDPS)

作者： Ozturk, Ozcan Glick, Ben Mache, Jens Bunde, David P. Bilkent Univ Ankara Turkey Lewis & Clark Coll Portland OR 97219 USA Knox Coll Galesburg IL USA

ISBN: (纸本)9781538655559

Peachy parallel Assignments are a resource for instructors teaching parallel and distributed programming. These are high-quality assignments, previously tested in class, that are readily adoptable. This collection of assignments includes face recognition, finding the electrical potential of a square wire, and heat diffusion. All of these come with sample assignment sheets and the necessary starter code.

关键词： parallel computing education High-Performance Computing education parallel programming OpenMP Java Executor framework Local binary patterns Poisson's equation Numerical differential equations

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