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International Conference on parallel Architectures and Compilation (PACT)

作者： Sun, Jiawen Queens Univ Belfast Univ Rd Belfast BT7 1LR Antrim North Ireland

ISBN: (纸本)9781450341219

Graph analytics is an important and computationally demanding class of data analytics. It is essential to balance scalability, ease-of-use and high performance in large scale graph analytics. As such, it is necessary to hide the complexity of parallelism, data distribution and memory locality behind an abstract interface. The aim of this work is to build a scalable graph analytics framework that does not demand significant parallel programming experience based on NUMA-awareness. The realization of such a system faces two key problems: (i)~how to develop a scale-free parallel programming framework that scales efficiently across NUMA domains; (ii)~how to efficiently apply graph partitioning in order to create separate vand largely independent work items that can be distributed among threads.

关键词： graph analytics parallel programming model general purpose

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HPAC-ML: A programming model for Embedding ML Surrogates in Scientific Applications 24

HPAC-ML: A Programming Model for Embedding ML Surrogates in ...

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2024 International Conference for High Performance Computing, Networking, Storage and Analysis

作者： Fink, Zane Parasyris, Konstantinos Rathi, Praneet Georgakoudis, Giorgis Menon, Harshitha Bremer, Peer-Timo Univ Illinois Urbana IL 61801 USA Lawrence Livermore Natl Lab Livermore CA 94550 USA

ISBN: (数字)9798350352917

ISBN: (纸本)9798350352924;9798350352917

Recent advancements in Machine Learning (ML) have substantially improved its predictive and computational abilities, offering promising opportunities for surrogate modeling in scientific applications. By accurately approximating complex functions with low computational cost, ML-based surrogates can accelerate scientific applications by replacing computationally intensive components with faster model inference. However, integrating ML models into these applications remains a significant challenge, hindering the widespread adoption of ML surrogates as an approximation technique in modern scientific computing. We propose an easy-to-use directive-based programming model that enables developers to seamlessly describe the use of ML models in scientific applications. The runtime support, as instructed by the programming model, performs data assimilation using the original algorithm and can replace the algorithm with model inference. Our evaluation across five benchmarks, testing over 5000 ML models, shows up to 83.6x speed improvements with minimal accuracy loss (as low as 0.01 RMSE).

关键词： High Performance Computing parallel programming model Scientific Machine Learning Approximate Computing Neural Networks

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DFScala: High Level Dataflow Support for Scala

DFScala: High Level Dataflow Support for Scala

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2nd International Workshop on Data-Flow Execution models (DFM) for Extreme Scale Computing

作者： Goodman, Daniel Khan, Salman Seaton, Chris Guskov, Yegor Khan, Behram Lujan, Mikel Watson, Ian Univ Manchester Manchester Lancs England

ISBN: (纸本)9780769549545

In this paper we present DFScala, a library for constructing and executing dataflow graphs in the Scala language. Through the use of Scala this library allows the programmer to construct coarse grained dataflow graphs that take advantage of functional semantics for the dataflow graph and both functional and imperative semantics within the dataflow nodes. This combination allows for very clean code which exhibits the properties of dataflow programs, but we believe is more accessible to imperative programmers. We first describe DFScala in detail, before using a number of benchmarks to evaluate both its scalability and its absolute performance relative to existing codes. DFScala has been constructed as part of the Teraflux project and is being used extensively as a basis for further research into dataflow programming.

关键词： Dataflow Scala Coarse Grained parallel programming model

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Efficiently Speeding up Sequential Computation through the N-Way programming model 11

Efficiently Speeding up Sequential Computation through the N...

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2011 ACM International Conference on Object Oriented programming Systems Languages and Applications

作者： Cledat, Romain Kumar, Tushar Pande, Santosh Georgia Inst Technol Atlanta GA 30332 USA

ISBN: (纸本)9781450309400

With core counts on the rise, the sequential components of applications are becoming the major bottleneck in performance scaling as predicted by Amdahl's law. We are therefore faced with the simultaneous problems of occupying an increasing number of cores and speeding up sequential sections. In this work, we reconcile these two seemingly incompatible problems with a novel programming model called N-way. The core idea behind N-way is to benefit from the algorithmic diversity available to express certain key computational steps. By simultaneously launching in parallel multiple ways to solve a given computation, a runtime can just-in-time pick the best (for example the fastest) way and therefore achieve speedup. Previous work has demonstrated the benefits of such an approach but has not addressed its inherent waste. In this work, we focus on providing a mathematically sound learning-based statistical model that can be used by a runtime to determine the optimal balance between resources used and benefits obtainable through N-way. We further describe a dynamic culling mechanism to further reduce resource waste. We present abstractions and a runtime support to cleanly encapsulate the computational-options and monitor their progress. We demonstrate a low-overhead runtime that achieves significant speedup over a range of widely used kernels. Our results demonstrate super-linear speedups in certain cases.

关键词： Algorithms Performance parallel programming model N-Way algorithmic diversity speedup sequential computations

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Towards An Event-Driven programming model for OpenMP 45

Towards An Event-Driven Programming Model for OpenMP

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45th International Conference on parallel Processing (ICPP)

作者： Fan, Xing Sinnen, Oliver Giacaman, Nasser Univ Auckland Dept Elect & Comp Engn Auckland 1 New Zealand

ISBN: (纸本)9781509028252

The event-driven programming pattern is pervasive in a wide range of modern software applications. Unfortunately, it is not easy to achieve good performance and responsiveness when developing event-driven applications. Traditional approaches require a great amount of programmer effort to restructure and refactor code, to achieve the performance speedup from parallelism and asynchronization. Not only does this restructuring require a lot of development time, it also makes the code harder to debug and understand. We propose an asynchronous programming model based on the philosophy of OpenMP, which does not require code restructuring of the original sequential code. This asynchronous programming model is complementary to the existing OpenMP fork-join model. The coexistence of the two models has potential to decrease developing time for parallel event-driven programs, since it avoids major code refactoring. In addition to its programming simplicity, evaluations show that this approach achieves good performance improvements consistent with more traditional event-driven parallelization.

关键词： OpenMP parallel programming model event-driven programming asynchronous programming

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Paralelní verze obecné syntaktické analýzy

Paralelní verze obecné syntaktické analýzy

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作者： Mikita, Tibor Brno University of Technology

Tato bakalářská práce se zabývá obecními metodami syntaktické analýzy. Autor studuje Cocke-Younger-Kasami algoritmus a přichází s návrhem paralelní verze. Mo... 详细信息

Tato bakalářská práce se zabývá obecními metodami syntaktické analýzy. Autor studuje Cocke-Younger-Kasami algoritmus a přichází s návrhem paralelní verze. Motivací autora je zrychlení syntaktické analýzy založené na tomto algoritmu. Výsledkem práce je konzolová aplikace, která dokáže zjistit, zda vstupní řetězec patří do jazyka generovaného vstupní gramatikou, nebo nepatří, na základě navrženého paralelního algoritmu. Jako programovací jazyk byl zvolen jazyk C++. Pro dosažení paralelismu byla práce algoritmu rozdělena mezi několik vláken.

关键词： překladač formální jazyky syntaktická analýza obecné metody CYK algoritmus paralelní programování C++ compiler formal languages parsing general methods CYK algorithm parallel programming model C++ Text

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ASSESSMENT OF TWO TASK FRAMEWORKS WITH DEPENDENCIES FOR MATRIX FACTORIZATIONS ON A MULTICORE ARCHITECTURE

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COMPUTING AND INFORMATICS 2019年第1期38卷 197-222页

作者： Bylina, Jaroslaw Marie Curie Sklodowska Univ Inst Math Pl M Curie Sklodowskiej 5 PL-20031 Lublin Poland

In this study, we evaluate two task frameworks with dependencies for important application kernels coming from the numerical linear algebra. In this approach, the algorithms of the matrix factorization are considered, namely the tiled LU and the WZ factorizations both without pivoting. In tiled algorithms, the operations are represented as a sequence of small tasks which operate on square blocks (tiles) of the data. The dependencies among tasks are expressed as a direct acyclic graph and the runtime system runs the graph on a multicore architecture. The performance of applications based on the task dependencies is related to efficient compilers and the runtime systems. We report the performance and the scalability of two task frameworks with dependencies on the multicore architecture for the matrix factorizations. Namely, we compare OpenMP and Intel Thread Building Blocks. Our results show that the number of tiles in both factorizations always have an impact on the performance and the speedup. Both the frameworks show their suitability for efficient parallelization of such applications, although both have their own merits and flaws.

关键词： Task parallelism task dependencies parallel programming model runtime system OpenMP Intel TBB

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HIPLZ: Enabling performance portability for exascale systems

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2023年第25期35卷

作者： Zhao, Jisheng Bertoni, Colleen Young, Jeffrey Harms, Kevin Sarkar, Vivek Videau, Brice Georgia Inst Technol Comp Sch Atlanta GA 30332 USA Argonne Natl Lab Lemont IL USA

While heterogeneous computing has emerged as a dominant trend in current and future High-Performance Computing (HPC) systems, it is also widely recognized that this shift has led to increased software complexity due to a proliferation of programming systems for different heterogeneous processors. One such example is the Heterogeneous-Compute Interface for Portability from AMD (HIP ), which is composed of a C Runtime API and C++ Kernel Language. Many HPC applications will likely use HIP on future exascale systems (e.g., Frontier and El Capitan), but HIP currently only targets AMD and NVIDIA processors. This limitation creates challenges for users who would also like to run their applications on exascale systems based on other architectures (e.g., Aurora, which is based on Intel hardware) that are currently not targeted by HIP . In this paper, we introduce the design and implementation of HIPLZ , a compiler and runtime system that uses the Intel Level Zero API to support HIP on Intel GPU architectures. We discuss the design of HIPLZ , derived from HIPCL (an implementation of HIP on top of OpenCL ), and portability issues that occur from using the Level Zero runtime as a backend. We evaluate our implementation by running several performance benchmarks and mini-apps written in HIP on Intel architectures using HIPLZ . Our results show that this approach provides competitive performance relative to Intel's OpenCL implementations on Intel Gen9 and UHD Graphics 770 GPUs, while providing good coverage of features needed by HPC applications. Overall, this approach is a promising demonstration of enabling performance portability for exascale systems.

关键词： HIP HPC parallel programming model runtime

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Efficient Compilation of CUDA Kernels for High-Performance Computing on FPGAs

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ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 2013年第2期13卷 25-25页

作者： Papakonstantinou, Alexandros Gururaj, Karthik Stratton, John A. Chen, Deming Cong, Jason Hwu, Wen-Mei W. Univ Illinois Elect & Comp Engn Dept Urbana IL 60680 USA Univ Calif Los Angeles Dept Comp Sci Los Angeles CA 90024 USA

The rise of multicore architectures across all computing domains has opened the door to heterogeneous multiprocessors, where processors of different compute characteristics can be combined to effectively boost the performance per watt of different application kernels. GPUs, in particular, are becoming very popular for speeding up compute-intensive kernels of scientific, imaging, and simulation applications. New programming models that facilitate parallel processing on heterogeneous systems containing GPUs are spreading rapidly in the computing community. By leveraging these investments, the developers of other accelerators have an opportunity to significantly reduce the programming effort by supporting those accelerator models already gaining popularity. In this work, we adapt one such language, the CUDA programming model, into a new FPGA design flow called FCUDA, which efficiently maps the coarse-and fine-grained parallelism exposed in CUDA onto the reconfigurable fabric. Our CUDA-to-FPGA flow employs AutoPilot, an advanced high-level synthesis tool (available from Xilinx) which enables high-abstraction FPGA programming. FCUDA is based on a source-to-source compilation that transforms the SIMT (Single Instruction, Multiple Thread) CUDA code into task-level parallel C code for AutoPilot. We describe the details of our CUDA-to-FPGA flow and demonstrate the highly competitive performance of the resulting customized FPGA multicore accelerators. To the best of our knowledge, this is the first CUDA-to-FPGA flow to demonstrate the applicability and potential advantage of using the CUDA programming model for high-performance computing in FPGAs.

关键词： Design Performance FPGA high-level synthesis parallel programming model high-performance computing source-to-source compiler heterogeneous compute systems

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A model OF SPECULATIVE parallelISM

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parallel Processing Letters 1992年第2N03期2卷 265-272页

作者： W. F. WONG C. K. YUEN Department of Information Systems and Computer Science National University of Singapore Lower Kent Ridge Road Singapore 0511 Republic of Singapore Author's current address: Goto Laboratory The Institute of Physical and Chemical Research 2-1 Hirosawa Wako-shi Saitama 351-01 Japan.

Speculative parallelism is the parallelism that one finds when parallel tasks are spawned in the hope that they will later be of use. While this aggressive form of parallelism promises high levels of parallelism, there are numerous problems involved. In this letter, we propose a model of handling speculative parallelism in Lisp. Some properties of the model, related issues in parallelism and implementation considerations are also discussed. The model described is already incorporated into BaLinda Lisp and the techniques used in its simulation were first used in writing the prototype interpreter on an IBM PC.

关键词： Speculative parallelism parallel programming model

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