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A security-aware hardware scheduler for modern multi-core systems with hard real-time constraints

MICROPROCESSORS AND MICROSYSTEMS 2022年 95卷

作者： Norollah, Amin Beitollahi, Hakem Kazemi, Zahra Fazeli, Mahdi IUST Comp Engn Dept Tehran Iran Halmstad Univ Halmstad Sweden Grenoble INP LCIS Lab Grenoble France

In this paper, we propose an online security-aware hardware scheduler, the so-called Secure And Fast hardware Scheduler (SAFAS), for real-time task scheduling in multi-core systems in the presence of schedule-based side -channel attacks. To avoid such attacks and ensure that all tasks meet their deadlines, SAFAS schedules critical tasks and their replicas using a hardware-based strict Least Slack Time first (LST) algorithm independently while it independently schedules the non-critical tasks using a hardware-based EDF algorithm. SAFAS enhances the system performance and reduces the chance of side-channel attacks due to the different processing cores allocated to each task in each scheduling interval. The hardware scheduler operates independently and in parallel with the multi-core system and hides the scheduling characteristics from adversaries. The software -based Earliest Deadline First (EDF) algorithm is also used for schedulability tests and feasibility analysis of hard real-time periodic tasks to maximize the number of tasks scheduled successfully in the multi-core system. SAFAS has been synthesized and simulated on a Xilinx Vivado 2018.2 and implemented on a Spartan-7 FPGA chip. Our experimental results indicate that SAFAS increases the performance of the system by 4.8 times as compared to previous state-of-the-art hardware schedulers while guaranteeing that all critical tasks and their replicas meet their deadlines.

关键词： Hardware accelerator sorting network Hardware sorter parallel sorting High performance Resource Efficient FPGA

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Index Key Compression and On-the-Fly Reconstruction of In-Memory Indexes

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JOURNAL OF DATABASE MANAGEMENT 2022年第1期33卷

作者： Kwon, Yongsik Ryu, Cheol Cha, Sang Kyun Lee, Arthur H. Park, Kunsoo Moon, Bongki Seoul Natl Univ Seoul South Korea Seoul Natl Univ Grad Sch Data Sci Seoul South Korea SNU Big Data Inst Seoul South Korea State Univ New York Korea Comp Sci Incheon South Korea Seoul Natl Univ Dept Comp Sci & Engn Seoul South Korea Seoul Natl Univ Comp Sci & Engn Seoul South Korea

This article proposes an index key compression scheme based on the notion of distinction bits. It proves that the distinction bits of index keys are sufficient information to determine the sorted order of the index keys. The actual compression ratio may vary depending on the characteristics of datasets (an average of 2.76:1 compression ratio was observed in the authors' experiments). However, the index key compression scheme leads to significant performance improvements during the reconstruction of large-scale indexes. This study's index key compression can be effectively used for database replication and index recovery in modern main-memory database systems.

关键词： Compressed Key Sort Distinction Bit Index Reconstruction parallel sorting

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Routing by matching on convex pieces of grid graphs

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COMPUTATIONAL GEOMETRY-THEORY AND APPLICATIONS 2022年 104卷

作者： Alpert, H. Barnes, R. Bell, S. Mauro, A. Nevo, N. Tucker, N. Yang, H. Auburn Univ 221 Parker Hall Auburn AL 36849 USA Harvey Mudd Coll 320 East Foothill Blvd Claremont CA 91711 USA Willamette Univ 900 State St Salem OR 97301 USA Stanford Univ Bldg 380 Stanford CA 94305 USA Colorado Coll 14 E Cache La Poudre St Colorado Springs CO 80903 USA Juniata Coll 1700 Moore St Huntingdon PA 16652 USA MIT 77 Massachusetts Ave Cambridge MA 02139 USA

The routing number is a graph invariant introduced by Alon, Chung, and Graham in 1994, and it has been studied for trees and other classes of graphs such as hypercubes. It gives the minimum number of routing steps needed to sort a set of distinct tokens, placed one on each vertex, where each routing step swaps a set of disjoint pairs of adjacent tokens. Our main theorem generalizes the known estimate that a rectangular grid graph R with width w(R) and height h(R) satisfies rt(R) is an element of O (w(R) + h(R)). We show that for the subgraph P of the infinite square lattice enclosed by any convex polygon, we have rt(P) is an element of O (w(P) + h(P)). (c) 2022 The Author(s). Published by Elsevier B.V.

关键词： Routing number Makespan Motion planning Token graph parallel sorting

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CPP11sort: A parallel quicksort based on C plus plus threading

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2022年第4期34卷

作者： Langr, Daniel Schovankova, Klara Czech Tech Univ Fac Informat Technol Thakurova 9 Prague 16000 Czech Republic

A new efficient implementation of the multithreaded quicksort algorithm called CPP11sort is presented. This implementation is built exclusively upon the threading primitives of the C++ programming language itself. The performance of CPP11sort is evaluated and compared with its mainstream competitors provided by GNU, Intel, and Microsoft. It is shown that out of the considered implementations, CPP11sort mostly yields the shortest sorting times and is the only one that is portable to any conforming C++ implementation without a need of external libraries or nonstandard compiler extensions. The experimental evaluation with various input data distributions resulted in parallel speedup between 16.1 and 44.2 on a 56-core server and between 6.8 and 14.5 on a 10-core workstation with enabled hyperthreading.

关键词： C plus plus in-place sorting multithreading parallel algorithm parallel sorting quicksort shared memory

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New GPU sorting Algorithm Using Sorted Matrix

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Procedia Computer Science 2023年 218卷 1682-1691页

作者： Sumit Kumar Gupta Dr. Dhirendra Pratap Singh Dr. Jaytrilok Choudhary

The sorting of elements is vital in various real-life applications such as CPU scheduling in operating systems, recommendation systems based on search time, Television channels sorted based on view time, etc. But it becomes complex and time-consuming if the number of elements becomes larger. For this problem, multiple solutions have been proposed in the past; among them, one efficient solution uses the concept of finding the kth element in a column and row-wise sorted matrix. If a sorted matrix is used to represent a list's items, it can be used to determine any element's position in the sorted list. In this paper, a Graphics Processing Unit (GPU) based parallel method has been proposed to sort a list using the concept of the sorted matrix. A mathematical proof of the proposed method and its implementation for the GPU-based machine is also presented. Experimental results of the proposed algorithm are compared with the CUDA Thrust Library Radix sorting implementation. The proposed algorithm has achieved a five-fold speed increase compared to the CUDA Thrust library sorting performance.

关键词： parallel sorting GPU sorting Matrix Application Sorted Matrix

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sorting Data Elements by SOCD Using Centralized Diamond Architecture

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Computer Technology and Application 2011年第5期2卷 374-377页

作者： Masumeh Damrudi Kamal Jadidy Aval Computer Science Department Islamic Azad University Firoozkooh branch *** Iran

Several parallel sorting techniques on different architectures have been studied for many years. Due to the need for faster systems in today＇s world, parallelism can be used to accelerate applications. Nowadays, parallel operations are used to solve computer problems such as sort and search, which result in a reasonable speed. sorting is one of the most important operations in computing world. The authors always try to find the best in different areas which the premier is speedup. In this paper, the authors issued a sort with O（logn） time complexity on PRAM EREW （parallel Random Access Machine Exclusive Read Exclusive Write）. The algorithm is designed in a manner that keeps the tradeoff between the number of processor elements in the architecture and execution time. The simulation of the algorithm proves the theoretical analysis of the algorithm. The results of this research can be utilized in developing faster embedded systems. sorting on Centralized Diamond （SOCD） algorithm is issued on the novel Centralized Diamond architecture which takes the advantages of Single Instruction Multiple Data （SIMD） architecture. This architecture and the sort on it are intuitive and optimal.

关键词： parallel sorting diamond architecture single instruction multiple data (SIMD) parallel random access machine exclusive read exclusive write (PRAM EREW) sorting on centralized diamond (SOCD).

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AQSORT: SCALABLE MULTI-ARRAY IN-PLACE sorting WITH OPENMP

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SCALABLE COMPUTING-PRACTICE AND EXPERIENCE 2016年第4期17卷 369-391页

作者： Langr, Daniel Tvrdik, Pavel Simecek, Ivan Czech Tech Univ Fac Informat Technol Dept Comp Syst Thakurova 9 Prague 16000 Czech Republic

A new multi-threaded variant of the quicksort algorithm called AQsort and its C++/OpenMP implementation are presented. AQsort operates in place and was primarily designed for high-performance computing (HPC) runtime environments. It can work with multiple arrays at once;such a functionality is frequently required in HPC and cannot be accomplished with standard C pointer-based or C++ iterator-based approach. An extensive study is provided that evaluates AQsort experimentally and compares its performance with modern multi-threaded implementations of in-place and out-of-place sorting algorithms based on OpenMP, Cilk Plus, and Intel TBB. The measurements were conducted on several leading-edge HPC architectures, namely Cray XE6 nodes with AMD Bulldozer CPUs, Cray XC40 nodes with Intel Hasswell CPUs, IBM BlueGene/Q nodes, and Intel Xeon Phi coprocessors. The obtained results show that AQsort provides good scalability and sorting performance generally comparable to its competitors. In particular cases, the performance of AQsort may be slightly lower, which is the price for its universality and ability to work with substantially larger amounts of data.

关键词： C++ high performance computing in-place sorting many-core multi-array sorting multi-core multi-threaded algorithm OpenMP parallel partitioning parallel sorting

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AN EFFICIENT sorting ALGORITHM WITH CUDA

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JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS 2009年第7期32卷 915-921页

作者： Chen, Shifu Qin, Jing Xie, Yongming Zhao, Junping Heng, Pheng-Ann Chinese Univ Hong Kong Chinese Acad Sci Shenzhen Inst Adv Integrat Technol Hong Kong Hong Kong Peoples R China Chinese Univ Hong Kong Dept Comp Sci & Engn Hong Kong Hong Kong Peoples R China Chinese PLA Gen Hosp & Postgrad Med Sch Inst Med Informat Beijing Peoples R China

An efficient GPU-based sorting algorithm is proposed in this paper together with a merging method on graphics devices. The proposed sorting algorithm is optimized for modern GPU architecture with the capability of sorting elements represented by integers, floats and structures, while the new merging method gives a way to merge two ordered lists efficiently on GPU without using the slow atomic functions and uncoalesced memory read. Adaptive strategies are used for sorting disorderly or nearly-sorted lists, large or small lists. The current implementation is on NVIDIA CUDA with multi-GPUs support, and is being migrated to the new born Open Computing Language (OpenCL). Extensive experiments demonstrate that our algorithm has better performance than previous GPU-based sorting algorithms and can support real-time applications.

关键词： parallel sorting parallel merging CUDA

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Fast Radix Sort for Sparse Linear Algebra on GPU 14

Fast Radix Sort for Sparse Linear Algebra on GPU

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Simulation Multi-Conference

作者： Lukas Polok Viorela Ila Pavel Smrz Brno University of Technology Bozetechova Czech Republic

ISBN: (纸本)9781632662163

Fast sorting is an important step in many parallel algorithms, which require data ranking, ordering or partitioning. parallel sorting is a widely researched subject, and many algorithms were developed in the past. In this paper, the focus is on implementing highly efficient sorting routines for the sparse linear algebra operations, such as parallel sparse matrix - matrix multiplication, or factorization. We propose a fast and simple to implement variant of parallel radix sort algorithm, suitable for GPU architecture. Extensive testing on both synthetic and real-world data shows, that our method outperforms other similar state-of-the-art implementations. Our implementation is bandwidth-efficient, as it achieves sorting rates comparable to the theoretical upper bound of memory bandwidth. We also present several interesting code optimizations relevant to GPU programming.

关键词： parallel sorting Radix sort Sparse matrix Matrix-matrix multiplication

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A Case for the Optimization of Database Workflow Orchestration in Heterogenous Environments

A Case for the Optimization of Database Workflow Orchestrati...

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The Ninth International Conference on Grid and Cloud Computing(第九届网格与云计算国际学术会议 GCC 2010)

作者： Werner Mach Erich Schikuta University of Vienna Department of Knowledge and Business Engineering Research Lab for Computational Technology and Applications Rathausstraβe 19/9 A-1010 Vienna Austria

We present a novel optimization approach for the orchestration of the execution of database workflows in heterogeneous infrastructures, hereby specifically focusing on sorting algorithms. We give a case for the validity of our approach by developing a generic template for a family of optimization algorithms. We develop a model for the mathematical analysis of parallel sort algorithms and design a graph based algorithm for finding optimal complete binary work flow execution trees in networks aiming for maximum performance of the parallel Merge Sort. We justify our approach by an exhaustive simulation analysis, which leads to a refinement and optimization of the workflow orchestration process.

关键词： Heterogeneous environment distributed and parallel database systems parallel sorting workflow orchestration

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