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Compiler support for array distribution on NUMA shared memory multiprocessors

JOURNAL OF SUPERCOMPUTING 1998年第4期12卷 349-371页

作者： Abdelrahman, TS Wong, TN Univ Toronto Dept Elect & Comp Engn Toronto ON M5S 1A4 Canada

Management of program data to improve data locality and reduce false sharing is critical for scaling performance on NUMA shared memory multiprocessors. We use HPF-like data decomposition directives to partition and place arrays in data-parallel applications on Hector, a shared-memory NUMA multiprocessor. We describe a compiler system for automating the partitioning and placement of arrays. The compiler exploits Hector's shared memory architecture to efficiently implement distributed arrays. Experimental results from a prototype implementation demonstrate the effectiveness of these techniques. They also demonstrate the magnitude of the performance improvement attainable when our compiler-based data management schemes are used instead of operating system data management policies;performance improves by up to a factor of 5.

关键词： data distribution locality management cache management parallelizing compilers NUMA multiprocessors

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PARTITIONING AND MAPPING OF NESTED LOOPS FOR LINEAR-ARRAY MULTICOMPUTERS

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JOURNAL OF SUPERCOMPUTING 1995年第1-2期9卷 183-202页

作者： SHEU, JP CHEN, TS Department of Computer Science and Information Engineering National Central University Chung-Li Taiwan R.O.C.

In distributed-memory multicomputers, minimizing interprocessor communication is the key to the efficient execution of parallel programs. In order to reduce the amount of communication overhead, parallel programs on multicomputers must be carefully scheduled by parallelizing compilers. This paper proposes some compilation techniques for partitioning and mapping nested loops with constant data dependences onto linear array multicomputers. First, a systematic partition strategy is proposed to project an n-dimensional computational structure, representing an n-nested loop, onto a line to form a one-dimensional projected structure with low communication overhead. Then, a mapping algorithm is proposed for mapping the partitioned loops onto linear arrays in a way that balances the workload and minimizes the communication cost among processors. Finally, parallel execution codes can be automatically generated for such linear array multicomputers.

关键词： DATA DEPENDENCE VECTORS DISTRIBUTED-MEMORY MULTICOMPUTERS INTERPROCESSOR COMMUNICATION LINEAR ARRAY MULTICOMPUTERS parallelizing compilers

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NaraView: An interactive 3D visualization system for parallelization of programs

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INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 1999年第2期27卷 111-129页

作者： Sasakura, M Joe, K Kunieda, Y Araki, K Okayama Univ Fac Engn Dept Informat Technol Okayama 7008530 Japan Wakayama Univ Fac Syst Engn Wakayama 6408510 Japan Kyushu Univ Grad Sch Informat Sci & Elect Engn Dept Comp Sci & Commun Engn Kasuga Fukuoka 8168580 Japan

For effective use of parallelizing compilers, an interactive environment which allows users to find more parallelism is needed. As the first step towards building such an environment, we have developed a program visualization system named NaraView. In this paper, we describe two visualization methods in NaraView. One is Program Structure View which illustrates the hierarchical loop structure of a given program and suggests which parts of the program can be parallelized. Another is the Data Dependence View which visualizes each data dependence on every variable or array element which is accessed in a specific loop. By using these views, users can easily understand which part of the program can be parallelized further. We also show several examples to demonstrate the efficiency of these methods.

关键词： program visualization system parallelizing compilers program structure data dependence

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EXPLOITING PARALLELISM ON A FINE-GRAINED MIMD ARCHITECTURE BASED UPON CHANNEL QUEUES

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INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 1992年第3期21卷 169-192页

作者： GUPTA, R LEE, S UNIV PITTSBURGH DEPT COMP SCIPITTSBURGHPA 15260

We present techniques for exploiting fine-grained parallelism extracted from sequential programs on a fine-grained MIMD system. The system exploits fine-grained parallelism through parallel execution of instructions on multiple processors as well as pipelined nature of individual processors. The processors can communicate data values via globally shared registers as well as dedicated channel queues. Compilation techniques are presented to utilize these mechanisms. A scheduling algorithm has been developed to distribute operations among the processors in a manner that reduces communication among the processors. The compiler identifies data dependencies which require synchronization and enforces them using channel queues. Delays that may result by attempting write operations to a full channel queue are avoided by spilling values from channels to local registers. If an interprocessor data dependency does not require synchronization, then the data value is passed through a shared register or shared memory.

关键词： MULTIPROCESSOR SYSTEMS parallelizing compilers FINE-GRAINED PARALLELISM TOP-DOWN SCHEDULING REDUNDANT SYNCHRONIZATION CHANNEL QUEUES

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Compiler-optimized simulation of large-scale applications on high performance architectures

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JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING 2002年第3期62卷 393-426页

作者： Adve, VS Bagrodia, R Deelman, E Sakellariou, R Univ Illinois Urbana IL 61801 USA Univ Calif Los Angeles Los Angeles CA 90024 USA Univ So Calif Inst Informat Sci Marina Del Rey CA 90292 USA Univ Manchester Manchester M13 9PL Lancs England

In this paper, we propose and evaluate practical, automatic techniques that exploit compiler analysis to facilitate simulation of very large message-passing systems. We use compiler techniques and a compiler-synthesized static task graph model to identify the subset of the computations whose values have no significant effect on the performance of the program, and to generate symbolic estimates of the execution times of these computations. For programs with regular computation and communication patterns, this information allows us to avoid executing or simulating large portions of the computational code during the simulation. It also allows us to avoid performing some of the message data transfers, while still simulating the message performance in detail. We have used these techniques to integrate the MPI-Sim parallel simulator at UCLA with the Rice dHPF compiler infrastructure. We evaluate the accuracy and benefits of these techniques for three standard message-passing benchmarks on a wide range of problem and system sizes. The optimized simulator has errors of less than 16% compared with direct program measurement in all the cases we studied, and typically much smaller errors. Furthermore, it requires factors of 5 to 2000 less memory and up to a factor of 10 less time to execute than the original simulator. These dramatic savings allow us to simulate regular message-passing programs on systems and problem sizes 10 to 100 times larger than is possible with the original simulator, or other current state-of-the-art simulators. (C) 2002 Elsevier Science (USA).

关键词： parallel simulation performance modeling parallelizing compilers

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An efficient solution to the cache thrashing problem caused by true data sharing

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IEEE TRANSACTIONS ON COMPUTERS 1998年第5期47卷 527-543页

作者： Jin, GH Li, ZY Chen, FJ Rice Univ Dept Comp Sci Houston TX 77005 USA Purdue Univ Dept Comp Sci W Lafayette IN 47907 USA Changsha Inst Technol Dept Comp Sci Changsha 410073 Hunan Peoples R China

When parallel programs ate executed on multiprocessors with private caches, a set of data may be repeatedly used and modified by different threads. Such data sharing can often result in cache thrashing, which degrades memory performance. This paper presents and evaluates a loop restructuring method to reduce or even eliminate cache thrashing caused by true data sharing in nested parallel loops. This method uses a compiler analysis which applies linear algebra and the theory of numbers to the subscript expressions of array references. Due to this method's simplicity. it can be efficiently implemented in any parallel compiler. Experimental results show quite significant performance improvements over existing static and dynamic scheduling methods.

关键词： multiprocessors cache thrashing true data sharing parallel threads loop transformations parallelizing compilers

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A program auto-parallelizer based on the component technology of optimizing compiler construction

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PROGRAMMING AND COMPUTER SOFTWARE 2009年第6期35卷 321-339页

作者： Drozdov, A. Yu. Novikov, S. V. Russian Acad Sci Lebedev Inst Precise Mech & Comp Engn Moscow 119991 Russia

This paper describes a program auto-parallelizer that is based on the component approach to constructing optimizing compilers;the parallelizer is included in the technological chain of gcc. Details of using analytical and optimization components for constructing an auto-parallelizer and a parallelization algorithm using the OpenMP library are considered. Finally, we discuss the results of operation of the auto-parallelizer in terms of performance on a subset of problems in the Spec2006 and NAS parallel benchmarks packages.

关键词： PARALLEL programs (Computer programs) OPTIMIZING compilers PARALLEL algorithms parallelizing compilers COMPUTER software

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Airshed pollution modeling in an HPF style environment

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JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING 2000年第6期60卷 690-715页

作者： Subhlok, J Steenkiste, P Univ Houston Dept Comp Sci Houston TX 77204 USA Carnegie Mellon Univ Sch Comp Sci Pittsburgh PA 15213 USA

In this paper, we describe our experience with developing Airshed, a large pollution modeling application, in the Fx programming environment, We demonstrate that high level parallel programming languages like Fs and High Performance Fortran offer a simple and attractive model for developing portable and efficient parallel applications. Performance results are presented for the Airshed application executing on Intel Paragon and Clay T3D and T3E parallel computers. The results demonstrate that the application is "performance portable." i.e.. it achieves good and consistent performance across different architectures, and that the performance can be explained and predicted using a simple model for the communication and computation phases in the program. We also show how task parallelism was used to alleviate I O related bottlenecks. an important consideration in many applications. Finally, we demonstrate how external parallel modules developed using different parallelization methods can be integrated in a relatively simple and flexible way with modules developed in the Fx compiler framework. Overall, our experience demonstrates that a high level parallel programming environment based on a language like HPF is suitable for developing complex multidisciplinary applications. (C) 2000 Academic Press.

关键词： parallel programming parallelizing compilers High Performance Fortran task parallelism pollution modeling Airshed module integration multidisciplinary applications

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parallelizing graph construction operations in programs with cyclic graphs

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PARALLEL COMPUTING 2002年第9期28卷 1307-1328页

作者： Hwang, YS Natl Taiwan Ocean Univ Dept Comp Sci Chilung 20224 Taiwan

Pointer analysis has been an active research field in recent years. Combining pointer analysis and dependence analysis can identify parallelism in programs with pointers or graphs, which are in turn represented by dynamic pointer-linked data structures. After parallelism is identified, programs can be parallelized and then executed on parallel multiprocessor systems to achieve high performance. The compiler analysis techniques that have been proposed so far can only recognize parallelism in the traversal references of programs with cyclic graphs by analyzing the traversal patterns on graphs. Consequently, only the graph traversal operations will be parallelized while the graph construction operations will be left to be executed in sequential. Although this approach can usually parallelize the most time-consuming part of these programs (the graph traversal operations account for over 90% of total execution times in most programs), the rest of programs that accounts for less than 10% will dominate the execution on multiprocessor systems according to Amdahl's law. This paper presents a technique that can identify parallelism in the construction operations of programs even with cyclic graphs. This technique is designed to facilitate automatic parallelization of scientific computational applications that construct cyclic graphs to represent adjacent lists, which in turn describe the interactions of simulated objects. Experimental results show this approach can parallelize the construction phase of such programs and achieve good speedup on multiprocessor systems. (C) 2002 Elsevier Science B.V. All rights reserved.

关键词： parallelizing compilers recursive data structures cyclic graphs pointer analysis dependence analysis

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Effective fine-grain synchronization for automatically parallelized programs using optimistic synchronization primitives

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ACM TRANSACTIONS ON COMPUTER SYSTEMS 1999年第4期17卷 337-371页

作者： Rinard, MC MIT Comp Sci Lab Cambridge MA 02139 USA

This article presents our experience using optimistic synchronization to implement fine-grain atomic operations in the context of a parallelizing compiler for irregular, object-based computations. Our experience shows that the synchronization requirements of these programs differ significantly from those of traditional parallel computations, which use loop nests to access dense matrices using affine access functions. In addition to coarse-grain barrier synchronization, our irregular computations require synchronization primitives that support efficient fine-grain atomic operations. The standard implementation mechanism for atomic operations uses mutual exclusion locks. But the overhead of acquiring and releasing locks can reduce the performance. Locks can also consume significant amounts of memory. Optimisitic synchronization primitives such as load-linked/store conditional are an attractive alternative. They require no additional memory and eliminate the use of heavyweight blocking synchronization constructs. We evaluate the effectiveness of optimistic synchronization by comparing experimental results from two versions of a parallelizing compiler for irregular, object-based computations. One version generates code that uses mutual exclusion locks to make operations execute atomically. The other version uses optimistic synchronization. We used this compiler to automatically parallelize three irregular, object-based benchmark applications of interest to the scientific and engineering computation community. The presented experimental results indicate that the use of optimistic synchronization in this context can significantly reduce the memory consumption and improve the overall performance.

关键词： algorithms experimentation performance atomic operations commutativity analysis synchronization optimistic synchronization parallel computing parallelizing compilers

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