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IEEE International Conference on Consumer Electronics (ICCE)

作者： Omar Imran Sreeraman Rajan Shikharesh Majumdar Systems and Computer Engineering Carleton University Ottawa Canada

ISBN: (数字)9798331521165

ISBN: (纸本)9798331521172

Rapid object detection is crucial for safety-critical applications, such as post-event analysis of surveillance videos in crime investigations and the operation of autonomous vehicles. The objective of this paper is to improve the speed of object detection through efficient partitioning and frame reduction using parallel processing. Techniques to improve Spark's default partitioning by using entropy-based algorithms to create more evenly distributed partitions based on the estimated workload of the frames are considered. Redundant frames are removed to efficiently reduce the workload. algorithms for removing redundant frames are introduced and evaluated for their effectiveness in comparison to random and fixed frame removals. The results from this paper demonstrate that partitioning algorithms that estimate workload using entropy provide faster processing time when compared to those that use random partitioning. The results also indicate that frame removal algorithms that use frame-specific information, like entropy difference between frames, further improve performance without notably reducing detection accuracy when compared to those that do not utilize frame-specific information.

关键词： Accuracy System performance Surveillance Object detection Parallel processing Transformers Entropy partitioning algorithms Sparks Videos

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MULTI-partitioning LINEAR-ESTIMATION algorithms - CONTINUOUS SYSTEMS

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IEEE TRANSACTIONS ON AUTOMATIC CONTROL 1979年第6期24卷 937-944页

作者： LAINIOTIS, DG ANDRISANI, D CALSPAN ADV TECHNOL CTR BUFFALONY 14225

The partitioned estimation algorithms of Lainiotis for the linear continuous-time state estimation problem have been generalized in this paper in two important ways. First, the initial condition of the estimation problem can, using the results of this paper, be partitioned into the sum of an arbitrary number of jointly Gaussian random variables; and second, these jointly Gaussian random variables may be statistically dependent. The form of the resulting algorithm consists of an imbedded Kalman filter with partial initial conditions and one correction term for each other partition or subdivision of the initial state vector. Emphasis in this paper is on ways in which this approach, called multipartitioning, can be used to provide added insight into the estimation problem. One significant application is in the parameter identification problem where identification algorithms can be formulated in which the inversion of the information matrix of the parameters is replaced by simple division by scalars. A second use of multipartitioning is to show the specific effects on the filtered state estimate of off-diagonal terms in the initial-state covariance matrix.

关键词： Continuous time systems State estimation partitioning algorithms Covariance matrix Noise measurement Random variables Nonlinear filters Smoothing methods Vectors Density measurement

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Collaborative Inference Acceleration with Non-Penetrative Tensor partitioning

Collaborative Inference Acceleration with Non-Penetrative Te...

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International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Zhibang Liu Chaonong Xu Zhenjie Lv Zhizhuo Liu Suyu Zhao Beijing Key Lab of Petroleum Data Mining China University of Petroleum Beijing China

ISBN: (数字)9798350368741

ISBN: (纸本)9798350368758

The inference of large-sized images on Internet of Things (IoT) devices is commonly hindered by limited resources, while there are often stringent latency requirements for Deep Neural Network (DNN) inference. Currently, this problem is generally addressed by collaborative inference, where the large-sized image is partitioned into multiple tiles, and each tile is assigned to an IoT device for processing. However, since significant latency will be incurred due to the communication overhead caused by tile sharing, the existing collaborative inference strategy is inefficient for convolutional computation, which is indispensable for any DNN. To reduce it, we propose Non-Penetrative Tensor partitioning (NPTP), a fine-grained tensor partitioning method that reduces the communication latency by minimizing the communication load of tiles shared, thereby reducing inference latency. We evaluate NPTP with four widely-adopted DNN models. Experimental results demonstrate that NPTP achieves a 1.44-1.68× inference speedup relative to CoEdge, a state-of-the-art (SOTA) collaborative inference algorithm.

关键词： Tensors Convolution Collaboration Signal processing algorithms Artificial neural networks Inference algorithms partitioning algorithms Internet of Things Speech processing Load modeling

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Machine Learning-Based Pruning Algorithm of partitioning Techniques for Circuit Simulation

Machine Learning-Based Pruning Algorithm of Partitioning Tec...

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IEEE International Symposium on Quality Electronic Design

作者： Qian Chen Xiaofeng Yang Shengli Lu Department of National ASIC System Engineering Research Center Southeast University China

ISBN: (数字)9798331509422

ISBN: (纸本)9798331509439

Large-scale integrated circuit simulation faces challenges in simulation speed and memory consumption. Based on the divide-and-conquer idea, partitioning techniques can well mitigate these issues. However, as the number of partitioned subcircuits increases, the larger and denser Schur complement matrix destroys the scalability. Although previous studies introduce iterative methods to reduce the order and density of Schur matrices, the convergence and convergence speed of iterative methods are sensitive to circuit structures, limiting the simulation scenarios. This paper proposes a machine learning-based pruning algorithm that reduces the density of Schur matrices while precisely controlling simulation accuracy. In addition, a partitioning-based circuit simulation tool is developed and a constrained random scanning method is introduced to generate reliable samples for training a high-precision model. Combined with direct methods, such as LU factorization, the proposed approach exhibits robust performance. Experiments on real circuit netlists and matrices demonstrate that our model achieves an accuracy of 94.23%. Compared to the traditional method, this work reduces the density by an average of 15.54 × and accelerates the simulation by an average of 1.71 ×, while restricting the simulation error to within 0.533%o.

关键词： Training Machine learning algorithms Accuracy Circuit simulation Scalability partitioning algorithms Iterative methods Integrated circuit modeling Integrated circuit reliability Convergence

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Size Constrained K-Means Clustering for Controlled Design Structure Matrix partitioning

Size Constrained K-Means Clustering for Controlled Design St...

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Annual IEEE Systems Conference

作者： Heekun Roh Lilly Etzenbach Alexia Oltramare Johannes Norheim Olivier L. De Weck Dept. of Aeronautics and Astronautics Massachusetts Institute of Technology Cambridge USA Dept. of Aeronautics and Astronautics Massachusetts Institute of Technology Tufts University Cambridge USA Dept. of Design Manufacturing and Engineering Management University of Strathclyde Glasgow UK

ISBN: (数字)9798331508180

ISBN: (纸本)9798331508197

In this paper, we propose a novel clustering algorithm for Design Structure Matrices (DSMs) with the goal of providing a balanced system partitioning. DSMs are one of the standard forms of modeling the dependency structure between system components. They naturally reveal the complexity of the system and often provide insights for organizational management. In particular, partitioning a DSM into multiple clusters is widely studied in the literature, as the cluster structure either gives rise to a natural work breakdown structure for the organization or highlights hidden dependencies between clusters. Often, such clustering methods work directly on DSMs by permuting rows and columns randomly, making scalability an issue due to the exponentially growing search space with respect to DSM size. In this paper, we propose an alternative approach to clustering a DSM in its spectral space using the k-means algorithm. The spectral space of a DSM is the low-dimensional eigenvector space of the Laplacian of the given matrix, which is invariant to the row-column permutation of the original DSM. Furthermore, we introduce an Integer Linear Programming (ILP) method to constrain the size of each cluster to balance the resulting partitions, which is often not achievable using the generic kmeans algorithm. The DSM from a medium-sized jet engine is used to demonstrate the method's balancing properties. Then synthetic DSMs are used to show the method's scalability which is compared to the generic simulated annealing clustering algorithm.

关键词： Laplace equations Electric breakdown Scalability Clustering methods Standards organizations Clustering algorithms Simulated annealing Organizations Integer linear programming partitioning algorithms

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Product Recognition for Inventory Management Using Spatial partitioning in a Multi-Camera System

Product Recognition for Inventory Management Using Spatial P...

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IEEE International Conference on Consumer Electronics (ICCE)

作者： Viduranga Munasinghe Tae-Ho Lee Tae Sung Kim Jin-Sung Kim Hyuk-Jae Lee Department of Electrical and Computer Engineering Seoul National University Seoul South Korea Department of Electronic Engineering SunMoon University Asan South Korea

ISBN: (数字)9798331521165

ISBN: (纸本)9798331521172

Recent advancements in deep learning have significantly improved object detection capabilities. However, accurately recognizing objects in environments with complex occlusions remains a challenge. For instance, detecting densely packed items on shelves in unmanned stores presents difficulties even for the most cutting-edge deep-learning object detectors. To address this issue, we propose a deep learning-based inventory management system tailored for multi-camera unmanned stores. The proposed method utilizes a Voronoi diagram-based ground plane localization technique along with regions of interest (ROI) obtained by using image difference. A weighted voting algorithm is employed to ensure an accurate inventory check. This approach outperforms conventional ROI detection methods by 10.45% in terms of recognition accuracy.

关键词： Deep learning Location awareness Accuracy Event detection Object detection Inventory management partitioning algorithms Reliability Object recognition Optimization

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DyLGNN: Efficient LM-GNN Fine-Tuning with Dynamic Node partitioning, Low-Degree Sparsity, and Asynchronous Sub-Batch

DyLGNN: Efficient LM-GNN Fine-Tuning with Dynamic Node Parti...

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Design, Automation and Test in Europe Conference and Exhibition

作者： Zhen Yu Jinhao Li Jiaming Xu Shan Huang Jiancai Ye Ningyi Xu Guohao Dai Shanghai Jiao Tong University Infinigence-AI

ISBN: (数字)9783982674100

ISBN: (纸本)9798331534646

Text-Attributed Graphs (TAGs) tasks involve both textual node information and graph topological structure. The top-k method, using Language Models (LMs) for text encoding and Graph Neural Networks (GNNs) for graph processing, offers the best accuracy while balancing memory and training time. However, challenges still exist: (1) Static sampling of k neighbors reduces performance. Using a fixed k can result in sampling too few or too many nodes, leading to a 3.2% accuracy loss across datasets. (2) Time-consuming processing for non-trainable nodes. After partitioning all nodes into with-gradient trainable and without-gradient non-trainable sets, the number of non-trainable nodes is ~9-10 x larger than trainable nodes, resulting in nearly 70% of the total time. (3) Time-consuming data movement. For processing non-trainable nodes, after the text strings are tokenized into tokens on the CPU side, the data movement from host memory to GPU takes 30%-40% of the time. In this paper, we propose DyLGNN, an efficient end-to-end LM-GNN fine-tuning framework through three innovations: (1) Heuristic Node partitioning. We propose an algorithm that dynamically and adaptively selects “important” nodes to participate in the training process for downstream tasks. Compared to the static top-k method, we reduce the training memory usage by 24.0%. (2) Low-Degree Sparse Attention. We point out that the embedding of low-degree nodes has minimal impact on the final results (e.g. ~1.5% accuracy loss), therefore, We perform sparse attention computation on low-degree nodes to further reduce the computation caused by “unimportant” nodes, achieving an average 1.27 x speedup. (3) Asynchronous Sub-batch Pipeline. Within the top-k framework, we analyze the time breakdown of the LM inference component. Leveraging our heuristic node partitioning, which effectively minimizes memory demands, we can asynchronously execute data movement and computation, thereby overlapping the time required for data moveme

关键词： Training Technological innovation Accuracy Heuristic algorithms Pipelines Memory management Graphics processing units Europe Graph neural networks partitioning algorithms

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A partitioning-Based CAD Flow for Interposer-Based Multi-Die FPGAs

A Partitioning-Based CAD Flow for Interposer-Based Multi-Die...

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Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Mahesh A. Iyer Andrew B. Kahng Jason Luu Bodhisatta Pramanik Kristofer Vorwerk Grace Zgheib Altera University of California San Diego La Jolla CA USA Intel Corporation

ISBN: (数字)9798331502812

ISBN: (纸本)9798331502829

Multi-die interposer-based FPGA architectures present several design challenges: (i) limited inter-die connectivity (interposer) resources and (ii) increased interposer delays compared to intra-die routing. Addressing these challenges is critical, as compared to intra-die routing, they directly impact the routability, routed wirelength (rWL) and maximum clock frequency (Fmax) of the design. In this paper, we present a partitioning-based CAD flow tailored for interposer-based multi-die FPGA architectures. Central to our approach is FPGAPart, the first open-source timing-driven netlist partitioner that can handle FPGA designs while addressing modern architectural constraints. We integrate FPGAPart with the open-source tool VTR 7.0. In particular, we use: (i) VTR 7.0's pre-packing solutions as clustering hints during partitioning and (ii) the FP-Growth algorithm [14] to detect frequently occurring patterns (instances) across multiple timing paths for clustering. Additionally, we introduce neighborhood influences-based cutting planes into the core ILP solver in FPGAPart, resulting in a ~38× ILP runtime speedup with < 1 % degradation in solution quality, compared to using no neighborhood influences. Compared to the default VTR 7.0, our flow achieves a geometric mean improvement of ~3% in rWL and ~3% in Fmax for a two-die configuration, with similar improvements across other configurations. Compared to hMETIS [17], METIS [18] and TritonPart [5], FPGAPart achieves improvements up to ~4% in rWL and ~7 % in Fmax for a two-die configuration, with similar improvements across other configurations.

关键词： Degradation Runtime Clustering algorithms Routing partitioning algorithms Delays Field programmable gate arrays Video recording Convergence Clocks

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Intelligent Reflecting Array Phase Mapping Method with One-Dimensional Coverage partitioning

Intelligent Reflecting Array Phase Mapping Method with One-D...

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International Conference on Information Networking

作者： Jaehong Kim Jingon Joung School of Electrical and Electronics Engineering Chung-Ang University Seoul South Korea

ISBN: (数字)9798331506940

ISBN: (纸本)9798331506957

This study proposes the intelligent reflecting array (IRA) phase mapping method that can directly map the user equipment (UE) position to the IRA phase shift (PS) vector. To construct the mapping between the UE position and the IRA PS vector, we partition the coverage into multiple regions, each with an anchor. The IRA PS vector corresponding to each anchor position is stored offline. The designed mapping is used online to choose the IRA PS vector from the UE’s position feedback. Numerical results verified that the IRA phase mapping method with the generalized Lloyd algorithm (GLA)-based partitioning converges to the performance upper bound as the number of regions increases. Also, uniform angle-based partitioning can achieve comparable performance to GLA-based partitioning.

关键词： Phased arrays Upper bound Vectors partitioning algorithms Signal to noise ratio

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Comparison of heuristic algorithms for variable partitioning in circuit implementation 16

Comparison of heuristic algorithms for variable partitioning...

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16th International Conference on VLSI Design/2nd International Conference on Embedded Systems Design

作者： Muthukumar, V Selvaraj, H Univ Nevada Dept Elect & Comp Engn Las Vegas NV 89154 USA

ISBN: (纸本)0769518680

Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound variables (variable partitioning problem) for disjoint (disjoint serial) decomposition, such that the decomposed circuits are smaller in size and its truth table representation have maximal don't cares. A novel pruned breadth first search (PBFS/IPBFS) approach is proposed to determine the set of good variable partitions with minimal time and computational complexity. The heuristics proposed minimize the size of the sub-functions. The proposed approach has been successfully implemented and test with MCNC and Espresso benchmarks.

关键词： Benchmark testing Circuit synthesis Circuit testing Computational complexity Cost function Field programmable gate arrays Heuristic algorithms Input variables partitioning algorithms Search methods

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