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performance debugging of Esterel specifications

REAL-TIME SYSTEMS 2012年第5期48卷 570-600页

作者： Ju, Lei Bach Khoa Huynh Roychoudhury, Abhik Chakraborty, Samarjit Shandong Univ Sch Comp Sci & Technol Jinan Shandong Peoples R China Natl Univ Singapore Dept Comp Sci Singapore 117548 Singapore Tech Univ Munich Inst Real Time Comp Syst Munich Germany

Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based on the underlying "synchrony hypothesis", which needs to be validated when Esterel specifications get compiled to real implementations (such as C code). In this work, we present a model-driven and architecture-aware timing analysis framework for C code generated from Esterel and executed on general-purpose processors. By integrating model-level information into the traditional timing analysis, we can efficiently compute accurate time estimates via systematically eliminating a large number of infeasible paths in the generated code. Experimental results show that with our proposed intermediate representation level infeasible path analysis in the model compilation, we obtain up to 16.1 % tighter WCET estimates compared to the traditional assembly code level infeasible path detection with substantially less analysis time. Furthermore, by maintaining the traceability links between Esterel specifications and the generated C code, we are able to map the time-critical computations at the C-level back to the Esterel-level.

关键词： Esterel Synchronous programming performance debugging WCET analysis

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performance debugging in Data Centers: Doing More with Less

Performance Debugging in Data Centers: Doing <i>More</i> wit...

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1st International Conference on Communication Systems and Networks

作者： Cecchet, Emmanuel Natu, Maitreya Sadaphal, Vaishali Shenoy, Prashant Vin, Harrick Univ Massachusetts Dept Comp Sci Amherst MA 01003 USA TRDDC Tata Consultancy Serv Pune Maharashtra India

ISBN: (纸本)9781424429127

With the increasing scale and complexity of data centers, detecting and localizing performance faults in real-time has become both a pressing need and a challenge. While several approaches for performance debugging in data centers have been proposed, these techniques do not assume any constraints on the availability of operational data needed to detect and localize faults. We argue that collecting such operational data often requires significant instrumentation or intrusiveness, which is difficult to realize in production data centers. Such constraints complicate the deployment of existing techniques or limit their effectiveness in practice. In this paper, we argue that for performance debugging to become practical and effective in real-world systems, one needs to develop techniques that are "more effective" with "less instrumentation and intrusiveness". We raise several issues and challenges in realizing this vision and present some initial ideas on addressing these challenges.

关键词： data centers performance debugging fault detection and localization operating and distributed systems

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MTOOL - AN INTEGRATED SYSTEM FOR performance debugging SHARED MEMORY MULTIPROCESSOR APPLICATIONS

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 1993年第1期4卷 28-40页

作者： GOLDBERG, AJ HENNESSY, JL STANFORD UNIV COMP SYST LABSTANFORDCA 94305

This paper describes Mtool, a software tool for analyzing performance losses in shared memory parallel programs. Mtool augments a program with low overhead instrumentation which perturbs the program's execution as little as possible while generating enough information to isolate memory and synchronization bottlenecks. After running the instrumented version of the parallel program, the programmer can use Mtool's window-based user interface to view compute time, memory, and synchronization bottlenecks at increasing levels of detail from a whole program level down to the level of individual procedures, loops, and synchronization objects. The paper describes Mtool's low overhead instrumentation methods, memory bottleneck detection technique, and attention focusing mechanisms, contrasts Mtool with other approaches, and offers a case study to demonstrate the effectiveness of Mtool.

关键词： MEMORY SYSTEM BEHAVIOR PARALLEL PROGRAMMING performance debugging SHARED MEMORY MULTIPROCESSOR SOFTWARE INSTRUMENTATION

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VISUALIZING performance debugging

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COMPUTER 1989年第10期22卷 38-51页

作者： LEHR, T SEGALL, Z VRSALOVIC, DF CAPLAN, E CHUNG, AL FINEMAN, CE CARNEGIE MELLON UNIV SCH COMP SCIPITTSBURGHPA 15213 CARNEGIE MELLON UNIV CTR DEPENDABLE SYSTPITTSBURGHPA 15213

The authors examine a special software development environment called the Parallel Programming and Instrumentation Environment (PIE). PIE is designed to develop performance-efficient parallel and sequential computations. Following an explanation of PIE's general theory and features, PIE's visualization tools are used to isolate and repair the parallelism problem of an eight-process computation. Two more difficult examples using PIE are discussed. Some of the issues involved in correctly presenting visual information, such as the features users ask for and what can be done about a performance monitor's perturbation of computations, are addressed

关键词： PIE Parallel Programming and Instrumentation Environment computer graphics eight-process computation parallel programming parallelism problem performance debugging program debugging programming environments software development environment software tools visualization tools

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HLScope: High-Level performance debugging for FPGA Designs 25

HLScope: High-Level Performance Debugging for FPGA Designs

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25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Choi, Young-Kyu Cong, Jason Univ Calif Los Angeles Dept Comp Sci Los Angeles CA 90024 USA

ISBN: (纸本)9781538640371

In their quest for further optimization, field-programmable gate array (FPGA) designers often spend considerable time trying to identify the performance bottleneck in a current design. But since FPGAs do not have built-in high-level probes for performance analysis, manual effort is required to insert custom hardware monitors. This, however, is a time-consuming process which calls for automation. Previous work automates the process of inserting hardware monitors into the communication channels or the finite-state machine, but the instrumentation is applied in low-level hardware description languages (HDL) which limits the comprehensibility in identifying the root cause of stalls. Instead, we propose a performance debugging methodology based on high-level synthesis (HLS). High-level analysis allows tracing the cause of stalls on a function or loop level, which provides a more intuitive feedback that can be used to pinpoint the performance bottleneck. In this paper we propose HLScope, a source-to-source transformation framework based on Vivado HLS for automated performance analysis. We present a method for analyzing the information collected from the software simulation to estimate the stall rate and its cause without the need for FPGA bitstream generation. For detailed analysis, an in-FPGA analysis method is proposed that can be natively integrated into the HLS environment. Experiments show that the parameter extraction from the simulation process is orders of magnitude faster than bitstream generation, with a 2.2% cycle difference on average. In-FPGA flow consumes only about 170 LUTs and a BRAM per monitored module and provides cycle-accurate results.

关键词： Field-programmable gate array High-level synthesis performance debugging Source-to-source transformation

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PERFCE: performance debugging on Databases with Chaos Engineering-Enhanced Causality Analysis 38

PERFCE: Performance Debugging on Databases with Chaos Engine...

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38th IEEE/ACM International Conference on Automated Software Engineering (ASE)

作者： Ji, Zhenlan Ma, Pingchuan Wang, Shuai Hong Kong Univ Sci & Technol Hong Kong Peoples R China

ISBN: (纸本)9798350329964

debugging performance anomalies in databases is challenging. Causal inference techniques enable qualitative and quantitative root cause analysis of performance downgrades. Nevertheless, causality analysis is challenging in practice, particularly due to limited observability. Recently, chaos engineering (CE) has been applied to test complex software systems. CE frameworks mutate chaos variables to inject catastrophic events (e.g., network slowdowns) to stress-test these software systems. The systems under chaos stress are then tested (e.g., via differential testing) to check if they retain normal functionality, such as returning correct SQL query outputs even under stress. To date, CE is mainly employed to aid software testing. This paper identifies the novel usage of CE in diagnosing performance anomalies in databases. Our framework, PERFCE, has two phases - offline and online. The offline phase learns statistical models of a database using both passive observations and proactive chaos experiments. The online phase diagnoses the root cause of performance anomalies from both qualitative and quantitative aspects on-the-fly. In evaluation, PERFCE outperformed previous works on synthetic datasets and is highly accurate and moderately expensive when analyzing real-world (distributed) databases like MySQL and TiDB.

关键词： Causality Analysis Chaos Engineering performance debugging

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Software System performance debugging with Kernel Events Feature Guidance

Software System Performance Debugging with Kernel Events Fea...

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14th IEEE/IFIP Network Operations and Management Symposium (NOMS)

作者： Rhee, Junghwan Zhang, Hui Arora, Nipun Jiang, Guofei Yoshihira, Kenji NEC Labs Amer Princeton NJ 08540 USA

ISBN: (纸本)9781479909131

To diagnose performance problems in production systems, many OS kernel-level monitoring and analysis tools have been proposed. Using low level kernel events provides benefits in efficiency and transparency to monitor application software. On the other hand, such approaches miss application-specific semantic information which can be effective to differentiate the trace patterns from distinct application logic. This paper introduces new trace analysis techniques based on event features to improve kernel event based performance diagnosis tools. Our prototype, AppDiff, is based on two analysis features: system resource features convert kernel events to resource usage metrics, thereby enabling the detection of various performance anomalies in a unified way;program behavior features infer the application logic behind the low level events. By using these features and conditional probability, AppDiff can detect outliers and improve the diagnosis of application performance.

关键词： performance debugging system management black-box monitoring kernel events monitoring distributed systems

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Profiling for Run-Time Checking of Computational Properties and performance debugging in Logic Programs

Profiling for Run-Time Checking of Computational Properties ...

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13th International Symposium on Practical Aspects of Declarative Languages

作者： Mera, Edison Trigo, Teresa Lopez-Garcia, Pedro Hermenegildo, Manuel Univ Complutense Madrid E-28040 Madrid Spain IMDEA Soft Inst Madrid Spain Spanish Res Council CSIC Madrid Spain Tech Univ Madrid UPM Sch Comp Sci Madrid Spain

ISBN: (纸本)9783642183775

Although several profiling techniques for identifying performance bottlenecks in logic programs have been developed, they are generally not automatic and in most cases they do not provide enough information for identifying the root causes of such bottlenecks. This complicates using their results for guiding performance improvement. We present a profiling method and tool that provides such explanations. Our profiler associates cost centers to certain program elements and can measure different types of resource-related properties that affect performance, preserving the precedence of cost centers in the call graph. It includes an automatic method for detecting procedures that are performance bottlenecks. The profiling tool has been integrated in a previously developed run-time checking framework to allow verification of certain properties when they cannot be verified statically. The approach allows checking global computational properties which require complex instrumentation tracking information about previous execution states, such as, e.g., that the execution time accumulated by a given procedure is not greater than a given bound. We have built a prototype implementation, integrated it in the Ciao/CiaoPP system and successfully applied it to performance improvement, automatic optimization (e.g., resource-aware specialization of programs), run-time checking, and debugging of global computational properties (e.g., resource usage) in Prolog programs.

关键词： profiling run-time checking performance debugging resource usage estimation/verification logic programming

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Seer: Leveraging Big Data to Navigate the Complexity of performance debugging in Cloud Microservices 19

Seer: Leveraging Big Data to Navigate the Complexity of Perf...

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24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)

作者： Gan, Yu Zhang, Yanqi Hu, Kelvin Cheng, Dailun He, Yuan Pancholi, Meghna Delimitrou, Christina Cornell Univ Ithaca NY 14853 USA

ISBN: (纸本)9781450362405

performance unpredictability is a major roadblock towards cloud adoption, and has performance, cost, and revenue ramifications. Predictable performance is even more critical as cloud services transition from monolithic designs to microservices. Detecting QoS violations after they occur in systems with microservices results in long recovery times, as hotspots propagate and amplify across dependent services. We present Seer, an online cloud performance debugging system that leverages deep learning and the massive amount of tracing data cloud systems collect to learn spatial and temporal patterns that translate to QoS violations. Seer combines lightweight distributed RPC-level tracing, with detailed low-level hardware monitoring to signal an upcoming QoS violation, and diagnose the source of unpredictable performance. Once an imminent QoS violation is detected, Seer notifies the cluster manager to take action to avoid performance degradation altogether. We evaluate Seer both in local clusters, and in large-scale deployments of end-to-end applications built with microservices with hundreds of users. We show that Seer correctly anticipates QoS violations 91% of the time, and avoids the QoS violation to begin with in 84% of cases. Finally, we show that Seer can identify applicationlevel design bugs, and provide insights on how to better architect microservices to achieve predictable performance.

关键词： cloud computing datacenter performance debugging QoS deep learning data mining tracing monitoring microservices resource management

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Sage: Practical and Scalable ML-Driven performance debugging in Microservices 21

Sage: Practical and Scalable ML-Driven Performance Debugging...

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26th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)

作者： Gan, Yu Liang, Mingyu Dev, Sundar Lo, David Delimitrou, Christina Cornell Univ Ithaca NY 14853 USA Google Sunnyvale CA USA

ISBN: (纸本)9781450383172

Cloud applications are increasingly shifting from large monolithic services to complex graphs of loosely-coupled microservices. Despite the advantages of modularity and elasticity microservices offer, they also complicate cluster management and performance debugging, as dependencies between tiers introduce backpressure and cascading QoS violations. Prior work on performance debugging for cloud services either relies on empirical techniques, or uses supervised learning to diagnose the root causes of performance issues, which requires significant application instrumentation, and is difficult to deploy in practice. We present Sage, a machine learning-driven root cause analysis system for interactive cloud microservices that focuses on practicality and scalability. Sage leverages unsupervised ML models to circumvent the overhead of trace labeling, captures the impact of dependencies between microservices to determine the root cause of unpredictable performance online, and applies corrective actions to recover a cloud service's QoS. In experiments on both dedicated local clusters and large clusters on Google Compute Engine we show that Sage consistently achieves over 93% accuracy in correctly identifying the root cause of QoS violations, and improves performance predictability.

关键词： cloud computing microservices performance debugging QoS counterfactual Bayesian network variational autoencoder

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