This paper demonstrates the applicability of a recently reported mixed integer quadratically constrained programming (MIQCP) placement algorithm on a large scale real-world power system, based on maximizing loadabilit...
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ISBN:
(纸本)9781467327275
This paper demonstrates the applicability of a recently reported mixed integer quadratically constrained programming (MIQCP) placement algorithm on a large scale real-world power system, based on maximizing loadability. The MIQCP algorithm partially incorporates key quadratic constraints, which were absent in MILP placement methods reported in the past. A case study based on Powerlink Queensland’s HV transmission network is presented, with the system containing 886 buses and 1087 branches. A comparison is presented between the MIQCP approach and the MILP approach, showing significant improvements in solution accuracy. Additionally, through verification by an exhaustive load flow search, MIQCP is shown to provide correct SVC placement in the 886 bus network. Finally, some observations are presented based on results involving multiple SVC placements in the network.
Optimization with the aid of computational fluid dynamics (CFD) simulators has recently attracted attention in various fields. Optimization is often impeded by the increased computing time used by a large number of lo...
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ISBN:
(纸本)9781612848006
Optimization with the aid of computational fluid dynamics (CFD) simulators has recently attracted attention in various fields. Optimization is often impeded by the increased computing time used by a large number of localized solutions, which complicate the calculation by consuming vast amounts of memory for generation and distribution of solutions. Therefore, researchers are actively seeking methods which would allow them to accelerate the process and make the analytical time highly effective. In this paper, we propose an algorithm that obtains the optimal solution by considering the layout of the search points for high-speed convergence performance. We also verify the effectiveness of the algorithm after applying it to an actual problem.
This paper looks at developing a module placement algorithm by combining two well known force-directed graph drawing algorithms. It is in answer to the current gap of module placement tools within the electronic desig...
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ISBN:
(纸本)9781424457939
This paper looks at developing a module placement algorithm by combining two well known force-directed graph drawing algorithms. It is in answer to the current gap of module placement tools within the electronic design automation community that this research is carried out. Whilst previous work has provided an introduction to the basis of the module placement flow followed by the authors, in this work, the additional feature of using pins to determine the placement has been looked into. Experimentation has shown that introduction of pins helps to generate better placements than without.
Monolithic three-dimensional (3D) integration enables the most fine-grained integration of transistors by stacking very thin layers and fabricating monolithic inter-layer vias as small as local vias. Thus, monolithic ...
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ISBN:
(纸本)9781509012145
Monolithic three-dimensional (3D) integration enables the most fine-grained integration of transistors by stacking very thin layers and fabricating monolithic inter-layer vias as small as local vias. Thus, monolithic 3D integration is expected to provide a higher degree of wirelength reduction, performance improvement, and power saving. Due to the prospective properties of the monolithic 3D integration technology, research on multi-layer monolithic 3D integration that stacks more than two device layers is also ongoing. In this paper, we propose an algorithm that optimizes dynamic power consumption of gate-level monolithic 3D ICs. Under the same timing constraints, our algorithm reduces dynamic power consumption more effectively than a uniform-scaling-based placement algorithm. We also design multi-tier monolithic 3D ICs and show that our algorithm outperforms the uniform-scaling-based placement algorithm by 11.4% on average.
A transistor placement algorithm which generates a placement from a circuit diagram is described and evaluation results are presented. This algorithm is not guaranteed to be optimum;however, it can generate efficient ...
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This paper proposes a technique for the fast evaluation of antenna-induced noise at the terminations of PCB traces on compact mobile phones platforms. The main approach is based on the classical theory of transmission...
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ISBN:
(纸本)9781424416998
This paper proposes a technique for the fast evaluation of antenna-induced noise at the terminations of PCB traces on compact mobile phones platforms. The main approach is based on the classical theory of transmission lines with external field excitation. We show that a single full-wave electromagnetic simulation is needed to compute the coupling coefficients for an arbitrary location of the trace on the phone PCB. Therefore, the approach is ideally suited for the automated incorporation of EMI constraints within routing and placement algorithms and for parametric and what-if analyses.
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