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A layered software architecture for quantum computing design tools

COMPUTER 2006年第1期39卷 74-+页

作者： Svore, KM Aho, AV Cross, AW Chuang, I Markov, IL Columbia Univ Dept Comp Sci New York NY 10027 USA MIT Dept Elect Engn & Comp Sci Cambridge MA 02139 USA MIT Media Lab Ctr Bits & Atoms Quanta Grp Cambridge MA 02139 USA MIT Dept Phys Cambridge MA 02139 USA Univ Michigan Dept Elect Engn & Comp Sci Ann Arbor MI 48109 USA

Despite convincing laboratory demonstrations of quantum information processing, it remains difficult to scale because it relies on inherently noisy components. Adequate use of quantum error correction and fault tolerance theoretically should enable much better scaling, but the sheer complexity of the techniques involved limits what is achievable today. The authors propose a layered software architecture consisting of a four-phase computer-aided design flow that assists with such computations by mapping a high-level language source program representing a quantum algorithm onto a quantum device. By weighing different optimization and error-correction procedures at appropriate phases of the design flow, researchers, algorithm designers, and tool builders can trade off performance and accuracy.

关键词： electronic design automation program compilers quantum computing softwarearchitecture computer-aided design tool four-phase design flow layered software architecture nanoscale quantum-mechanical system control program compiler quantum computing Design t

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QP test: a dependence test for quadratic array subscripts

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IET SOFTWARE 2013年第5期7卷 271-282页

作者： Zhao, Jie Zhao, Rongcai Han, Lin Xu, Jinlong State Key Lab Math Engn & Adv Comp Wuxi 214125 Peoples R China

Traditional dependence tests detect dependences with linear array subscripts, but only give passive results to those with non-linear expressions. It may result in a multitude of pseudo-dependences. To maximise the parallelism of applications and improve an optimising compiler's ability of detecting dependences between program statements, it is necessary to develop a non-linear dependence test to eliminate these pseudo-dependences. This study presents a new non-linear dependence test by analysing the optimal solution of the quadratic subscripts with the index bounds constraints. The authors prove that the non-linear dependences caused by subscripts, which can be written in the form of quadratic programming model, are able to be detected, and introduce a non-linear dependence testing algorithm based on quadratic programming. The effectiveness of this algorithm is verified. The authors developed a prototype implementation of the test with the Open64 compiler and evaluated it using some real world applications from Perfect Club benchmarks and Spec2006 benchmark suites. The experimental results indicate that, compared to existing testing methods, the quadratic programming (QP) test is more efficient for quadratic cases.

关键词： parallel processing program compilers quadratic programming QP test dependence test quadratic array subscripts linear array subscripts nonlinear expressions pseudo dependences program statements nonlinear dependence quadratic subscripts index bounds constraints quadratic programming model prototype implementation Open64 compiler perfect club benchmarks parallel processing program compiler

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Low-power and real-time address translation through arithmetic operations for virtual memory support in embedded systems

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IET COMPUTERS AND DIGITAL TECHNIQUES 2008年第2期2卷 75-85页

作者： Zhou, X. Petrov, P. Univ Maryland ECE Dept College Pk MD 20742 USA

An arithmetic-based address translation technique is presented for low-power and real-time embedded processors with virtual memory support. General-purpose virtual memory support comes with its disadvantages of excessive power consumption and nondeterministic execution times, which are the main reasons for not adopting virtual memory in energy-efficient and real-time embedded systems. To address these issues, an application-driven address translation is proposed, where most of the address translations, which are traditionally performed as translation lookaside buffer (TLB) lookups, are replaced with fast and energy-efficient addition operations. To achieve this, a program and system-wide information is used to identify sequences of consecutive virtual page numbers, which are mapped to sequences of consecutive physical page frames. For such pairs of page sequences, only the addition of a constant to the virtual page number is needed to produce the physical page frame. The proposed methodology relies on the combined efforts of compiler, operating system, and hardware architecture to achieve a significant power reduction. As the approach fundamentally eliminates conflicts inherent in the hardware translation table, execution time is not only improved but also made predictable for a large number of memory reference instructions. Experiments show power reductions in the range of 80-95% compared to a general-purpose TLB.

关键词： buffer storage real-time embedded system arithmetic-based address translation translation lookaside buffer virtual storage virtual memory support consecutive virtual page number table lookup low power address translation consecutive physical page frame low-power electronics operating systems (computers) embedded systems operating system loader memory manager storage allocation program compilers program compiler

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Do you trust your compiler?

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COMPUTER 1999年第5期32卷 65-+页

作者： Boyle, JM Resler, RA Winter, VL Argonne Natl Lab Argonne IL 60439 USA Virginia Commonwealth Univ Richmond VA USA Sandia Natl Labs Livermore CA 94550 USA

As our society becomes more technologically complex, computer systems are finding an alarming number of uses in safety-critical applications. In many such systems, the software component's reliability is essential to the system's safe operation, so it becomes natural to ask, "How can software be made to behave correctly when executed?" Using program transformations to produce trusted software simplifies verification. program transformations use proven laws to manipulate programs in a manner analogous to algebraic transformations. The authors have sketched how a formal method based on program transformations can be used to construct a verified compiler. Such a compiler has been proved to correctly compile any correct program into assembly language. While the compiler itself may not execute efficiently-after all, you need only use the verified compiler the last time you compile a program-the transformational approach should enable the verified compiler to produce efficient assembly code.

关键词： assembly language assembly language compiler verification formal method program compiler program compilers program transformations program verification safety-critical applications software component software reliability software reliability

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Speculative parallelization

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COMPUTER 2006年第12期39卷 126-128页

作者： Gonzalez-Escribano, Arturo Llanos, Diego R. Univ Valladolid Dept Informat E-47002 Valladolid Spain

The most promising technique for automatically parallelizing loops when the system cannot determine dependences at compile time is speculative parallelization. Also called thread-level speculation, this technique assumes optimistically that the system can execute all iterations of a given loop in parallel. A hardware or software monitor divides the iterations into blocks and assigns them to different threads, one per processor, with no prior dependence analysis. If the system discovers a dependence violation at runtime, it stops the incorrectly computed work and restarts it with correct values. Of course, the more parallel the loop, the more benefits this technique delivers. To better understand how speculative parallelization works, it is necessary to distinguish between private and shared variables. Informally speaking, private variables are those that the program always modifies in each iteration before using them. On the other hand, values stored in shared variables are used in different iterations.

关键词： System Monitoring Multi Threading Parallelising compilers program Control Structures Runtime Dependence Violation Discovery Speculative Parallelization Automatic Loop Parallelization program compiler Thread Level Speculation Hardware Monitor Software Monitor program Dependence Analysis Hardware Monitoring Runtime Performance Loss Concurrent Computing Speculative Parallelization How Things Work

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Close to the edge - technology

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Information Professional 2004年第4期1卷 6-9页

作者： Chris Edwards

At the end of August, AMD demonstrated a chip that put two of its Opteron processors onto the same piece of silicon. IBM's Power4 already has two processors working alongside each other on a chip; and four of those chips go into a supercomputer processing module. Soon, the trickle of general-purpose multiprocessors will become more of a stream.

关键词： processor design program compiler Parallel architecture parallel architectures program compilers multiprocessing systems code execution parallel architecture Multiprocessing systems compilers, interpreters and other processors parallel machines

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