检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

38 篇 会议
7 篇 期刊文献

馆藏范围

45 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

44 篇 工学
- 34 篇 计算机科学与技术...
- 23 篇 软件工程
- 16 篇 电气工程
- 5 篇 控制科学与工程
- 3 篇 电子科学与技术（可...
- 1 篇 材料科学与工程（可...
- 1 篇 信息与通信工程
5 篇 理学
- 3 篇 系统科学
- 1 篇 数学
- 1 篇 生物学
4 篇 管理学
- 4 篇 管理科学与工程(可...
- 1 篇 工商管理

主题

45 篇 program control ...
8 篇 parallel process...
6 篇 loops
6 篇 program compiler...
5 篇 runtime
5 篇 parallel process...
4 篇 parallelising co...
4 篇 reconfigurable a...
4 篇 program diagnost...
4 篇 software
3 篇 program debuggin...
3 篇 compilers
3 篇 libraries
3 篇 memory managemen...
3 篇 computer archite...
3 篇 parallel program...
3 篇 embedded systems
3 篇 computational mo...
3 篇 contraceptive co...
3 篇 data flow analys...

机构

2 篇 e china normal u...
1 篇 indian inst sci ...
1 篇 irst povo
1 篇 catena co
1 篇 department of co...
1 篇 univ wisconsin m...
1 篇 sichuan univ sch...
1 篇 univ valladolid ...
1 篇 tsinghua univ de...
1 篇 chengdu institut...
1 篇 center for smart...
1 篇 control engineer...
1 篇 rmit univ sch co...
1 篇 univ strasbourg ...
1 篇 unist sch ece ul...
1 篇 univ minnesota m...
1 篇 univ nice sophia...
1 篇 univ erlangen nu...
1 篇 univ copenhagen ...
1 篇 information engi...

作者

2 篇 teich juergen
1 篇 ponsini olivier
1 篇 song linhai
1 篇 kenter tobias
1 篇 tonella p
1 篇 carayol arnaud
1 篇 fujita h
1 篇 gupta a
1 篇 alves tiago a.o.
1 篇 cardoso joao m. ...
1 篇 llanos diego r.
1 篇 liu leibo
1 篇 merlo e
1 篇 shin dongkun
1 篇 wijesinghe gayan
1 篇 frança felipe m....
1 篇 wu bin
1 篇 cimitile
1 篇 wolfgang birk
1 篇 stevens reinout

语言

42 篇 英文
1 篇 葡萄牙文
1 篇 其他
1 篇 中文

检索条件"主题词=Program Control Structures"

共 45 条记录，以下是31-40 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

program understanding and maintenance with the CANTO environment

Program understanding and maintenance with the CANTO environ...

引用

International Conference on Software Maintenance

作者： Antoniol, G Fiutem, R Lutteri, G Tonella, P Zanfei, S Merlo, E IRST Povo Italy

ISBN: (纸本)081868013X

During maintenance activities, the availability of integrated conceptual views that present software at different levels of abstraction, from software architecture to control and data flow relations at code level, is fundamental to understand and modify legacy systems. This paper presents CANTO, a comprehensive program understanding and maintenance environment which integrates fine grained information with architectural views extracted from source code, giving the user control on what is being computed by analyses. The capabilities and usefulness of CANTO are illustrated with reference to a real understanding and maintenance task.

关键词： software tools reverse engineering software maintenance program control structures data flow analysis CANTO program understanding software maintenance integrated conceptual views abstraction levels software architecture program control data flow relations legacy systems fine grained information architectural views source code Code and Architecture Analysis Tool

来源：评论

学校读者我要写书评

暂无评论

Automatic Enhanced CDFG Generation based on Runtime Instrumentation

Automatic Enhanced CDFG Generation based on Runtime Instrume...

引用

IEEE 17th International Conference on Computer Supported Cooperative Work in Design (CSCWD)

作者： Yuan, Zhongda Ma, Yuchun Bian, Jinian Zhao, Kang Tsinghua Univ Dept Comp Sci & Technol Beijing 100084 Peoples R China

ISBN: (纸本)9781467360852;9781467360845

control and Data Flow Graph (CDFG) is a universal description of program behavior, which is widely used in the co-design of software and hardware. The derivation of CDFG has been done mostly by manually or automatically analyzing corresponding source code, which makes this process time-consuming, error-prone and incomplete. In this paper, we proposed an automated design flow based on runtime instrumentation to generate Enhanced CDFG (ECDFG) with additional runtime information. Though the approach of runtime instrumentation is widely used in software debugging to analyze the program with the accurate runtime information, it is rarely used in software and hardware co-design due to the huge trace data and processing overhead. To overcome the bottle neck of the runtime instrumentation approach, Parallel Background Event Logger is proposed to compress and save the huge amount of trace data. Hierarchical loop structures are detected by intersecting reachable set and backward reachable set. Precise data dependency information is deducted by an address based analytical method named Shower Line Algorithm. With these algorithms and techniques, a set of automatic design tools are implemented to collect runtime events, identify nested and implicit loops and deduct data dependance between modules. Exemplar results demonstrated that Enhanced CDFGs for various programs can be generated correctly with acceptable overhead.

关键词： data flow graphs hardware-software codesign instrumentation parallel processing program control structures program debugging source coding

来源：评论

学校读者我要写书评

暂无评论

Affine Transformations for Communication and Reconfiguration Optimization of Loops on CGRAs

Affine Transformations for Communication and Reconfiguration...

引用

IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Liu, Dajiang Yin, Shouyi Liu, Leibo Wei, Shaojun Tsinghua Univ Res Ctr Mobile Comp Beijing 100084 Peoples R China Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China Tsinghua Natl Lab Informat Sci & Technol Beijing 100084 Peoples R China

ISBN: (纸本)9781467357623;9781467357609

A coarse-grained reconfigurable architecture (CGRA) is typically a hybrid architecture, which is composed of a reconfigurable processing unit (RPU) and a host microprocessor. Many compute-intensive applications (e.g., loop nests) are often mapped onto RPUs to speed up the execution of programs. However, communication volume and reconfiguration cost are two bottlenecks for the performance of RPUs. Therefore, loop transformations to break through the bottlenecks and tap the potentials of RPU would be of much significance. In this paper, an automatic loop transformation approach for RPUs is proposed, where the communication cost and reconfiguration cost are under a joint consideration. Experimental results show that our scheme can save up to 22.7% of execution time on average on partial differential equation (PDE) solver kernels compared with the approach just considering communication cost, and performs much better than the loop unrolling scheme on a great majority of loop kernels. Also, run-time complexity is acceptable for the practical cases.

关键词： affine transforms microprocessor chips operating system kernels optimisation partial differential equations program control structures reconfigurable architectures

来源：评论

学校读者我要写书评

暂无评论

TRACO: An Automatic Loop Nest Parallelizer for Numerical Applications

TRACO: An Automatic Loop Nest Parallelizer for Numerical App...

引用

3rd International Conference on Innovative Network Systems and Applications (iNetSApp) held in conjunction with Federated Conference on Computer Science and Information Systems (FedCSIS)

作者： Palkowski, Marek Klimek, Tomasz Bielecki, Wlodzimierz West Pomeranian Univ Technol Szczecin Ul Zolnierska 49 PL-71210 Szczecin Poland

ISBN: (纸本)9788360810668

We present the source-to-source TRACO compiler allowing for increasing program locality and parallelizing arbitrarily nested loop sequences in numerical applications. Algorithms for generation of tiled code and extracting synchronization-free slices composed of tiles are presented. Parallelism of arbitrary nested loops is obtained by creating a kernel of computations represented in the OpenMP standard to be executed independently on many CPUs. We consider benchmarks, typical from compute-intensive sequences of algebra operations or numerical computation from industry and engineering. The speed-up of programs generated by TRACO are discussed. Related compilers and techniques are considered. Future work is outlined.

关键词： application program interfaces mathematics computing numerical analysis parallel algorithms program compilers program control structures program slicing synchronisation CPUs OpenMP standard algebra operations arbitrary nested loop sequence parallelism automatic loop nest parallelizer compute-intensive sequences program locality source-to-source TRACO compiler synchronization-free slice extraction tiled code generation Benchmark testing Computational modeling Kernel Mathematical model Multicore processing Parallel processing Schedules

来源：评论

学校读者我要写书评

暂无评论

Symbolic Parallelization of Loop programs for Massively Parallel Processor Arrays

Symbolic Parallelization of Loop Programs for Massively Para...

引用

IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP)

作者： Teich, Juergen Tanase, Alexandru Hannig, Frank Univ Erlangen Nurnberg Dept Comp Sci Nurnberg Germany

ISBN: (纸本)9781479904945;9781479904938

In this paper, we present a first solution to the unsolved problem of joint tiling and scheduling a given loop nest with uniform data dependencies symbolically. This problem arises for loop programs for which the iterations shall be optimally scheduled on a processor array of unknown size at compile-time. Still, we show that it is possible to derive parameterized latency-optimal schedules statically by proposing two new program transformations: In the first step, the iteration space is tiled symbolically into orthotopes of parametrized extensions. The resulting tiled program is subsequently scheduled symbolically. Here, we show that the maximal number of potential optimal schedules is upper bounded by 2(n)n! where n is the dimension of the loop nest. However, the real number of optimal schedule candidates being much less than this. At run-time, once the size of the processor array becomes known, simple comparisons of latency-determining expressions finally steer which of these schedules will be dynamically activated and the corresponding program configuration executed on the resulting processor array so to avoid any further run-time optimization or expensive re-compilations.

关键词： parallel processing parallelising compilers processor scheduling program control structures

来源：评论

学校读者我要写书评

暂无评论

Optimizing intra-task voltage scheduling using data flow analysis 05

Optimizing intra-task voltage scheduling using data flow ana...

引用

10th Asia and South Pacific Design Automation Conference

作者： Shin, Dongkun Kim, Jihong Seoul Natl Univ Sch CSE Seoul 151742 South Korea

ISBN: (纸本)0780387368

Intra-task voltage scheduling (IntraDVS), which adjusts the supply voltage within an individual task boundary, is an effective technique for developing low-power applications. In IntraDVS, slack times are estimated by analyzing program's control flow information. In this paper, we propose an optimization technique for IntraDVS using data flow information. The proposed algorithm improves the energy efficiency by moving the voltage scaling points to earlier instructions based on the analysis results of program's data flow. The experimental results using an MPEG-4 encoder program show that the proposed algorithm reduces the energy consumption by 40-45% over the original IntraDVS algorithm.

关键词： data flow analysis program control structures optimisation image coding scheduling intra-task voltage scheduling data flow analysis IntraDVS supply voltage individual task boundary low-power applications slack times program control flow optimization technique MPEG-4 encoder program energy consumption

来源：评论

学校读者我要写书评

暂无评论

Stack-tagged dataflow 26

Stack-tagged dataflow

引用

26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2014

作者： Santiago, Leandro Marzulo, Leandro A.J. Goldstein, Brunno F. Alves, Tiago A.O. França, Felipe M.G. Dep. de Informática e Ciência da Computação Instituto de Matemática e Estatística - IMe Universidade Do Estado Do Rio de Janeiro - UERJ Rio de Janeiro Brazil Programa de Engenharia de Sistemas e Computação COPPE Universidade Federal Do Rio de Janeiro Rio de Janeiro Brazil

ISBN: (纸本)9781479970148

Dynamic Dataflow allows simultaneous execution of instructions in different iterations of a loop, boosting parallelism exploitation. In this model, operands are tagged with their associated instance number, incremented as they go through the loop. Instruction execution is triggered when all input operand with the same tag become available. However, this traditional tagging mechanism often requires the generation of several control instructions to manipulate tags and guarantee the correct matching. To address this problem, this work presents Stack- Tagged Dataflow, a tagging mechanism that uses stacks of tags to reduce control overheads in dataflow, while isolating context from different nested loops. Push instructions at the beginning of loops will create a new context, while Pop instructions, at the end of the loop, will restore the original context tags. Experimental results show that Stack-Tagged Dataflow is a viable solution, suggesting that a hybrid compiling approach can be used to enable Stack- Tags only when needed. © 2014 IEEE.

关键词： data flow computing program control structures context isolation dataflow control overhead reduction nested loops pop instructions push instructions stack-tagged dataflow tagging mechanism Assembly Computer architecture Context Libraries Parallel processing Tagging Virtual machining Dataflow Parallel programming Stack Tag data flow TAGGING program control structures virtual machines Parallel programming Computer Architecture Furnace conveyors PARALLEL PROCESSING (COMPUTERS) Loops Libraries assemblies NESTED LOOPS virtual machining instruction

来源：评论

学校读者我要写书评

暂无评论

Termination analysis of multipath loop programs

Termination analysis of multipath loop programs

引用

4th International Conference on Computational and Information Sciences, ICCIS 2012

作者： Li, Lingna Chengdu Institute of Computer Applications School of Sciences Southwest Petroleum University Chengdu China

ISBN: (纸本)9780769547893

In this paper, we analyze termination of multipath linear loop programs by combining the trial difference method and calculation of loop complexity upper bound. Though this method is not complete, it is useful to verify termination of multipath linear loop programs, because it is practical and it is very easy to implement. © 2012 IEEE.

关键词： Loops program control structures

来源：评论

学校读者我要写书评

暂无评论

Efficient discovery of loop nests in execution traces

Efficient discovery of loop nests in execution traces

引用

International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems

作者： Xu, Qiang Subhlok, Jaspal Hammen, Nathaniel CGGVeritas Inc. United States Department of Computer Science University of Houston United States

ISBN: (纸本)9780769541976

Execution and communication traces are central to performance modeling and analysis. Since the traces can be very long, meaningful compression and extraction of representative behavior is important. Commonly used compression procedures identify repeating patterns in sections of the input string and replace each instance with a representative symbol. This can prevent the identification of long repeating sequences corresponding to outer loops in a trace. This paper introduces and analyzes a framework for identifying the maximal loop nest from a trace. The discovery of loop nests makes construction of compressed representative traces straightforward. The paper also introduces a greedy algorithm for fast "near optimal" loop nest discovery with well defined bounds. Results of compressing MPI communication traces of NAS parallel benchmarks show that both algorithms identified the basic loop structures correctly. The greedy algorithm was also very efficient with an average processing time of 16.5 seconds for an average trace length of 71695 MPI events. © 2010 IEEE.

关键词： MPI communication traces NAS parallel benchmarks Trace compression application program interfaces execution traces greedy algorithm greedy algorithms loop discovery loop structures message passing near optimal loop nest discovery performance modeling program control structures repeating patterns repeating sequences

来源：评论

学校读者我要写书评

暂无评论

Parallelizing programs by sequential scanning 4

Parallelizing programs by sequential scanning

引用

4th International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region, HPC-Asia 2000

作者： Rong, Hong-Bo Tang, Zhi-Zhong Department of Computer Science and Technology Tsinghua University Beijing100084 China

ISBN: (纸本)0769505902

This paper attempts to uniformly parallelize cyclic and acyclic code, and schedule nested loops directly. A program is parallelized by one-pass scanning from its first to its last operation. This contrasts sharply with the popular approach of hierarchical simplification and outward pipelining. The approach is simple, and applicable to programs with arbitrary control flows. © 2000 IEEE.

关键词： parallelising compilers program control structures parallelizing programs sequential scanning acyclic code cyclic code nested loop scheduling one-pass scanning hierarchical simplification outward pipelining arbitrary control flows instruction-level parallelism software pipelining code scheduling global scheduling loop optimization

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共5页 << < 1 2 3 4 5 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：