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CONCURRENCY-PRACTICE AND EXPERIENCE 1993年第7期5卷 603-622页

作者： WOLFE, M OREGON GRAD INST SCI & TECHNOL BEAVERTONOR

Many papers have been written dealing with the science of data dependence tests, particularly for dependence of arrays in loops;the techniques typically reduce the dependence problem to an algebraic problem, then solve the algebraic problem by an algorithm which has some desired blend of efficiency, generality or precision. While a sound theoretical basis is necessary for dependence-based tools, these papers often leave out many implementation details. This paper addresses the engineering aspects of data dependence testing, particularly focusing on details that are necessary in any competent implementation of a data dependence test.

关键词： program compilers

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Projecting a Modular Future

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IEEE SOFTWARE 2015年第5期32卷 46-52页

作者： Voelter, Markus Warmer, Jos Kolb, Bernd Itemis Lunen Germany

Two innovations are enhancing programming languages' capabilities. First, modularity lets you combine independently developed languages without changing their respective definitions. A language is no longer a fixed quantity; you can extend it with domain-specific constructs as needed. Second, projectional editing lets you build editors and IDEs that don't require parsers. Such editors and IDEs support a range of tightly integrated notations, including textual, symbolic, tabular, and graphical notations. In addition, by avoiding parsers, they avoid grammar composition's well-known limitations. Three examples illustrate how these two innovations affect programming-language design. A set of modular extensions of C for embedded programming enables efficient code generation and formal analysis. A language for requirements engineering flexibly combines structured and unstructured (prose) data. Finally, a language for defining insurance rules uses mathematical notation. These examples all rely on the open source JetBrains MPS (Meta programming System) language workbench. This article is part of a special issue on Software Architecture.

关键词： C Language Formal Specification Formal Verification program compilers Public Domain Software Requirements Engineering Unstructured Data Structured Data Insurance Rules Projectional Editing ID Es Graphical Notations Tabular Notations Symbolic Notations Textual Notations Grammar Composition programming Language Design C Modular Extensions Embedded programming Code Generation Formal Analysis Mathematical Notation Open Source Jet Brains MPS Meta programming System Language Workbench Software Architecture Syntactics Generators Embedded Software programming Computer Languages Software Engineering Software Development Language Engineering Language Workbenches Projectional Editing Domain Specific Languages programming Languages Software Engineering MPS Meta programming System Mbeddr Software Development

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Constructed product result analysis for Haskell

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JOURNAL OF FUNCTIONAL programMING 2004年第3期14卷 211-245页

作者： Baker-Finch, C Glynn, K Jones, SP Australian Natl Univ Dept Comp Sci Canberra ACT 0200 Australia Univ Melbourne Dept Comp Sci Melbourne Vic Australia Microsoft Res Cambridge England

compilers for ML and Haskell typically go to a good deal of trouble to arrange that multiple arguments can be passed efficiently to a procedure. For some reason, less effort seems to be invested in ensuring that multiple results can also be returned efficiently. In the context of the lazy functional language Haskell, we describe an analysis, Constructed Product Result (CPR) analysis, that determines when a function can profitably return multiple results in registers. The analysis is based only on a function's definition, and not on its uses (so separate compilation is easily supported) and the results of the analysis can be expressed by a transformation of the function definition alone. We discuss a variety of design issues that were addressed in our implementation, and give measurements of the effectiveness of our approach across a substantial benchmark set. Overall, the price/performance ratio is good: the benefits are modest in general (though occasionally dramatic), but the costs in both complexity and compile time, are low.

关键词： program compilers

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Automatic selection of high-order transformations in the IBM XL FORTRAN compilers

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IBM JOURNAL OF RESEARCH AND DEVELOPMENT 1997年第3期41卷 233-264页

作者： Sarkar, V WM Software Solutions Division MIT Laboratory for Computer Science Cambridge MA USA

The IBM ASTI optimizer provides the foundation for high-order transformations and automatic shared-memory parallelization in the latest IBM XL FORTRAN (XLF) compilers for RS/6000(TM) and PowerPC(R) uniprocessors and symmetric multiprocessors (SMPs), and for automatic distributed-memory parallelization in the IBM XL High-Performance FORTRAN (XLHPF) compiler for the SP(TM) distributed-memory multiprocessor. In this paper, we describe how the transformer component of the ASTI optimizer automatically selects high-order transformations for a given input program and a target uniprocessor, so as to improve utilization of the memory hierarchy (including cache and registers) and instruction-level parallelism. Our solution is centered on a quantitative approach in which optimization problems are formulated using quantitative cost models. The loop and data transformations currently employed by the ASTI transformer for optimizing uniprocessor performance are loop distribution, loop interchange, loop reversal, loop skewing, loop tiling/blocking (with compiler-selected tile sizes), loop fusion, unrolling of multiple loops (with compiler-selected unroll factors), and scalar replacement of selected array references. The design and initial implementation of the ASTI optimizer were completed during the 1991-1993 time period. To the best of our knowledge, the ASTI transformer is the first system to perform automatic selection of this wide range of transformations using a cost-based framework.

关键词： program compilers

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Code generator framework for smart TV platforms

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IET SOFTWARE 2019年第4期13卷 268-279页

作者： Akbulut, Akhan Toprak, Sezer Istanbul Kultur Univ Dept Comp Engn E5 Karayolu Uzeri Bakirkoy TR-34158 Istanbul Turkey Deloitte Turkey Tech Dept Risk Advisory Deloitte Values House Maslak 1 TR-34398 Istanbul Turkey

In recent years, smart TVs have become more common, making them need to be included as targets for the software industry. In this study, the authors developed a code generator framework and demonstrated it in an architectural view. The proposed framework converts C# programming language based projects, in a Windows Forms or a Windows Phone Application project, into native smart TV Platform applications. The selected primary smart TV platforms assigned for application conversion were Android TV, Firefox OS, and Tizen OS. The authors enabled developers to generate native codes for all three platforms from a single code base using model to model conversion, as in the model driven architecture approach with the use of the open source Roslyn C# language compiler. The need for creating projects for every single platform to make them run on different platforms will thus be eliminated and development cycles shortened. By doing so, the time required to develop an application for each platform is reduced while keeping the generated applications' quality as high as the original application. To show the functionality, the proposed approach is applied in three case studies. The success of the code conversion is satisfactory and converted applications are functional.

关键词： program compilers digital television C plus plus language software architecture telecommunication computing Android (operating system) public domain software software industry code generator framework architectural view C# programming language based projects Windows Forms Windows Phone Application project native smart TV Platform applications application conversion Android TV Firefox OS Tizen OS native codes single code base model driven architecture approach open source Roslyn C# language compiler development cycles code conversion primary smart TV platforms

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Practical compiler techniques on efficient multithreaded code generation for OpenMP programs

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COMPUTER JOURNAL 2005年第5期48卷 588-601页

作者： Tian, XM Girkar, M Bik, A Saito, H Intel Corp Intel Comp Labs Software & Solut Grp Santa Clara CA 95052 USA

State-of-the-art multiprocessor systems pose several difficulties: (i) the user has to parallelize the existing serial code;(ii) explicitly threaded programs using a thread library are not portable;(iii) writing efficient multi-threaded programs requires intimate knowledge of machine's architecture and micro-architecture. Thus, well-tuned parallelizing compilers are in high demand to leverage state-of-the-art computer advances of NUMA-based multiprocessors, simultaneous multi-threading processors and chip-multiprocessor systems in response to the performance quest from the high-performance computing community. On the other hand, OpenMP(*) has emerged as the industry standard parallel programming model. Applications can be parallelized using OpenMP with less effort in a way that is portable across a wide range of multiprocessor systems. In this paper, we present several practical compiler optimization techniques and discuss their effect on the performance of OpenMP programs. We elaborate on the major design considerations in a high performance OpenMP compiler and present experimental data based on the implementation of the optimizations in the Intel (R) C++ and Fortran compilers. Interactions of the OpenMP transformation with other sequential optimizations in the compiler are discussed. The techniques in this paper have achieved significant performance improvements on the industry standard SPEC* OMPM2001 and SPEC* OMPL2001 benchmarks, and these performance results are presented for Intel (R) Pentium (R) and Itanium (R) processor based systems.

关键词： program compilers

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Scheduling methodology for conditional execution of kernels onto multicontext reconfigurable architectures

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IET COMPUTERS AND DIGITAL TECHNIQUES 2008年第3期2卷 199-213页

作者： Rivera, F. Sanchez-Elez, M. Hermida, R. Bagherzadeh, N. Univ Complutense Madrid Dept Arquitectura Comp & Automat Madrid 28040 Spain Univ Calif Irvine Dept Elect Engn & Comp Sci Irvine CA 92697 USA

The authors present a scheduling methodology for conditional execution of kernels onto single instruction stream/multiple data stream multicontext reconfigurable architectures. Data flow graphs are used to describe the target applications in which some kernels are conditionally executed depending on runtime conditions. Immediately after testing a condition the next kernel to be processed is known and its configurations and input data can be loaded, producing a computation stall while these transfers are performed. A compilation-time kernel scheduling is proposed to handle conditional branches (CBs) by determining a kernel sequence that minimises these computation stalls reducing the application latency. Target applications are firstly partitioned taking into account the presence of CBs, and then kernels are ordered for execution and mapped onto the reconfigurable system. Experimental results obtained for interactive and synthetic applications demonstrate the effectiveness of the proposal.

关键词： scheduling single instruction stream/multiple data stream multicontext reconfigurable architecture compilation-time kernel scheduling data flow graphs reconfigurable architectures conditional branch program compilers kernel conditional execution

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AUTOMATIC program PARALLELIZATION

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PROCEEDINGS OF THE IEEE 1993年第2期81卷 211-243页

作者： BANERJEE, U EIGENMANN, R NICOLAU, A PADUA, DA UNIV ILLINOIS CTR SUPERCOMP RES & DEV URBANA IL 61801 USA UNIV ILLINOIS DEPT COMP SCI URBANA IL 61801 USA UNIV CALIF IRVINE DEPT INFORMAT & COMP SCI IRVINE CA 92717 USA

This paper presents an overview of automatic program parallelization techniques. It covers dependence analysis techniques, followed by a discussion of program transformations, including straight-line code parallelization, do loop transformations, and parallelization of recursive routines. The last section of the paper surveys several experimental studies on the effectiveness of parallelizing compilers.

关键词： automatic program parallelization techniques automatic programming dependence analysis techniques do-loop transformations parallel programming parallelizing compilers program compilers program transformations recursive routines straight-line code parallelization

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ISSUES IN ADA COMPILER TECHNOLOGY

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COMPUTER 1989年第2期22卷 52-60页

作者： GANAPATHI, M MENDAL, GO Comput. Syst. Lab. Stanford Univ. CA

The key technical issues involved in producing high-quality Ada compilers and related support tools are discussed. These include real-time issues, programming tools and environments, and code optimization. Also addressed are some important problems that compiler designers face, for example, determining which deficiencies of existing Ada systems can be attributed to the language and which are simply hard-to-implement features or unresolved issued in Ada compiler technology

关键词： Ada Ada compilers code optimization program compilers programming environments programming environments programming tools software tools support tools

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IMPLEMENTATION OF A MASK VERIFICATION LANGUAGE AND ITS COMPILER

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IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1990年第3期137卷 207-217页

作者： BROWN, AD THOMAS, PR Electronics Department University of Southampton Southampton UK

The paper describes the design and philosophy of a mask verification language (MVL) and its compiler. Mask verification tools have to be programmable, because of the large software investment they require, and the speed at which fabrication technology changes. The language described here allows a designer to specify the topological structure of a device (the device description), and to attach to it a procedure to be executed when that device is recognised (the device procedure). The device procedure allows certain geometric qualifications to be placed on the structure. (The device description and procedure, taken together, form a device declaration.) In general, an MVL program will contain several device declarations: one for each realisable type of device of a technology. The description part of a declaration is asynchronous, and the procedural part, which is internally sequential, is executed once for each instance of the device description located on the mask set. Careful choice of the primitives provided allows extensive optimisation of the leaf operations involved, which is extremely important, given the usual size of the mask data-sets.

关键词： optimisation Electronic engineering computing VLSI program compilers topological structure circuit CAD asynchronous declaration high level languages High level languages mask verification language compiler Semiconductor integrated circuits geometric qualifications

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