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COMPUTER 1993年第12期26卷 46-52页

作者： WENBAN, AS OLEARY, JW BROWN, GM Sch. of Electr. Eng. Cornell Univ. Ithaca NY

The authors describe a hardware/software codesign system used for translating communication protocol specifications written in Promela, a high-level concurrent programming language, into implementations of custom hardware and software. The authors developed a single front end and two back ends for compiling Promela. The software back end translates a Promela program into C++. This code, along with additional code needed to support external hardware interfaces, can then be compiled into an executable version of the Promela specification. The hardware back end maps each Promela declaration, statement, and expression to a primitive element composed of combinational logic gates and flip-flops. It produces output in the form of a VHDL entity/architecture pair for simulation or an EDIF netlist view for transfer to commercial hardware CAD tools. A simple communication system serves as a design example for the authors' compilation tools. The system consists of a hardware process that creates a reliable channel by implementing the alternating-bit protocol over a pair of unreliable channels and a software process that sends a stream of data over that channel.

关键词： Promela alternating bit protocol codesign process communication protocols concurrent programming language hardware compiler logic design parallel languages program compilers protocols software compiler

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MDA: Revenge of the modelers or UML utopia?

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IEEE SOFTWARE 2004年第3期21卷 15-17页

作者： Thomas, D Carleton Univ Ottawa ON K1S 5B6 Canada Univ Queensland St Lucia Qld 4067 Australia

The OMG's Model Driven Architecture (MDA) is an ambitious effort to build programs from models using model transformations. The author believes that model-driven agile development is an effective software development practice, but he has concerns about the proposed MDA. Modeling is at the core of many disciplines, but it is especially important in engineering because it facilitates communication and constructs complex things from smaller object-oriented languages. Many have viewed software development as the development and refinement of models. Models facilitate the understanding, simulation, and emulation of the artifacts under development. Depending an model paradigms and cognitive styles, engineers express models using diagrams, structured text, and storyboards of one form or another. Software modelers depend on and use engineering analogies but often fail to understand them. Software engineering welcomed the OMG's intervention, just as other, more mature disciplines have welcomed similar interventions. The good in UML is that it provides a common and useful visual notation for describing many of the software artifacts used in modern object-oriented analysis, design, and development. INSET: Related Work..

关键词： object-oriented methods object-oriented programming program compilers software architecture specification languages MDA tool Model Driven Architecture UML domain specific language domain-oriented programming model engineering model-driven development pla object oriented programming programmable logic arrays Utopias SMDA Retaliation Model-driven development object orientation Software architecture UML compilers specification description language MDA(computers)

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Secrets of the Glasgow Haskell Compiler inliner

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JOURNAL OF FUNCTIONAL programMING 2002年第4-5期12卷 393-434页

作者： Jones, SP Marlow, S Microsoft Res Ltd Cambridge CB3 0FB England

Higher-order languages such as Haskell encourage the programmer to build abstractions by composing functions. A good compiler must inline many of these calls to recover an efficiently executable program. In principle, inlining is dead simple: just replace the call of a function by an instance of its body. But any compiler-writer will tell you that inlining is a black art, full of delicate compromises that work together to give good performance without unnecessary code bloat. The purpose of this paper is, therefore, to articulate the key lessons we learned from a full-scale "production" inliner, the one used in the Glasgow Haskell compiler. We focus mainly on the algorithmic aspects, but we also provide some indicative measurements to substantiate the importance of various aspects of the inliner.

关键词： program compilers

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APPROACHING A MACHINE-APPLICATION BOUND IN DELIVERED PERFORMANCE ON SCIENTIFIC CODE

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PROCEEDINGS OF THE IEEE 1993年第8期81卷 1166-1178页

作者： MANGIONESMITH, WH SHIH, TP ABRAHAM, SG DAVIDSON, ES UNIV MICHIGAN DEPT ELECT ENGN & COMP SCIADV COMP ARCHITECTURE LABANN ARBORMI 48109

We have developed a performance bounding methodology that explains the performance of loop-dominated scientific applications on particular systems. We model the throughput of key hardware units that are common bottlenecks in concurrent machines. The four units currently used are: memory interface, floating-point, instruction issue, and a ''dependence unit'' which is used to model the effects of performance-limiting recurrences. We propose a workload characterization, and derive upper bounds on the performance of specific machine-workload pairs. Comparing delivered performance with bounds focuses attention on areas for improvement and indicates how much improvement might be attainable. A detailed analysis and performance improvement effort for the IBM RS/6000, using the Livermore Fortran Kernels 1-12 to represent the target workload, produces an average lower bound of 1.27 clocks per floating-point operation (CPF), whereas machine peak performance is 0.5 CPF and the V2.01 Fortran compiler attains only 2.43 CPF. Code improvements in this study have achieved 1.36 CPF, increasing the harmonic mean steady-state inner loop performance to 97.6% of the MFLOPS bound. Subsequently, the V2.02 compiler achieved 1.75 CPF, and 1.60 with carefully chosen preprocessing. A goal-directed compiler with bound knowledge could produce higher performance code more efficiently and automatically. In general, achieved performance is also affected by cache misses and register spill code. Simple calibration loops are used to characterize cache performance. The register requirements are characterized as a function of the latency and bandwidth of memory and function units for application kernels that have tree structured dependence graphs.

关键词： CPF Fortran compiler IBM RS/6000 MFLOPS bound V2 01 V2 02 concurrent machines floating-point operation harmonic mean steady-state inner loop performance loop-dominated scientific applications machine peak performance machine-application bound machine-workload pairs natural sciences computing parallel machines performance bounding methodology performance evaluation preprocessing program compilers program testing scientific code workload characterization

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CODE OPTIMIZATION ACROSS PROCEDURES

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COMPUTER 1989年第2期22卷 42-50页

作者： RICHARDSON, S GANAPATHI, M STANFORD UNIV COMP SYST LABSTANFORDCA 94305

Procedure calls can be a major obstacle to the analysis of computer programs, preventing significant improvements in program speed. A broad range of techniques, each of which is in some sense interprocedural by nature, is considered to overcome this obstacle. Some techniques rely on interprocedural dataflow in their analysis. Others require interprocedural information in the form of detailed profile data or information concerning the scope of a given procedure in relation to other procedures. These include procedure integration, interprocedural register allocation, pointer and alias tracking, and dependency analysis

关键词： alias tracking code optimization compilers dependency analysis interprocedural dataflow interprocedural information interprocedural register allocation optimisation pointer tracking procedure integration profile data program compilers program speed program testing program testing storage allocation

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THE PARASCOPE PARALLEL programMING ENVIRONMENT

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PROCEEDINGS OF THE IEEE 1993年第2期81卷 244-263页

作者： COOPER, KD HALL, MW HOOD, RT KENNEDY, K MCKINLEY, KS MELLORCRUMMEY, JM TORCZON, L WARREN, SK STANFORD UNIV CTR INTEGRATED SYSTSTANFORDCA 94305 KUBOTA PACIFIC COMP INC SANTA CLARACA 95051 ROSETTA INC HOUSTONTX 77005 RICE UNIV CTR RES PARALLEL COMPHOUSTONTX 77251 UNIV TENNESSEE CTR RES PARALLEL TECHNOLKNOXVILLETN 37996 UNIV TENNESSEE CTR NSF SCI & TECHNOLKNOXVILLETN 37996 SYRACUSE UNIV CTR RES PARALLEL TECHNOLSYRACUSENY 13244 SYRACUSE UNIV CTR NSF SCI & TECHNOLSYRACUSENY 13244 RICE UNIV CTR NSF SCI & TECHNOLHOUSTONTX 77251 CALTECH CTR NSF SCI & TECHNOLPASADENACA 91125 CALTECH CTR RES PARALLEL COMPUTATPASADENACA 91125 LOS ALAMOS NATL LAB CTR NSF SCI & TECHNOLLOS ALAMOSNM 87544 LOS ALAMOS NATL LAB CTR RES PARALLEL COMPUTATLOS ALAMOSNM 87544 ARGONNE NATL LAB CTR NSF SCI & TECHNOLARGONNEIL 60439 ARGONNE NATL LAB CTR RES PARALLEL COMPUTATARGONNEIL 60439

The ParaScope parallel programming environment, developed to support scientific programming of shared-memory multiprocessors, includes a collection of tools that use global program analysis to help users develop and debug parallel programs. This paper focuses on ParaScope's compilation system, its parallel program editor, and its parallel debugging system. The compilation system extends the traditional single-procedure compiler by providing a mechanism for managing the compilation of complete programs. Thus, ParaScope can support both traditional single-procedure optimization and optimization across procedure boundaries. The ParaScope editor brings both compiler analysis and user expertise to bear on program parallelization. It assists the knowledgeable user by displaying and managing analysis and by providing a variety of interactive program transformations that are effective in exposing parallelism. The debugging system detects and reports timing-dependent errors, called data races, in execution of parallel programs. The system combines static analysis, program instrumentation, and run-time reporting to provide a mechanical system for isolating errors in parallel program executions. Finally, we describe a new project to extend ParaScope to support programming in Fortran D, a machine-independent parallel programming language intended for use with both distributed-memory and shared-memory parallel computers.

关键词： FORTRAN FORTRAN D ParaScope parallel programming environment compilation system data races debugging system distributed-memory parallel computers global program analysis machine-independent parallel programming language parallel programming program compilers program debugging programming environments scientific programming shared-memory multiprocessors shared-memory parallel computers timing-dependent errors user expertise

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javar: A prototype Java restructuring compiler

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CONCURRENCY-PRACTICE AND EXPERIENCE 1997年第11期9卷 1181-1191页

作者： Bik, AJC Villacis, JE Gannon, DB INDIANA UNIV DEPT COMP SCIBLOOMINGTONIN 47405

This paper describes the prototype restructuring compiler javar, which can be used to make implicit parallelism in a Java program explicit by means of multi-threading. Although the prototype does not provide a complete Java front-end (unicode escapes are not supported and only limited semantic analysis has been implemented) and relies completely on the identification of 'implicit' parallelism by means of annotations, we hope that the research tool still provides sufficient functionality to make the parallelization of Java programs less complex and less error-prone, (C) 1997 John Wiley & Sons, Ltd.

关键词： program compilers

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Computer games software factory and edutainment platform or Microsoft .NET

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IET SOFTWARE 2007年第6期1卷 280-293页

作者： Furtado, A. W. B. Santos, A. L. M. Ramalho, G. L. Univ Fed Pernambuco Ctr Informat BR-50740540 Recife PE Brazil

An environment targeted at computer games development industrialisation in the NET platform is presented. A computer game product line definition and its architecture are specified and implemented by means of software factory assets, such as a visual designer based on a domain-specific language, semantic validators and code generators. The proposed approach is then illustrated and empirically validated by the creation of real world case studies. Finally, it is investigated how the proposed factory can be used as an edutainment platform for Computer Science I and 2 courses. The final intention is to empower game developers and designers to work more productively, with a higher level of abstraction and closer to their application domain.

关键词： Computer games computer games development visual designer compilers, interpreters and other processors computer science courses program compilers computer games code generators computer games software factory Software engineering techniques domain- specific language Microsoft .NET software engineering edutainment platform semantic validators

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Do you trust your compiler?

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COMPUTER 1999年第5期32卷 65-+页

作者： Boyle, JM Resler, RA Winter, VL Argonne Natl Lab Argonne IL 60439 USA Virginia Commonwealth Univ Richmond VA USA Sandia Natl Labs Livermore CA 94550 USA

As our society becomes more technologically complex, computer systems are finding an alarming number of uses in safety-critical applications. In many such systems, the software component's reliability is essential to the system's safe operation, so it becomes natural to ask, "How can software be made to behave correctly when executed?" Using program transformations to produce trusted software simplifies verification. program transformations use proven laws to manipulate programs in a manner analogous to algebraic transformations. The authors have sketched how a formal method based on program transformations can be used to construct a verified compiler. Such a compiler has been proved to correctly compile any correct program into assembly language. While the compiler itself may not execute efficiently-after all, you need only use the verified compiler the last time you compile a program-the transformational approach should enable the verified compiler to produce efficient assembly code.

关键词： assembly language assembly language compiler verification formal method program compiler program compilers program transformations program verification safety-critical applications software component software reliability software reliability

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SCALAR SUPERCOMPUTER ARCHITECTURE

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PROCEEDINGS OF THE IEEE 1989年第12期77卷 1970-1982页

作者： WEISS, S Dept. of Comput. Sci. Maryland Univ. Baltimore MD

High-performance scalar architectures that have the capability to issue multiple instructions per clock period are considered. The essential characteristics and the principal architectural tradeoffs in scientific array processors, very-long-instruction-word (VLIW) machines, the polycyclic architecture and decoupled computers are examined. Array processors rely solely on static code scheduling done manually or by the compiler. The scheduling task is quite complex, and the resulting code may not be very efficient. In a VLIW, sophisticated compiler technology provides software solutions for functions traditionally done in hardware. The polycyclic architecture is similar to array processors in its structure but provides architectural support to the instruction scheduling task. In decoupled architectures the hardware changes the order of instruction execution at run time. This dynamic code scheduling capability does not come at the expense of additional control complexity

关键词： VLIW machines architectural tradeoffs array processors compiler decoupled architectures decoupled computers dynamic code scheduling horizontal architecture instruction scheduling mainframes multiple instructions per clock period parallel machines polycyclic architecture program compilers scalar supercomputer architecture scheduling scientific array processors static code scheduling streamlined scalar architecture supervisory programs very long instruction word machines

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