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检索条件"主题词=Programmable Logic Arrays"

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Rapid design implementation with field-programmable gate arrays

Rapid design implementation with field-programmable gate arr...

引用

IEEE Compcon

作者： S.W. Beal Actel Corporation Sunnyvale CA USA

A description is given of system design and implementation using desktop-programmable, user-configurable gate arrays. The device's innovative antifuse architecture provides the density and performance benefits of a masked gate array. Implementing a 2901 bit-slice processor using the Actel ACT 1010 and the Action logic System is also discussed.< >

关键词： Field programmable gate arrays logic devices programmable logic arrays logic design Costs logic arrays programmable logic devices CMOS logic circuits Routing Integrated circuit interconnections

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Image morphological operations by neural circuits

Image morphological operations by neural circuits

引用

IEEE International Symposium on Circuits and Systems (ISCAS)

作者： F.Y. Shih J. Moh Department of Computer and Information Science New Jersey Institute of Technology Newark NJ USA

An approach to implementing neural computing with Boolean programmable logic is presented. A technique for the implementation of image morphological operations using a neural architecture is developed. Image morphological operations, by their very nature, involve repeated computations over large data structures. Parallelism appears to be a necessary attribute of a hardware system which can efficiently perform such image analysis tasks.< >

关键词： Morphological operations Circuits Boolean functions programmable logic arrays programmable logic devices Computer architecture Data structures Parallel processing Hardware Image analysis

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Parallel Decomposition in logic Synthesis

Parallel Decomposition in Logic Synthesis

引用

European Conference on Solid-State Circuits (ESSCIRC)

作者： Krzysztof Jasinski Tadeusz kuba Jerzy Kalinowski Institute of Telecommunications Warsaw University of Technology Warszawa Poland Warsaw University of Technology Institute of Telecommunications Nowowiejska 15/19 00-665 Warszawa Poland Politechnika Warszawska Warszawa PL

In this paper a new approach to logic synthesis in VLSI design, based on parallel decomposition, is proposed. The idea is to use an effective method for multiple-output function reduction to select a decomposition that yields minimal silicon area in the final implementation. Experimental results and assessment of this synthesis method are provided.

关键词： Input variables programmable logic arrays logic design Boolean functions Silicon Very large scale integration logic devices logic gates Minimization Decoding

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Prime and non-prime implicants in the minimization of multiple-valued logic functions

Prime and non-prime implicants in the minimization of multip...

引用

International Symposium on Multiple-Valued logic

作者： P.P. Tirumalai J.T. Butler Hewlett Packard Company Santa Clara CA USA Department of Electrical and Computer Engineering Naval Postgraduate School Monterrey CA USA

Minimal sum-of-products expressions for multiple-valued logic functions for realization by programmable logic arrays are investigated. The focus is on expressions where product terms consist of the MIN of interval literals on input variables and are combined using one of two operations, SUM or MAX. In binary logic, the question of whether or not prime implicants are sufficient to realize all functions optimally has been answered in the affirmative. The same question is considered for higher radix functions. When the combining operation is MAX, prime implicants are sufficient. However, it is shown that this is not the case with SUM. It is also shown that all functions cannot be optimally realized by successively selecting implicants that are prime with respect to the intermediate functions. In fact, the number of implicants in a solution using prime implicants successively can be significantly larger than the number of implicants in a minimal solution.< >

关键词： Minimization logic functions programmable logic arrays Input variables logic design Integrated circuit technology logic circuits Integrated circuit synthesis Ducts

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Comprehensive evaluation of a two-dimensional configurable array

Comprehensive evaluation of a two-dimensional configurable a...

引用

International Symposium on Fault-Tolerant Computing (FTCS)

作者： O. Menzilcioglu H.T. Kung S.W. Song School of Computer Science Carnegie Mellon University Pittsburgh PA USA Institute of Statistics and Mathematics University of São Paulo Sao Paulo Brazil

An evaluation is presented of a highly configurable architecture for two-dimensional arrays of powerful processors. The evaluation is based on an array of Warp cells and uses real application programs. The evaluation covers the areas of configurability, array survivability, and performance degradation. The software and algorithms developed for the evaluation are also discussed. The results based on simulations of small and medium size arrays (up to 16*16) show that a high degree of configurability and array survivability can be achieved with little impact on program performance.< >

关键词： Switches Computer architecture programmable logic arrays Degradation Computer science Manufacturing processes Application software Software algorithms Very large scale integration Fabrication

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An algorithm for the optimization of channel definition using global routing information

An algorithm for the optimization of channel definition usin...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： V.S. Bobba W.T. Russell Corporate Design Automation National Semiconductor Corporation Santa Clara CA USA

An algorithm is developed to optimize the channel models used by many of the existing channel routers for block layout. Optimization is performed by considering the global routing information at the channel intersection points. An explanation is given of the motivational aspects behind the development of the proposed method and its use in resolving the bottleneck issues that are encountered during the channel definition phase.< >

关键词： Routing Integrated circuit interconnections Design automation Design optimization Design methodology Read only memory programmable logic arrays Geometry Compaction

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DIII-D F-coil chopper selection, control and fault recognition system

DIII-D F-coil chopper selection, control and fault recogniti...

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IEEE/NPSS Symposium on Fusion Engineering

作者： B.L. Burley T.L. Smith General Atomics San Diego CA USA

The DIII-D fusion experiment uses 18 field-shaping coils (F-coils) to control the position and shape of a plasma discharge. The DIII-D F-coils are powered and controlled by configuring single or parallel operation of up to 50 modular, 3-kA, 3-kHz, 2-quadrant-switching power supplies (choppers) and nine DC power supplies. The DC power supplies provide the raw power for the choppers while the choppers control the current in the F-coils. The chopper selection, control, and fault-recognition system uses state-of-the-art computer bus switching networks and programmable array logic (PAL) circuitry. The chopper selection and control system uses the computer bus switching networks to select individual chopper controls for a specific F-coil. A fault system capable of managing over 100 faults was developed using flexible PAL circuitry programmed for the application. The fault system identifies the first fault to occur and takes appropriate action for controlled safe termination of a shot. Additional faults are flagged and new responses taken if required.< >

关键词： Choppers Circuit faults Control systems Power supplies Shape control Data buses programmable logic arrays Coils Plasmas Switching circuits

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NOVA: State Assignment of Finite State Machines for Optimal Two-Level logic Implementations

NOVA: State Assignment of Finite State Machines for Optimal ...

引用

Design Automation Conference

作者： T. Villa A. Sangiovanni-Vincentelli Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA

The problem of encoding the states of a synchronous Finite State Machine (FSM), so that the area of a two-level implementation of the combinational logic is minimized, is addressed. As in previous approaches, the problem is reduced to the solution of the combinatorial optimization problems defined by the translation of the cover obtained by a multiple-valued logic minimization or by a symbolic minimization into a compatible boolean representation. In this paper we present algorithms for their solution, based on a new theoretical framework that offers advantages over previous approaches to develop effective heuristics. The algorithms are part of NOVA, a program for optimal encoding of control logic. Final areas averaging 20% less than other state assignment programs and 30% less than the best random solutions have been obtained. Literal counts averaging 30% less than the best random solutions have been obtained.

关键词： Automata programmable logic arrays Minimization Encoding Permission Sequential circuits logic design logic arrays Boolean functions Heuristic algorithms

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Automation of reciprocating gas engine compressor packages using programmable logic controllers

Automation of reciprocating gas engine compressor packages u...

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Industrial Applications Society Annual Conference on Petroleum and Chemical Industry

作者： W.H. Goff ARCO Oil and Gas Company Dallas TX USA

An approach taken to automate gas-engine/compressor skid-mounted packages is described. Design criteria and special considerations relating to the application of programmable logic controllers (PLCs) are discussed. Using typical industry standard specifications along with I/O lists, sequence narratives, and logic diagrams, the PLCs can be programmed to perform the desired operation. The added capabilities of the PLC enhance simulation, checkout, and startup. The presentation is based on experience gained from the installation of three reciprocating engine/compressor packages on remote unmanned platforms in the Gulf of Mexico.< >

关键词： Automation Engines programmable logic arrays programmable logic devices programmable control Automatic control Valves Packaging machines Control systems Switches

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A fully abstract semantics for a functional language with logic variables

A fully abstract semantics for a functional language with lo...

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Annual Symposium on logic in Computer Science

作者： R. Jagadeesan P. Panangaden K. Pingali Computer Science Department Cornell University USA

There is much interest in the declarative languages community in integrating logic variables into functional languages. The authors give a full semantic account of such a language. They present a Plotkin-style operational semantics for the language and an abstract semantics that expresses meanings as closure operators on a Scott domain. They also show that the denotational semantics is fully abstract with respect to the operational semantics.< >

关键词： logic arrays programmable logic arrays logic programming Computer science Interleaved codes Yarn logic design Equations Writing

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