咨询与建议

限定检索结果

文献类型

  • 3,664 篇 会议
  • 775 篇 期刊文献

馆藏范围

  • 4,439 篇 电子文献
  • 0 种 纸本馆藏

日期分布

学科分类号

  • 1,149 篇 工学
    • 657 篇 电气工程
    • 362 篇 计算机科学与技术...
    • 154 篇 电子科学与技术(可...
    • 149 篇 材料科学与工程(可...
    • 129 篇 信息与通信工程
    • 80 篇 软件工程
    • 79 篇 化学工程与技术
    • 78 篇 控制科学与工程
    • 68 篇 仪器科学与技术
    • 39 篇 核科学与技术
    • 33 篇 机械工程
    • 27 篇 生物医学工程(可授...
    • 11 篇 测绘科学与技术
    • 11 篇 生物工程
    • 10 篇 网络空间安全
    • 8 篇 石油与天然气工程
    • 8 篇 环境科学与工程(可...
    • 7 篇 光学工程
    • 7 篇 动力工程及工程热...
  • 251 篇 理学
    • 109 篇 化学
    • 80 篇 物理学
    • 38 篇 生物学
    • 23 篇 系统科学
  • 68 篇 医学
    • 43 篇 临床医学
    • 15 篇 基础医学(可授医学...
    • 9 篇 药学(可授医学、理...
  • 47 篇 管理学
    • 35 篇 管理科学与工程(可...
  • 21 篇 农学
    • 8 篇 农业资源与环境
  • 15 篇 教育学
    • 14 篇 教育学
  • 13 篇 文学
    • 12 篇 新闻传播学
  • 3 篇 艺术学
  • 2 篇 军事学
  • 1 篇 经济学
  • 1 篇 法学

主题

  • 4,439 篇 programmable log...
  • 1,072 篇 field programmab...
  • 530 篇 programmable log...
  • 476 篇 hardware
  • 473 篇 logic devices
  • 438 篇 logic design
  • 399 篇 logic arrays
  • 335 篇 very large scale...
  • 308 篇 logic circuits
  • 302 篇 routing
  • 298 篇 computer archite...
  • 291 篇 circuit testing
  • 277 篇 costs
  • 275 篇 logic testing
  • 247 篇 switches
  • 218 篇 computer science
  • 211 篇 circuit synthesi...
  • 204 篇 table lookup
  • 201 篇 boolean function...
  • 200 篇 reconfigurable l...

机构

  • 36 篇 institute of com...
  • 31 篇 institute of com...
  • 29 篇 xilinx inc. san ...
  • 23 篇 people''s libera...
  • 21 篇 department of el...
  • 18 篇 school of electr...
  • 17 篇 institute of com...
  • 16 篇 altera corporati...
  • 13 篇 ibm thomas j. wa...
  • 12 篇 philips research...
  • 12 篇 actel corporatio...
  • 12 篇 logic vision inc...
  • 11 篇 department of co...
  • 10 篇 institute of tel...
  • 9 篇 department of el...
  • 9 篇 department of el...
  • 9 篇 department of el...
  • 9 篇 at and t bell la...
  • 9 篇 institute of met...
  • 8 篇 intel corporatio...

作者

  • 19 篇 m. renovell
  • 15 篇 m.a. perkowski
  • 14 篇 f. lombardi
  • 14 篇 r.k. brayton
  • 12 篇 y. zorian
  • 12 篇 ming chen
  • 12 篇 xie ning
  • 12 篇 a. sangiovanni-v...
  • 12 篇 jianjiang lu
  • 12 篇 g. van der plas
  • 12 篇 b.j. falkowski
  • 10 篇 t. sasao
  • 10 篇 j. rose
  • 9 篇 c.l. liu
  • 9 篇 c. stroud
  • 9 篇 f. pla
  • 9 篇 s.j.e. wilton
  • 9 篇 j.m. portal
  • 9 篇 j. figueras
  • 9 篇 a.r. newton

语言

  • 4,330 篇 英文
  • 81 篇 其他
  • 27 篇 中文
  • 1 篇 土耳其文
检索条件"主题词=Programmable Logic Arrays"
4439 条 记 录,以下是4051-4060 订阅
排序:
A 2500 gate programmable logic device with subdivisable macrocells
A 2500 gate programmable logic device with subdivisable macr...
收藏 引用
Custom Integrated Circuits Conference (CICC)
作者: K.H. Gudger G.S. Gongwer ATMEL Corporation San Jose CA USA
A 2500-gate programmable logic device with a 25-ns typical propagation delay is described. This CMOS EPROM device has less than 50-mW power dissipation. Its simple, regular architecture is supported by industry-standa... 详细信息
来源: 评论
Splicer: a heuristic approach to connectivity binding
Splicer: a heuristic approach to connectivity binding
收藏 引用
Design Automation Conference
作者: B.M. Pangrle Department of Electrical and Computer Engineering University of California Santa Barbara CA USA
A tool is described for constructing the connectivity between components given a state graph into which the components are to be mapped. Examples taken from previous papers in the field are used to demonstrate this co... 详细信息
来源: 评论
A structured, automated design procedure for systems integration sequential logic
A structured, automated design procedure for systems integra...
收藏 引用
Conference Record of the IEEE Industry Applications Society Annual Meeting (IAS)
作者: R.D. Lorenz M.B. Eberlein Department of Mechanical Engineering and Department of Electrical & Computer Engineering University of Wisconsin Madison Madison WI USA Manufacturing Systems Engineering University of Wisconsin Madison Madison WI USA
A structured design procedure for systems integration sequential logic which is to be implemented on programmable logic controllers is presented. The procedure offers the advantages of producing intrinsically robust s... 详细信息
来源: 评论
PLA optimization using output encoding
PLA optimization using output encoding
收藏 引用
IEEE International Conference on Computer-Aided Design
作者: A. Saldanha R.H. Katz Computer Science Division EECS Department University of California Berkeley CA USA
An automatic tool that heuristically determines a good partitioning of a single large programmable logic array (PLA) into a PLA with a smaller number of encoded outputs (and usually fewer product terms), followed by a... 详细信息
来源: 评论
Boolean decomposition in multi-level logic optimization
Boolean decomposition in multi-level logic optimization
收藏 引用
IEEE International Conference on Computer-Aided Design
作者: S. Devadas A.R. Wang A.R. Newton A. Sangiovanni-Vincentelli Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology USA Department of Electrical Engineering and Computer Science University of California Berkeley USA
Multiple-valued Boolean minimization is proposed as a technique for identifying and extracting good Boolean factors which can be used as strong divisors to minimize the literal count and the area of a multilevel logic... 详细信息
来源: 评论
Controller Order Reduction with Guaranteed Stability and Performance
Controller Order Reduction with Guaranteed Stability and Per...
收藏 引用
American Control Conference (ACC)
作者: Kathryn E. Lenz Pramod P. Khargonekar John C. Doyle Honeywell Systems and Research Center and California Institute of Technology University of Minnesota USA
来源: 评论
On The Motion Of General Two-link Robot Arm Manipulators In An Unexplored Environment
On The Motion Of General Two-link Robot Arm Manipulators In ...
收藏 引用
IEEE International Conference on Systems, Man and Cybernetics
作者: Kang Sun V. Lumelsky Department of Electrical Engineering Yale University New Heaven CT USA
Until recently, the problem of path planning for a robot arm operating among unknown obstacles has been treated on a case-by-case basis with different algorithms for different arm kinematics. A unified theoretical fra... 详细信息
来源: 评论
A methodology for the test of embedded compiled cells
A methodology for the test of embedded compiled cells
收藏 引用
Custom Integrated Circuits Conference (CICC)
作者: M.A. Samad T. Butzerin VLSI Technology Inc. San Jose CA USA
The use of compilers for structured cells such as RAMs, ROMs, multipliers and PLAs (programmable logic arrays) has become widespread in the design of application-specific integrated circuits (ASICs). The authors prese... 详细信息
来源: 评论
An algorithmic branch and bound method for PLA test pattern generation
An algorithmic branch and bound method for PLA test pattern ...
收藏 引用
IEEE International Test Conference
作者: M. Robinson J. Rajski Department of Electrical Engineering McGill University Montreal Canada
A method for PLA (programmable logic-array) test-pattern generation based on a branch-and-bound algorithm that function monotonicity is presented. The algorithm makes irrevocable input assignments first, resulting in ... 详细信息
来源: 评论
Parallel logic/fault simulation of VLSI array logic
Parallel logic/fault simulation of VLSI array logic
收藏 引用
IEEE International Conference on Computer-Aided Design
作者: P. Bose IBM Thomas J. Watson Research Center Yorktown Heights NY USA
Current techniques in logic/fault simulation treat the problem as a nonnumeric one in which the basic primitives involved are Boolean operations, string matching/manipulation operations, bitwise or wordwise comparison... 详细信息
来源: 评论