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检索条件"主题词=Programmable Logic Arrays"
4439 条 记 录,以下是4061-4070 订阅
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Evolvable building blocks for analog fuzzy logic controllers
Evolvable building blocks for analog fuzzy logic controllers
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NASA/DoD Workshop on Evolvable Hardware
作者: J.F. Amaral J.L. Amaral C. Santini R. Tanscheit M. Vellasco M. Pacheco A. Mesquita Electronics Engineering Department University of State of Rio de Janeiro Rio de Janeiro Rio de Janeiro Brazil ICA : Computational Intelligence Laboratory Electrical Engineering Department PUC-Rio-Catholic University of Rio de Janeiro Rio de Janeiro Rio de Janeiro Brazil Electrical Engineering Department Federal University of Rio de Janeiro (COPPE-EE) Rio de Janeiro Rio de Janeiro Brazil
This work discusses the use of an evolvable hardware (EHW) platform in the synthesis of analog electronic circuits for fuzzy logic controllers. A fuzzy logic controller (FLC) is defined by a collection of fuzzy if-the... 详细信息
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Computer-based diagnostics for integrated manufacturing systems
Computer-based diagnostics for integrated manufacturing syst...
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International Conference on Computer Integrated Manufacturing
作者: J.H. Graham S.M. Alexander Speed Scientific School University of Louisville Louisville KY USA
Results of a research project which focused on the efficient detection and diagnosis of process faults in integrated manufacturing systems are described. This project attempted to investigate theoretical advancements ... 详细信息
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Synthesis of multi-variable MVL functions using hybrid mode CMOS logic
Synthesis of multi-variable MVL functions using hybrid mode ...
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International Symposium on Multiple-Valued logic
作者: Yeong-Jar Chang Chung Len Lee Department of Electronics Engineering & Institute of Electronics National Chiao Tung University Hsinchu Taiwan
This paper presents a new scheme for synthesizing any multi-variable MVL (Multi-Valued logic) function. The scheme utilizes a hybrid approach, i.e. a combination of the current mode and the voltage mode CMOS circuits,... 详细信息
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Advanced Encryption Standard-128 bit Design Flow for ZYNQ-7 ZC702 Evaluation Board
Advanced Encryption Standard-128 bit Design Flow for ZYNQ-7 ...
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Artificial Intelligence and Smart Systems (ICAIS), International Conference on
作者: B. Muthu Nisha V. Nithya J. Selvakumar Department of ECE SRM Institute of Science and Technology Kattankulathur India
The study of cryptography techniques on Field programmable Gate Array needs extensive research attention. Evaluation Boards is one such area of hardware security measures. An encryption algorithm must be developed on ... 详细信息
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Temporal evolution of the two-shock implosion on the National Ignition Facility
Temporal evolution of the two-shock implosion on the Nationa...
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IEEE International Conference on Plasma Science (ICOPS)
作者: T. Ma S. MacLaren J. Salmonson S. Khan J. Pino J. Ralph R. Rygg J. Field R. Tommasini D. Turnbull A. Mackinnon K. Baker L. R. Benedetti P. Celliers E. Dewald T. Dittrich L. Berzak Hopkins N. Izumi P. Kervin S. Nagel A. Pak R. Tipton G. Kyrala J. Kline Lawrence Livermore National Laboratory Livermore CA US Los Alamos National Laboratory Los Alamos NM US
Summary form only given. The HED 2-Shock implosion campaign was developed on the National Ignition Facility as a relatively robust and well-beha ved nearly one-dimensional, low convergence, symmetric platform by emplo... 详细信息
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A reconfigurable data path processor
A reconfigurable data path processor
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Annual IEEE International Conference and Exhibit ASIC
作者: G. Maki S. Whitaker G. Ganesh NASA Space Engineering Research Center of VLSI System Design University of Idaho Moscow ID USA
A configurable data path processor is presented which can be modified to optimize performance. FPGA, PLA and PAL devices provide a great amount of flexibility to realize arbitrary control functions. The new processor ... 详细信息
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Implementation of hardware structures through configurable logic
Implementation of hardware structures through configurable l...
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EUROMICRO Conference
作者: J. Knopman E.S.T. Fernandes A.C. Mesquita Federal University of Rio de Janeiro Rio de Janeiro Brazil
This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "arr... 详细信息
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Research on Network Operation Complexity Model and its Application
Research on Network Operation Complexity Model and its Appli...
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International Conference on Signal Processing Systems, ICSPS
作者: Feng Han Jian-xin Wang Gang Xiao Kun Xu Institute of Command Automation People''s Liberation Army University of Science and Technology Nanjing China The Institute of the Chinese Electronic Equipment System Engineering Company Beijing China
Network operation complexity model is proposed in this paper. This model includes nested system model, operation process model and quantitative indicator model. Then, a normalization treatment method of indicator data... 详细信息
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FPGA implementation of the BH8000 wormhole router
FPGA implementation of the BH8000 wormhole router
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Annual IEEE International Conference and Exhibit ASIC
作者: K.S. Perianayagam S.G. Gopalan A.P. Vinayagam Centre for Development of Advanced Computing Bangalore India
A Xilinx FPGA was chosen for prototyping a self-timed message routing device. The authors' experience in implementing an asynchronous design on an FPGA, which like most other programmable logic is optimised for sy... 详细信息
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Document presence notification services for collaborative writing
Document presence notification services for collaborative wr...
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International Workshop on Groupware
作者: A.L. Moran J. Favela A.M. Martinez D. Decouchant UABC Ensenada Mexico INPG Grenoble France CICESE Ensenada Baja California Mexico CINVESTAV Mexico
Instant messaging applications that convey presence awareness are quickly becoming some of the most popular groupware applications. They support lightweight and intermittent interactions that allow users to quickly mo... 详细信息
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