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检索条件"主题词=Programmable Logic Arrays"

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Evolvable building blocks for analog fuzzy logic controllers

Evolvable building blocks for analog fuzzy logic controllers

引用

NASA/DoD Workshop on Evolvable Hardware

作者： J.F. Amaral J.L. Amaral C. Santini R. Tanscheit M. Vellasco M. Pacheco A. Mesquita Electronics Engineering Department University of State of Rio de Janeiro Rio de Janeiro Rio de Janeiro Brazil ICA : Computational Intelligence Laboratory Electrical Engineering Department PUC-Rio-Catholic University of Rio de Janeiro Rio de Janeiro Rio de Janeiro Brazil Electrical Engineering Department Federal University of Rio de Janeiro (COPPE-EE) Rio de Janeiro Rio de Janeiro Brazil

This work discusses the use of an evolvable hardware (EHW) platform in the synthesis of analog electronic circuits for fuzzy logic controllers. A fuzzy logic controller (FLC) is defined by a collection of fuzzy if-then rules and a set of membership functions characterizing the linguistic terms associated with the inputs and output of the FLC. The EHW analog platform, named PAMA-NG (programmable analog multiplexer array - next generation), is a reconfigurable platform that consists of integrated circuits whose internal connections can be programmed by evolutionary computation techniques, such as genetic algorithms, to synthesize circuits. The PAMA-NG is classified as a field programmable analog array (FPAA). FPAAs have appeared recently and constitute the state of the art in the technology of reconfigurable platforms. These devices will become the building blocks of a forthcoming class of hardware, with the important features of self-adaptation and self-repairing, through automatic reconfiguration. This article focuses on the development of building blocks for analog FLCs on the PAMA-NG and presents case studies.

关键词： Fuzzy logic Field programmable analog arrays Hardware Integrated circuit synthesis Circuit synthesis Electronic circuits Fuzzy control Fuzzy sets Multiplexing programmable logic arrays

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Computer-based diagnostics for integrated manufacturing systems

Computer-based diagnostics for integrated manufacturing syst...

引用

International Conference on Computer Integrated Manufacturing

作者： J.H. Graham S.M. Alexander Speed Scientific School University of Louisville Louisville KY USA

Results of a research project which focused on the efficient detection and diagnosis of process faults in integrated manufacturing systems are described. This project attempted to investigate theoretical advancements in the development of a hybrid reasoning scheme for manufacturing diagnostics and to pursue applications to actual manufacturing diagnostic problems. The final implementation goal is a stand-alone computer-based diagnostic workstation which can interact with a programmable logic controller to give diagnostic advice to operating and maintenance personnel. An initial implementation of the diagnostics system has been created using an object-oriented knowledge-engineering environment on a Symbolics 3640 workstation.< >

关键词： Computer aided manufacturing Integrated manufacturing systems Workstations Fault diagnosis Costs Humans Fault detection Manufacturing systems Application software programmable logic arrays

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Synthesis of multi-variable MVL functions using hybrid mode CMOS logic

Synthesis of multi-variable MVL functions using hybrid mode ...

引用

International Symposium on Multiple-Valued logic

作者： Yeong-Jar Chang Chung Len Lee Department of Electronics Engineering & Institute of Electronics National Chiao Tung University Hsinchu Taiwan

ISBN: (纸本)0818656506

This paper presents a new scheme for synthesizing any multi-variable MVL (Multi-Valued logic) function. The scheme utilizes a hybrid approach, i.e. a combination of the current mode and the voltage mode CMOS circuits, to synthesize MVL functions. Due to better utilization of circuit components, it can reduce the transistor count (cost) of the synthesized circuits about one half as compared with those using the MIN-MAX gates and literals or the T-gates. Also, an extra noise margin added in the design eliminates the need of the threshold detection circuit to recover the signal in this scheme.< >

关键词： CMOS logic circuits Circuit synthesis Multivalued logic Voltage CMOS process Costs Circuit noise CMOS technology programmable logic arrays Charge coupled devices

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Advanced Encryption Standard-128 bit Design Flow for ZYNQ-7 ZC702 Evaluation Board

Advanced Encryption Standard-128 bit Design Flow for ZYNQ-7 ...

引用

Artificial Intelligence and Smart Systems (ICAIS), International Conference on

作者： B. Muthu Nisha V. Nithya J. Selvakumar Department of ECE SRM Institute of Science and Technology Kattankulathur India

The study of cryptography techniques on Field programmable Gate Array needs extensive research attention. Evaluation Boards is one such area of hardware security measures. An encryption algorithm must be developed on a specific family board. The Advanced Encryption Standard 128-bit algorithm is proposed in this study for the ZYNQ family board. Particularly, the ZYNQ-7 ZC702 Evaluation Board. Then, its parameters are appropriate for top-down encryption algorithms. The results of the algorithm are generated as reports on Register Transfer logic (RTL) and look-up table usage. This study provides recommendations for the future in terms of data security on hardware.

关键词： Atmospheric measurements programmable logic arrays logic gates Particle measurements Encryption Table lookup Registers

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Temporal evolution of the two-shock implosion on the National Ignition Facility

Temporal evolution of the two-shock implosion on the Nationa...

引用

IEEE International Conference on Plasma Science (ICOPS)

作者： T. Ma S. MacLaren J. Salmonson S. Khan J. Pino J. Ralph R. Rygg J. Field R. Tommasini D. Turnbull A. Mackinnon K. Baker L. R. Benedetti P. Celliers E. Dewald T. Dittrich L. Berzak Hopkins N. Izumi P. Kervin S. Nagel A. Pak R. Tipton G. Kyrala J. Kline Lawrence Livermore National Laboratory Livermore CA US Los Alamos National Laboratory Los Alamos NM US

ISBN: (纸本)9781467396028

Summary form only given. The HED 2-Shock implosion campaign was developed on the National Ignition Facility as a relatively robust and well-beha ved nearly one-dimensional, low convergence, symmetric platform by employing a very high foot temperature and a large case-to-capsule (hohlraum-to-capsule) ratio. The results of these experiments investigating capsule implosion phenomena such as interface hydrodynamic mixing, convergence effects, and shape effects are being used for the validation of hydro-c odes and to develop a systematic understanding of performance degradation mechanisms. A sequence of experiments was initially completed to tune the 2-Shock implosion round, with little shape swing from in-flight to stagnation. Then, hohlraum size and hohlraum gas fill were systematically changed to study the effect on shape and symmetry evolution. Details and results of these experiments are described.

关键词： Shape Ignition Convergence Robustness programmable logic arrays Hydrodynamics Systematics

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A reconfigurable data path processor

A reconfigurable data path processor

引用

Annual IEEE International Conference and Exhibit ASIC

作者： G. Maki S. Whitaker G. Ganesh NASA Space Engineering Research Center of VLSI System Design University of Idaho Moscow ID USA

A configurable data path processor is presented which can be modified to optimize performance. FPGA, PLA and PAL devices provide a great amount of flexibility to realize arbitrary control functions. The new processor ... 详细信息

关键词： Field programmable gate arrays logic devices programmable logic arrays Reconfigurable logic Hardware Computer architecture Process design logic design programmable control logic circuits

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Implementation of hardware structures through configurable logic

Implementation of hardware structures through configurable l...

引用

EUROMICRO Conference

作者： J. Knopman E.S.T. Fernandes A.C. Mesquita Federal University of Rio de Janeiro Rio de Janeiro Brazil

This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. Known as "array of configurable logic cells", this RAM-based FPGA offers many research opportunities in the Computer Architecture area. The paper presents the design of an array of programmable devices, the mapping process of basic Architecture Structures onto the array: and the current stage of the project.< >

关键词： Hardware programmable logic arrays logic devices logic arrays Data structures Computer architecture Application software Field programmable gate arrays Read-write memory Programming profession

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Research on Network Operation Complexity Model and its Application

Research on Network Operation Complexity Model and its Appli...

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International Conference on Signal Processing Systems, ICSPS

作者： Feng Han Jian-xin Wang Gang Xiao Kun Xu Institute of Command Automation People''s Liberation Army University of Science and Technology Nanjing China The Institute of the Chinese Electronic Equipment System Engineering Company Beijing China

Network operation complexity model is proposed in this paper. This model includes nested system model, operation process model and quantitative indicator model. Then, a normalization treatment method of indicator data is put forward. After constructing a network system in the laboratory, we apply the model to the operation process of network and obtain complexity indicator value through measuring process. Finally, we can then find out which indicator has the most influence for the network operation complexity, as well as hot-shot through analyzing and comparing indicator data. This model and measurement in favor of adopting methods to reduce complexity and decrease cost.

关键词： Containers Costs Automation programmable logic arrays Electronic equipment Systems engineering and theory Hardware Operating systems Software maintenance Signal processing

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FPGA implementation of the BH8000 wormhole router

FPGA implementation of the BH8000 wormhole router

引用

Annual IEEE International Conference and Exhibit ASIC

作者： K.S. Perianayagam S.G. Gopalan A.P. Vinayagam Centre for Development of Advanced Computing Bangalore India

A Xilinx FPGA was chosen for prototyping a self-timed message routing device. The authors' experience in implementing an asynchronous design on an FPGA, which like most other programmable logic is optimised for synchronous designs, is described. The manual intervention needed at various stages of design implementation is discussed. Debugging and performance issues are looked at and some modifications to the FPGA architecture are suggested.< >

关键词： Field programmable gate arrays Prototypes Routing Application specific integrated circuits logic design Debugging logic testing programmable logic arrays programmable logic devices Design optimization

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Document presence notification services for collaborative writing

Document presence notification services for collaborative wr...

引用

International Workshop on Groupware

作者： A.L. Moran J. Favela A.M. Martinez D. Decouchant UABC Ensenada Mexico INPG Grenoble France CICESE Ensenada Baja California Mexico CINVESTAV Mexico

Instant messaging applications that convey presence awareness are quickly becoming some of the most popular groupware applications. They support lightweight and intermittent interactions that allow users to quickly move between a personal and a collective space, thus blurring the traditional distinction between synchronous and asynchronous systems. Often, however, the focus of collaboration is not another person, but a shared resource that is being produced in collaboration. Thus, rather than being interested in the presence and status of a collaborator, our main interest might be whether a given document is now available for one to read or review, or if such resource has changed since it was last visited. In this paper we describe Doc2U, a system that provides presence awareness of resources stored in the Web. We describe use scenarios that motivated its development and its current implementation as an extended service of a Web server. The tool forms part of the services currently being developed to support collaborative authoring on the WWW under the PINAS platform.

关键词： Collaboration Writing Collaborative work Web server Resource management Collaborative software Collaborative tools World Wide Web programmable logic arrays Web sites

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